- 28 May, 2020 40 commits
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Wenhui Sheng authored
1. enable SMC message filter in SRIOV situation 2. return -EACCESS if msg is blocked from smu_msg_get_index 3. if msg is block, always return 0 from smu_v11_0_send_msg_with_param Signed-off-by:
Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Kevin Wang <kevin1.wang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Wenhui Sheng authored
1. add smu_11_0_msg_mapping definition 2. add valid info for each SMC message in SRIOV Signed-off-by:
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Evan Quan authored
Since on early phase of bringup, the SMU IP may be not enabled or supported. Without this, we may hit null pointer dereference on accessing smu->adev. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Yong Zhao <Yong.Zhao@amd.com> Tested-by:
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Nicholas Kazlauskas authored
[Why] Warnings in the kernel are generally treated as errors. The BREAK_TO_DEBUGGER macro is not a critical error or warning, but rather intended for developer use to help investigate behavior and sequences for other issues. We do still make use of DC_ERROR/ASSERT(0) in various places in the code for things that are genuine issues. Since most developers don't actually KGDB while debugging the kernel these essentially would have no value on their own since the KGDB breakpoint wouldn't trigger - ASSERT(0) was used as a shortcut to get a stacktrace. [How] Turn it into a DRM_DEBUG_DRIVER print instead. We unfortunately lose the stacktrace, but we still do retain some of the useful debug information this offers by having at least the function and line number loggable. If KGDB is supported in the kernel this will still trigger a real breakpoint as well. Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Gustavo A. R. Silva authored
The current codebase makes use of one-element arrays in the following form: struct something { int length; u8 data[1]; }; struct something *instance; instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL); instance->length = size; memcpy(instance->data, source, size); but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. So, replace the one-element array with a flexible-array member. Also, make use of the new struct_size() helper to properly calculate the size of struct SISLANDS_SMC_SWSTATE. This issue was found with the help of Coccinelle and, audited and fixed _manually_. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732 ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by:Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by:
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Gustavo A. R. Silva authored
The current codebase makes use of one-element arrays in the following form: struct something { int length; u8 data[1]; }; struct something *instance; instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL); instance->length = size; memcpy(instance->data, source, size); but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. So, replace the one-element array with a flexible-array member. Also, make use of the new struct_size() helper to properly calculate the size of struct NISLANDS_SMC_SWSTATE. This issue was found with the help of Coccinelle and, audited and fixed _manually_. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732 ("cxgb3/l2t: Fix undefined behaviour") Reviewed-by:Christian König <christian.koenig@amd.com> Signed-off-by:
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Alex Deucher authored
SI and CIK came before VI and newer asics. Reviewed-by:
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Alex Deucher authored
Just check if it's an APU. The checks for the ppfuncs are pointless because if we don't have them we can't power up sdma anyway so we shouldn't even be in this code in the first place. I'm not sure about the in_gpu_reset check. This probably needs to be double checked. The fini logic doesn't match the init logic however with that in_gpu_reset check in place which seems odd. Reviewed-by:
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Alex Deucher authored
Check if mec2 fw exists rather than checking asic types. Reviewed-by:
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Alex Deucher authored
Just check for APU. Reviewed-by:
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Alex Deucher authored
Just check for APU. Reviewed-by:
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Alex Deucher authored
Looks like it should be handled here as well. Reviewed-by:
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Alex Deucher authored
Looks like renoir should be handled here as well. Reviewed-by:
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Alex Deucher authored
Just register the a pointer to the backlight device and use that. Unifies the DC and non-DC handling. Acked-by:
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Christian König authored
Always use the PCI GART instead. We just have to many cases where AGP still causes problems. This means a performance regression for some GPUs, but also a bug fix for some others. Signed-off-by:
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Guchun Chen authored
This will assist debug in error injection case. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
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Hua Zhang authored
When smu_i2c_eeprom_init is called on the smu resuming process under sroiv mode, there will be a call trace: [ 436.377690] dump_stack+0x63/0x85 [ 436.377695] kobject_init+0x77/0x90 [ 436.377704] device_initialize+0x28/0x110 [ 436.377708] device_register+0x12/0x20 [ 436.377756] i2c_register_adapter+0xeb/0x400 [ 436.377763] i2c_add_adapter+0x5a/0x80 [ 436.377951] arcturus_i2c_eeprom_control_init+0x60/0x80 [amdgpu] [ 436.378123] smu_resume+0xcc/0x110 [amdgpu] [ 436.378247] amdgpu_device_gpu_recover+0xfb1/0xfc0 [amdgpu] [ 436.378401] amdgpu_job_timedout+0xf2/0x150 [amdgpu] [ 436.378414] drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378420] ? drm_sched_job_timedout+0x70/0xc0 [amd_sched] [ 436.378430] process_one_work+0x1fd/0x3f0 [ 436.378438] worker_thread+0x34/0x410 [ 436.378444] kthread+0x121/0x140 [ 436.378451] ? process_one_work+0x3f0/0x3f0 [ 436.378456] ? kthread_create_worker_on_cpu+0x70/0x70 [ 436.378464] ret_from_fork+0x35/0x40 This is because smu_i2c_eeprom is not released on gpu recovering. Actually, smu_i2c_eeprom_init/fini are only needed under bare mental mode. Signed-off-by:
Hua Zhang <hua.zhang@amd.com> Reviewed-by:
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Kevin Wang authored
by default, vega20 will use legacy powerplay driver. in order to maintain the code conveniently in the future, remove the support of vega20 from swsmu. Signed-off-by:
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Kevin Wang authored
the vega20 asic uses legacy powerplay driver by default. 1. cleanup is_support_sw_smu_xgmi() function. (only use for vega20 xgmi pstate check) 2. by default, the vega20 set xgmi pstate by legacy powerplay routine. Signed-off-by:
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Likun Gao authored
Change memory training init and finit a common function, as it only have software behavior do not relay on the IP version of PSP. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
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Anthony Koo authored
Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
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Yongqiang Sun authored
[Why] dal side nv12 wa has a lot of side effects. KMD side wa is used, so this should be remove. [How] Removed wa from dal side. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Dmytro Laktyushkin authored
Set the correct value to immediate flip required field. Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
Samson Tam <Samson.Tam@amd.com> Acked-by:
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Dmytro Laktyushkin authored
This change removes internal rounding in dml_log2 function. Dml_log2 is expected to return a float output. In case an int is needed dml will floor the output on it's own. Signed-off-by:
Eric Bernstein <Eric.Bernstein@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] Region 4 is non cacheable and slower than using cache window 4. [How] Check the firmware version to determine how we should program the base address and memory windows. Signed-off-by:
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Nicholas Kazlauskas authored
[Why] In order to switch over the inbox from region4 to cw4 we need to know if the firmware is capable of properly invalidating the cache before reading the commands. Easiest way is to just check the firmware version, but we don't have the helper macros or a way for the dmub_srv to know what version it is. [How] Add a new fw_version field to the creation parameters that driver can optional pass in. Assumes a version of 0x00000000 is invalid. Signed-off-by:
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Jake Wang authored
[WHY] Currently we're copying the entire bios image into vbios. Loading time for FW with entire bios(54272 bytes) is 105138us. By copying only the sections of bios we're using(4436 bytes), loading time drops to 104326us which saves us 812us. [HOW] ROM header, master data table, and all data tables will be packed in contiguous manner. The offsets for the data tables are remapped to their newly packed location. Signed-off-by:
Jake Wang <haonan.wang2@amd.com> Reviewed-by:
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Wenjing Liu authored
[why] DP link layer CTS specs updated to change the test parameters in test 4.2.1.1. Before it requires source to delay 400us on aux no reply. With the specs updates Errata5, it requires source to delay 3.2ms (based on LTTPR aux timeout) This causes our test to fail after updating with the latest test equipment firmware. [how] the change is to allow LTTPR 3.2ms aux timeout delay by default. And only set to 400us if LTTPR is not present. Before this piece of logic is interwined with LTTPR support. Now we will default to 3.2ms aux timeout even if LTTPR support is not enabled by driver. Signed-off-by:
Wenjing Liu <wenjing.liu@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Dmytro Laktyushkin authored
Preparation for new asic support. Signed-off-by:
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
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Wyatt Wood authored
[Why] Due to packing of abm_config_table, memory addresses aren't aligned to 32 bit boundary dmcub prefers. Therefore when using pointers to this structure, it's possible that dmcub will automatically align the data read from that address, yielding incorrect values. [How] Instead of packing 1 byte boundary, explicitly pack values to 4 byte boundary. Since there is a dependency on the existing iram table structure on driver side, we must copy to a second structure, which is aligned correctly, before passing to fw. Signed-off-by:
Wyatt Wood <wyatt.wood@amd.com> Reviewed-by:
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Anthony Koo authored
Signed-off-by:
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Yongqiang Sun authored
[Why & How] Implement abm set_pipe call stacks Have some asics speicifc call stacks for abm. Signed-off-by:
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Rodrigo Siqueira authored
Christian Koenig pointed out a code duplication related to bit swap in case of big-endian manipulation. This commit adds a helper for handling this verification and reduces the requirement of replicate some part of the code. Signed-off-by:
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Nicholas Kazlauskas authored
[Why] If bss_data_size is 0 then we shouldn't be passing down fw_bss_data into the DMUB service since the region isn't really "valid." [How] Pass NULL instead if the size is 0. Signed-off-by:
Zhan Liu <Zhan.Liu@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] New unified firmware binary with only inst const still passes down fw_bss_data != NULL and params->bss_data_size == 0 from DM. This leads it into the legacy path causing firmware state allocation to be too small. [How] Check bss_data_size as well. Signed-off-by:
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Sung Lee authored
[WHY] Failing validation when building scaling parameters causes corruption to occur due to pipe splitting with smaller pixel widths than HW supports. This needs to fail silently for now to hide the corruption until the corruption itself can be fixed. [HOW] Do not fail validation if building scaling params fails. Signed-off-by:
Sung Lee <sung.lee@amd.com> Reviewed-by:
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Jaehyun Chung authored
[Why] Remove dm_write_persistent_data and dm_read_persistent_data as persistence should be handled in DM. [How] Remove functions. Move read/write calls into DM layer while maintaining logic. Signed-off-by:
Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
amd-drm-next-5.8-2020-05-27: amdgpu: - SRIOV fixes - RAS fixes - VCN 2.5 DPG (Dynamic PowerGating) fixes - FP16 updates for display - CTF cleanups - Display fixes - Fix pcie bw sysfs handling - Enable resizeable BAR support for gmc 10.x - GFXOFF fixes for Raven - PM sysfs handling fixes amdkfd: - Fix a race condition - Warning fixes Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200527231219.3930-1-alexander.deucher@amd.com
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2020-05-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull (less than what git shortlog provides): There's a fix for panel brighness on Lenovo X13 Yoga devices and a fix for -Wformat warnings on architectures where atomic-64 counters are not of type unsigned long long. Signed-off-by:
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