- 27 Sep, 2020 29 commits
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Edwin Peer authored
Add ethtool PAM4 link modes for: 50000baseCR_Full 100000baseCR2_Full 200000baseCR4_Full Signed-off-by:Edwin Peer <edwin.peer@broadcom.com> Signed-off-by:
Michael Chan <michael.chan@broadcom.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Edwin Peer authored
The firmware interface has added support for new link speeds using PAM4 modulation. Expand the bnxt_link_info structure to closely mirror the new firmware structures. Add logic to copy the PAM4 capabilities and settings from the firmware. Signed-off-by:
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Edwin Peer authored
It will be necessary to update more than one field in the link_info structure when PAM4 speeds are added in a later patch. Instead of merely translating ethtool speed values to firmware speed values, change the responsiblity of this function to update all the necessary link_info fields required to force the speed change to the desired ethtool value. This also reduces code duplication somewhat at the two call sites, which otherwise both have to independently update link_info fields to turn off auto negotiation advertisements. Also use the appropriate REQ_FORCE_LINK_SPEED definitions. These happen to have the same values, but req_link_speed is utilimately passed as force_link_speed in HWRM_PORT_PHY_CFG which is not defined in terms of REQ_AUTO_LINK_SPEED. Reviewed-by:
Scott Branden <scott.branden@broadcom.com> Signed-off-by:
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Edwin Peer authored
Extract the code for determining an advertised speed is no longer supported into a separate function. This will avoid some code duplication in a later patch when supporting PAM4 speeds, since these speeds are specified in a separate field. Reviewed-by:
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Michael Chan authored
The main changes include FEC, ECN statistics, HWRM_PORT_PHY_QCFG response size reduction, and a new counter added to ctx_hw_stats_ext struct to support the new 58818 chip. The ctx_hw_stats_ext structure is now the superset supporting the new 58818 chips and the prior P5 chips. Add a new flag to identify the new chip and use constants for the chip specific ring statistics sizes instead of the size of the structure. Because the HWRM_PORT_PHY_QCFG response structure size has shrunk back to 96 bytes, the workaround added earlier to limit the size of this message for forwarding to the VF can be removed. Signed-off-by:
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Yangbo Lu authored
Added the missing stub function for ptp_get_msgtype(). Fixes: 036c508b ("ptp: Add generic ptp message type function") Reported-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Signed-off-by:
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Andrew Lunn authored
rivers/net/ethernet/marvell/mvpp2/mvpp2_main.c:7084:36: warning: ‘mvpp2_acpi_match’ defined but not used [-Wunused-const-variable=] 7084 | static const struct acpi_device_id mvpp2_acpi_match[] = { | ^~~~~~~~~~~~~~~~ Wrap the definition inside #ifdef/#endif. Compile tested only. Signed-off-by:Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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David S. Miller authored
Ido Schimmel says: ==================== mlxsw: Expose transceiver overheat counter Amit says: An overheated transceiver can be the root cause of various network problems such as link flapping. Counting the number of times a transceiver's temperature was higher than its configured threshold can therefore help in debugging such issues. This patch set exposes a transceiver overheat counter via ethtool. This is achieved by configuring the Spectrum ASIC to generate events whenever a transceiver is overheated. The temperature thresholds are queried from the transceiver (if available) and set to the default otherwise. Example: ... transceiver_overheat: 2 Patch set overview: Patches #1-#3 add required device registers Patches #4-#5 add required infrastructure in mlxsw to configure and count overheat events Patches #6-#9 gradually add support for the transceiver overheat counter Patch #10 exposes the transceiver overheat counter via ethtool ==================== Signed-off-by: -
Amit Cohen authored
Add structures for port statistics which read from core and not directly from registers. When netdev's ethtool statistics are queried, query the corresponding module's overheat counter from core and expose it as "transceiver_overheat". Signed-off-by:
Amit Cohen <amcohen@nvidia.com> Reviewed-by:
Jiri Pirko <jiri@nvidia.com> Signed-off-by:
Ido Schimmel <idosch@nvidia.com> Signed-off-by:
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Amit Cohen authored
Module temperature warning events are enabled for modules that have a temperature sensor and configured according to the temperature thresholds queried from the module. When a module is unplugged we are guaranteed not to get temperature warning events. However, when a module is plugged in we need to potentially update its current settings (i.e., event enablement and thresholds). Register to port module plug/unplug events and update module's settings upon plug in events. Signed-off-by:
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Amit Cohen authored
The overheat counter is a per-module counter, but it is exposed as part of the corresponding netdev's statistics. It should therefore be presented to user space relative to the netdev's lifetime. Query the counter just before registering the netdev, so that the value exposed to user space will be relative to this initial value. Signed-off-by:
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Amit Cohen authored
MTWE (Management Temperature Warning Event) is triggered for sensors whose temperature event enable bit is enabled in the MTMP register. Enable events for all the modules that have a temperature sensor. Signed-off-by:
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Amit Cohen authored
MTWE (Management Temperature Warning Event) is triggered when module's temperature is higher than its threshold. Register for MTWE events and increase the module's overheat counter when its corresponding sensor goes above the configured threshold. Signed-off-by:
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Amit Cohen authored
Initialize an array that stores per-module overheat state and a counter indicating how many times the module was in overheat state. Export a function to query the counter according to module number. Will be used later on by the switch driver (i.e., mlxsw_spectrum) to expose module's overheat counter as part of ethtool statistics. Initialize mlxsw_env after driver initialization to be able to query number of modules from MGPIR register. Signed-off-by:
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Amit Cohen authored
The MTMP register controls various temperature settings on a per-sensor basis. Subsequent patches are going to alter some of these settings for sensors found on port modules in response to certain events. In order to prevent the current callers that write to MTMP from overriding these settings, have them first query the register and then change only the relevant register fields. Signed-off-by:
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Amit Cohen authored
PMAOS register configures and retrieves the per module status. The register is used also for enabling event for status change. It will be used to enable PMPE (Port Module Plug/Unplug) event. Signed-off-by:
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Amit Cohen authored
PMPE register reports any operational status change of a module. It will be used for enabling temperature warning event when a module is plugged in. Signed-off-by:
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Amit Cohen authored
Add MTWE (Management Temperature Warning Event) register, which is used for over temperature warning. Signed-off-by:
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David S. Miller authored
Huazhong Tan says: ==================== net: hns3: updates for -next To facilitate code maintenance and compatibility, #1 and #2 add device version to replace pci revision, #3 to #9 adds support for querying device capabilities and specifications, then the driver can use these query results to implement corresponding features (some features will be implemented later). And #10 is a minor cleanup since too many parameters for hclge_shaper_para_calc(). ==================== Signed-off-by: -
Huazhong Tan authored
As function hclge_shaper_para_calc() has too many arguments to add more, so encapsulate its three arguments ir_b, ir_u, ir_s into a structure. Signed-off-by:
Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by:
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Guangbin Huang authored
The device specifications querying is unsupported by the old firmware, in this case, these specifications are 0. However, some specifications should not be 0 or will cause problem. So after querying from firmware, some device specifications are needed to check their value and set to default value if their values are 0. Signed-off-by:
Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by:
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Guangbin Huang authored
The max tm rate is a fixed value(100Gb/s) now as it is defined by a macro. In order to support other rates in different kinds of device, it is better to use specification queried from firmware to replace this macro. As function hclge_shaper_para_calc() has too many arguments to add more, so encapsulate its three arguments ir_b, ir_u, ir_s into a structure. Signed-off-by:
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Guangbin Huang authored
To improve code maintainability and compatibility, new commands HCLGE_OPC_QUERY_DEV_SPECS for PF and HCLGEVF_OPC_QUERY_DEV_SPECS for VF are introduced to query device specifications, instead of statically defining specifications by checking the hardware version or other methods. Signed-off-by:
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Guangbin Huang authored
Adds debugfs to dump each device capability whether is supported. Signed-off-by:
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Guangbin Huang authored
In order to improve code maintainability and compatibility, the capabilities of new features are queried from firmware. The member flag in struct hnae3_ae_dev indicates not only capabilities, but some initialized status. As capabilities bits queried from firmware is too many, it is better to use new member to indicate them. So adds member capabs in struce hnae3_ae_dev. Signed-off-by:
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Guangbin Huang authored
Currently, the revision of the pci device is used to identify whether FEC is supported, which is not good for maintainability and compatibility. So use a capability flag to do that. Signed-off-by:
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Guangbin Huang authored
In order to improve code maintainability and compatibility, add support to query the device capability by expanding the existing version query command. The device capability refers to the features supported by the device. Signed-off-by:
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Guangbin Huang authored
Fibre device of PCI revision 0x20 don't support autoneg, and the ops get_autoneg() return AUTONEG_DISABLE so function hns3_nway_reset() will return earlier than judging PCI revision. Function hclge_handle_rocee_ras_error() don't need to judge PCI revision again because its caller hclge_handle_hw_ras_error() has judged once. Signed-off-by:
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Guangbin Huang authored
To better identify the device version, struct hnae3_handle adds a member dev_version to replace pci revision. The dev_version consists of hardware version and PCI revision. The hardware version is queried from firmware by an existing firmware version query command. Signed-off-by:
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- 26 Sep, 2020 11 commits
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Jakub Kicinski authored
The "ethtool" debugfs directory holds per-netdev knobs, so move it from the device instance directory to the port directory. This fixes the following warning when creating multiple ports: debugfs: Directory 'ethtool' with parent 'netdevsim1' already present! Fixes: ff1f7c17 ("netdevsim: add pause frame stats") Signed-off-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
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David S. Miller authored
Vladimir Oltean says: ==================== Generic adjustment for flow dissector in DSA This is the v2 of a series initially submitted in May: https://www.spinics.net/lists/netdev/msg651866.html The end goal is to get rid of the unintuitive code for the flow dissector that currently exists in the taggers. It can all be replaced by a single, common function. Some background work needs to be done for that. Especially the ocelot driver poses some problems, since it has a different tag length between RX and TX, and I didn't want to make DSA aware of that, since I could instead make the tag lengths equal. Changes in v3: - Added an optimization (08/15) that makes the generic case not need to call the .flow_dissect function pointer. Basically .flow_dissect now currently only exists for sja1105. - Moved the .promisc_on_master property to the tagger structure. - Added the .tail_tag property to the tagger structure. - Disabled "suppresscc = all" from my .gitconfig. ==================== Signed-off-by:
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Vladimir Oltean authored
Remove the .flow_dissect procedure, so the flow dissector will call the generic variant which works for this tagging protocol. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: DENG Qingfang <dqfext@gmail.com> Cc: Mauri Sandberg <sandberg@mailfence.com> Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
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Vladimir Oltean authored
The sja1105 is a bit of a special snowflake, in that not all frames are transmitted/received in the same way. L2 link-local frames are received with the source port/switch ID information put in the destination MAC address. For the rest, a tag_8021q header is used. So only the latter frames displace the rest of the headers and need to use the generic flow dissector procedure. Signed-off-by:
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Vladimir Oltean authored
Remove the .flow_dissect procedure, so the flow dissector will call the generic variant which works for this tagging protocol. Cc: John Crispin <john@phrozen.org> Cc: Alexander Lobakin <alobakin@pm.me> Signed-off-by:
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Vladimir Oltean authored
Remove the .flow_dissect procedure, so the flow dissector will call the generic variant which works for this tagging protocol. Cc: DENG Qingfang <dqfext@gmail.com> Cc: Sean Wang <sean.wang@mediatek.com> Cc: John Crispin <john@phrozen.org> Signed-off-by:
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Vladimir Oltean authored
Remove the .flow_dissect procedure, so the flow dissector will call the generic variant which works for this tagging protocol. Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Vladimir Oltean authored
Remove the .flow_dissect procedure, so the flow dissector will call the generic variant which works for this tagging protocol. Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Vladimir Oltean authored
There are 2 Broadcom tags in use, one places the DSA tag before the Ethernet destination MAC address, and the other before the EtherType. Nonetheless, both displace the rest of the headers, so this tagger can use the generic flow dissector procedure which accounts for that. The ASCII art drawing is a good reference though, so keep it but move it somewhere else. Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Vladimir Oltean authored
With the recent mitigations against speculative execution exploits, indirect function calls are more expensive and it would be good to avoid them where possible. In the case of DSA, most switch taggers will shift the EtherType and next headers by a fixed amount equal to that tag's length in bytes. So we can use a generic procedure to determine that, without calling into custom tagger code. However we still leave the flow_dissect method inside struct dsa_device_ops as an override for the generic function. Suggested-by:
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Vladimir Oltean authored
The Marvell 88E6060 uses tag_trailer.c and the KSZ8795, KSZ9477 and KSZ9893 switches also use tail tags. Tell that to the DSA core, since this makes a difference for the flow dissector. Most switches break the parsing of frame headers, but these ones don't, so no flow dissector adjustment needs to be done for them. Signed-off-by:
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