- 13 Feb, 2023 11 commits
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Luca Weiss authored
Enable all i2c busses where something is connected on this phone. Add comments as placeholders for which components are still missing. Also enable gpi_dma and the other qupv3 for that. Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230213-fp4-more-i2c-v2-2-1c459c572f80@fairphone.com
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Luca Weiss authored
Currently the dts contains a mix of status-as-first-property (old qcom style) and status-as-last-property (new style). Move all status properties down to the bottom once and for all so that the style is consistent between different nodes. Reviewed-by:
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Konrad Dybcio authored
A special compatible was introduced for PMK8350 both in the driver and the bindings to facilitate for 2 base registers (PBS & HLOS). Use it. Fixes: b2de4313 ("arm64: dts: qcom: pmk8350: Add peripherals for pmk8350") Signed-off-by:
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Bjorn Andersson authored
Like on the CRD, add the necessary nodes to enable USB Type-C altmode-based external display on the Lenovo ThinkPad X13s. Reviewed-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Signed-off-by:
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Bjorn Andersson authored
The SC8280XP CRD control over battery management and its two USB Type-C port using pmic_glink and two GPIO-based SBU muxes. Enable the two DisplayPort instances, GPIO SBU mux instance and pmic_glink with the two connectors on the CRD. Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
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Bjorn Andersson authored
Add the two DisplayPort controllers that are attached to QMP phys for providing display output on USB Type-C. Reviewed-by:
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Dmitry Baryshkov authored
Enable the GPU on the SM8350-HDK device. The ZAP shader is required for the GPU to function properly. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Add device nodes required to enable GPU on the SM8350 platform. Signed-off-by:
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Dmitry Baryshkov authored
Finish reordering DT nodes by their address. Move PDC, tsens, AOSS, SRAM, SPMI and TLMM nodes to the proper position. Signed-off-by:
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Dmitry Baryshkov authored
Continue ordering DT nodes by their address. Move RNG, UFS, system NoC and SLPI nodes to the proper position. Signed-off-by:
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Dmitry Baryshkov authored
Somehow sm8350 got its device nodes not fully sorted. Start reordering DT nodes by their address. Move apps SMMU, GIC, timer, apps RSC, cpufreq ADSP and cDSP nodes to the end to the proper position at the end of /soc/. Signed-off-by:
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- 09 Feb, 2023 29 commits
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Douglas Anderson authored
This is the equivalent of commit f5b4811e ("arm64: dts: qcom: sc7180: Add trogdor eDP/touchscreen regulator off-on-time") and commit 23ff8669 ("arm64: dts: qcom: sc7180: Start the trogdor eDP/touchscreen regulator on"), but for herobrine instead of trogdor. The motivations for herobrine are the same as for trogdor. NOTES: * Currently for herobrine all boards are eDP, not MIPI. If/when we have herobrine derivatives that are MIPI they we can evaluate whether the same off-on-delay makes sense for them. For trogdor we didn't add the delay to MIPI panels because the problem was found late and nobody had complained about it. For herobrine defaulting to assuming the same 500ms makes sense and if we find we need to optimize later we can. * Currently there are no oddball herobrine boards like homestar where the panel really likes to be power cycled. If we have an oddball board it will need to split the eDP and touchscreen rail anyway (like homestar did) and we'll have to delete the "regulator-boot-on" from that board. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Matthias Kaehlcke <mka@chromium.org> Reviewed-by:
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Neil Armstrong authored
The right compatible is qcom,pmk8350-pon, it matches the reg resources associated to the node and the subnodes compatible properties. Fixes: e9c0a4e4 ("arm64: dts: qcom: Add PMK8550 pmic dtsi") Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
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Neil Armstrong authored
Add missing sm8550 soc specific compatible before fallback to match the updated bindings. Fixes: d7da51db ("arm64: dts: qcom: sm8550: add display hardware devices") Signed-off-by:
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Douglas Anderson authored
On older revisions of evoker, the touchscreen was either non-functional or needed special hardware magic to get it talking properly. It's been decided that the proper way going forward is to use L3C to power some buffers on the QCard and then configure the touchscreens for 1.8V. Let's do that. Note that this is safe to do even on older revs even if it might not make the touchscreen work there (because they didn't have a properly stuffed QCard). As talked about in the patch ("arm64: dts: qcom: sc7280: On QCard, regulator L3C should be 1.8V") the L3C regulator didn't go anywhere at all on older revs. This patch relies on the patch ("HID: i2c-hid: goodix: Add mainboard-vddio-supply") in order to function properly. Without that patch this one won't do any harm but it won't actually accomplish its goal. Signed-off-by: -
Douglas Anderson authored
On never revs of sc7280-herobrine-villager (rev2+) the L3C rail is provided to the touchscreen as the IO voltage rail. Let's add it in the device tree. NOTE: Even though this is only really needed on rev2+ villagers (-rev0 had non-functioning touchscreen and -rev1 had some hacky hardware magic), it doesn't actually hurt to do this for old villager revs. As talked about in the patch ("arm64: dts: qcom: sc7280: On QCard, regulator L3C should be 1.8V") the L3C regulator didn't go anywhere at all on older revs. That means that turning it on for older revs doesn't hurt other than drawing a tiny bit of extra power. Since -rev0 and -rev1 villagers will never make it to real customers and it's nice not to have too many old device trees, the better tradeoff seems to be to enable it everywhere. Signed-off-by: -
Douglas Anderson authored
The "pp3300_left_in_mlb" rail on herobrine eventually connects up to "vreg_edp_3p3" on the qcard. On several herobrine designs this rail has been measured to need more than 1ms to turn on. While technically a herobrine derivative (defined as anyone including the "herobrine.dtsi") could change the board to make the rail rise faster or slower, the fact that two boards (evoker and villager) both measured it as taking more than 1ms implies that it's probably going to be the norm. Thus, let's add a "regulator-enable-ramp-delay" straight into the herobrine.dtsi to handle this. If a particular derivative board needs a faster or slower one then they can override it, though that feels unlikely. While we measured something a bit over 1ms, we'll choose 3ms to give us a tiny bit of margin. This isn't a rail that turns off and on all the time anyway and 3ms is nothing compared to the total amount of time to power on a panel. Signed-off-by:
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Douglas Anderson authored
On the first sc7280 QCards the L3C rail was never really used for anything. Stuffing options on the QCard meant that the QCard itself didn't use this rail for anything. This rail did get sent to the mainboard, but no existing mainboards ever did anything with it other that route it to a testpoint. On later sc7280 QCards, the L3C rail was repurposed. Instead of being a (nominally) 3.3V rail, it was decided to make it a 1.8V rail. It is now provided to the display connector (which might route it to the touchscreen) and also used to power some buffers relating to touchscreen IO. This rail is getting the additional tag "ts_avccio", though some places still refer to it as "vreg_l3c_3p0" despite the fact that the name now specifies the wrong voltage. Since it never hurts for this rail to be 1.8V (even on old QCards / old boards), let's just change it to 1.8V across the board and add the extra "ts_avccio" moniker as a label in the device tree. Future patches will start using this rail in their touchscreens. Signed-off-by:
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Krzysztof Kozlowski authored
The SC8280XP LPASS pin controller has GPIOs 0-18, so correct the number of GPIOs in gpio-ranges. Fixes: c18773d1 ("arm64: dts: qcom: sc8280xp: add SoundWire and LPASS") Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Petr Vorel authored
Enable pm8994_s1, pm8994_l{26,29,30,32} regulators. Use values from downstream kernel on bullhead rev 1.01. NOTE: downstream kernel on angler rev 1.01 differences: * pm8994_l29: regulator-min-microvolt = <2700000> * pm8994_l{20,28,31}: use regulator-boot-on Verification: [ 1.832460] s1: Bringing 0uV into 1025000-1025000uV ... [ 2.057667] l26: Bringing 0uV into 987500-987500uV ... [ 2.075722] l29: Bringing 0uV into 2800000-2800000uV [ 2.076604] l30: Bringing 0uV into 1800000-1800000uV [ 2.082431] l31: Bringing 0uV into 1262500-1262500uV [ 2.095767] l32: Bringing 0uV into 1800000-1800000uV Fixes: f3b2c99e ("arm64: dts: Enable onboard SDHCI on msm8992") Signed-off-by:Petr Vorel <pvorel@suse.cz> Tested-by:
Jamie Douglass <jamiemdouglass@gmail.com> Signed-off-by:
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Krzysztof Kozlowski authored
Correct the number of GPIOs in TLMM pin controller. Fixes: 97e563bf ("arm64: dts: qcom: sm6115: Add basic soc dtsi") Signed-off-by:
Iskren Chernev <me@iskren.info> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Krzysztof Kozlowski authored
Correct the number of GPIOs in TLMM pin controller. Fixes: 9fb08c80 ("arm64: dts: qcom: Add MSM8953 device tree") Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Acked-by:
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Jamie Douglass authored
arm64: dts: qcom: msm8992-lg-bullhead: Correct memory overlaps with the SMEM and MPSS memory regions The memory region reserved by a previous commit (see fixes tag below) overlaps with the SMEM and MPSS memory regions, causing error messages in dmesg: OF: reserved mem: OVERLAP DETECTED! reserved@5000000 (0x0000000005000000--0x0000000007200000) overlaps with smem_region@6a00000 (0x0000000006a00000--0x0000000006c00000) OF: reserved mem: OVERLAP DETECTED! reserved@6c00000 (0x0000000006c00000--0x0000000007200000) overlaps with memory@7000000 (0x0000000007000000--0x000000000ca00000) This patch resolves both of these by splitting the previously reserved memory region into two sections either side of the SMEM region and by cutting off the second memory region to 0x7000000. Fixes: 22c7e1a0 ("arm64: dts: msm8992-bullhead: add memory hole region") Signed-off-by:
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Krzysztof Kozlowski authored
SM8350 pin controller does not have "normal" pin function, so use "gpio". Signed-off-by:
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Krzysztof Kozlowski authored
Bindings expect pins to be named with certain pattern. Signed-off-by:
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Luca Weiss authored
The sc7180 phy compatible works fine for some cases, but it turns out sm6350 does need proper phy configuration in the driver, so use the newly added sm6350 compatible. Because the sm6350 compatible is using the new binding, we need to change the node quite a bit to match it. This fixes qmpphy init when no USB cable is plugged in during bootloader stage. Reviewed-by:
Johan Hovold <johan+linaro@kernel.org> Signed-off-by:
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Bhupesh Sharma authored
Add the adsp, cdsp and modem smp2p nodes to sm6115. Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by:
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Luca Weiss authored
Enable the CCI busses that have cameras connected to them. Reviewed-by:
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Luca Weiss authored
Add nodes for the two CCI blocks found on SM6350. The first contains two i2c busses and while the second one might also contains two busses, the downstream kernel only has one configured, and some boards use the GPIOs for the potential cci1_i2c1 one other purposes, so leave that one unconfigured. Signed-off-by:
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Luca Weiss authored
Add a node for the camcc found on SM6350 SoC. Reviewed-by:
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Bjorn Andersson authored
Merge DT binding to gain Camera clock defines for SM6350
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Konrad Dybcio authored
Add device tree bindings for camera clock controller for Qualcomm Technology Inc's SM6350 SoC. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Krzysztof Kozlowski authored
After switching interconnects to 2 cells, the SDHCI interconnects need to get one more argument. Fixes: 4f287e31 ("arm64: dts: qcom: sm8350: Use 2 interconnect cells") Signed-off-by:
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Richard Acayan authored
The interconnects for Snapdragon 670 can be controlled. Add their corresponding nodes in the device tree. Signed-off-by:
Richard Acayan <mailingradian@gmail.com> Signed-off-by:
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Jianhua Lu authored
Add support for Xiaomi Mi Pad 5 Pro, codename is xiaomi-elish. This commit brings support for: * ADSP/CDSP/SLPI/VENUS * Backlight * Battery fuel gauge * Framebuffer * PCIe0 * USB2.0 Signed-off-by:
Jianhua Lu <lujianhua000@gmail.com> Signed-off-by:
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Andrew Halaney authored
It isn't obvious in the current devicetree what is connected. Go ahead and document what's on the other end. Signed-off-by:
Andrew Halaney <ahalaney@redhat.com> Reviewed-by:
Eric Chanudet <echanude@redhat.com> Signed-off-by:
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Andrew Halaney authored
Some of the pinctrl groups were invalid for the selected pins. Select the proper qup group to fix these warnings: [ 6.523566] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio135" for function "qup15" [ 6.535042] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio136" for function "qup15" [ 6.597536] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio158" for function "qup15" [ 6.597544] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio159" for function "qup15" [ 6.597991] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio0" for function "qup15" [ 6.597996] sc8280xp-tlmm f100000.pinctrl: invalid group "gpio1" for function "qup15" Fixes: e073899e ("arm64: dts: qcom: sa8540p-ride: add i2c nodes") Reviewed-by:
Shazad Hussain <quic_shazhuss@quicinc.com> Reviewed-by:
Brian Masney <bmasney@redhat.com> Signed-off-by:
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Abel Vesa authored
The proper name for it is power-management. Currently, with the node name being power-controller, the bindings check fails due to the property #power-domain-cells missing. Fixes: ffc50b2d ("arm64: dts: qcom: Add base SM8550 dtsi") Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Reviewed-by:
Sai Prakash Ranjan <quic_saipraka@quicinc.com> Reviewed-by:
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Krzysztof Kozlowski authored
Fix typo in vdd-l5-l16 supply of qcom,pm8550-rpmh-regulators. Fixes: 71342fb9 ("arm64: dts: qcom: Add base SM8550 MTP dts") Signed-off-by:
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Krzysztof Kozlowski authored
Generic SMMU compatibles are not allowed alone and we expect specific one. Signed-off-by:
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