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  1. 15 Jun, 2021 4 commits
  3. 12 Jun, 2021 5 commits
  5. 11 Jun, 2021 1 commit
  7. 02 Jun, 2021 4 commits
    • Yang Yingliang's avatar
      soc/tegra: fuse: Don't return -ENOMEM when allocate lookups failed · 854d128b
      Yang Yingliang authored 
      fuse->base can not be unmapped if allocate lookups failed in
tegra_init_fuse(), because it is an early_initcall, the driver
will be loaded anyway and fuse->base will be accessed by other
functions later, so remove the return -ENOMEM after allocating
lookups failed to make less confusing.
Signed-off-by: default avatarYang Yingliang <yangyingliang@huawei.com>
[treding@nvidia.com: drop error message, out-of-memory is noisy anyway]
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      854d128b
    • Dmitry Osipenko's avatar
      soc/tegra: regulators: Support core domain state syncing · 029f7e24
      Dmitry Osipenko authored 
      The core voltage shall not drop until state of core domain is synced,
i.e. all device drivers that use core domain are loaded and ready.

Support core domain state syncing. The core domain driver invokes the
core-regulator voltage syncing once the state of domain is synced, at
this point the core voltage is allowed to go lower than the level left
after bootloader.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      029f7e24
    • Dmitry Osipenko's avatar
      soc/tegra: pmc: Add driver state syncing · 41bafa69
      Dmitry Osipenko authored 
      Add driver state syncing that is invoked once all PMC consumers are
attached and ready. The consumers are the power domain clients.
The synchronization callback is invoked once all client drivers are
probed, the driver core handles this for us. This callback informs
PMC driver that all voltage votes are initialized by each PD client
and it's safe to begin voltage scaling of the core power domain.
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash DT backwards-compatibility patch]
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      41bafa69
    • Dmitry Osipenko's avatar
      soc/tegra: pmc: Add core power domain · f880ee9e
      Dmitry Osipenko authored 
      NVIDIA Tegra SoCs have multiple power domains, each domain corresponds
to an external SoC power rail. Core power domain covers vast majority of
hardware blocks within a Tegra SoC. The voltage of a power domain should
be set to a level which satisfies all devices within the power domain.
Add support for the core power domain which controls voltage state of the
domain. This allows us to support system-wide DVFS on Tegra20-210 SoCs.
The PMC powergate domains now are sub-domains of the core domain, this
requires device-tree updating, older DTBs are unaffected and will continue
to work as before.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Reviewed-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
[treding@nvidia.com: squash lockdep class removal patch]
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      f880ee9e
  9. 01 Jun, 2021 6 commits
  11. 27 May, 2021 2 commits
  13. 23 May, 2021 18 commits
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