- 02 Sep, 2022 3 commits
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Claudiu Beznea authored
Use kernel-doc style for documentation of struct at91_gpio_chip. Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220831135636.3176406-2-claudiu.beznea@microchip.comSigned-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
The GPIO library code will assign default value for number of OF cells, no need to repeat this in the driver. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220830175850.44770-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.1 - Document pin control support for the RZ/Five SoC.
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- 31 Aug, 2022 3 commits
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Francesco Dolcini authored
Change PINCTRL_IMX8M* dependency from just ARCH_MXC to SOC_IMX8M, likewise is done for other PINCTRL_IMX* kconfig. This avoid polluting the config when SOC_IMX8M is not enabled. Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Reviewed-by:
Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20220830142727.313080-1-francesco.dolcini@toradex.comSigned-off-by:
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Basavaraj Natikar authored
Use dev_dbg instead of dev_warn for additional support of pinmux feature. Signed-off-by:
Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20220830110525.1933198-1-Basavaraj.Natikar@amd.comSigned-off-by:
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Billy Tsai authored
When the driver want to disable the signal of the function, it doesn't need to query the state of the mux function's signal on a pin. The condition below will miss the disable of the signal: Ball | Default | P0 Signal | P0 Expression | Other -----+---------+-----------+-----------------------------+---------- E21 GPIOG0 SD2CLK SCU4B4[16]=1 & SCU450[1]=1 GPIOG0 -----+---------+-----------+-----------------------------+---------- B22 GPIOG1 SD2CMD SCU4B4[17]=1 & SCU450[1]=1 GPIOG1 -----+---------+-----------+-----------------------------+---------- Assume the register status like below: SCU4B4[16] == 1 & SCU4B4[17] == 1 & SCU450[1]==1 After the driver set the Ball E21 to the GPIOG0: SCU4B4[16] == 0 & SCU4B4[17] == 1 & SCU450[1]==0 When the driver want to set the Ball B22 to the GPIOG1, the condition of the SD2CMD will be false causing SCU4B4[17] not to be cleared. Signed-off-by:
Billy Tsai <billy_tsai@aspeedtech.com> Acked-by:
Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220818101839.28860-1-billy_tsai@aspeedtech.comSigned-off-by:
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- 26 Aug, 2022 5 commits
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Jilin Yuan authored
'unsigned int' should be clearer than 'unsigned'. Signed-off-by:
Jilin Yuan <yuanjilin@cdjrlc.com> Link: https://lore.kernel.org/r/20220825124134.30242-1-yuanjilin@cdjrlc.comSigned-off-by:
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Rob Herring authored
In order to ensure only documented properties are present, node schemas must have unevaluatedProperties or additionalProperties set to false (typically). Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220823145649.3118479-6-robh@kernel.orgSigned-off-by:
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Mario Limonciello authored
Feedback from Kent had showed some better selections for symbols to use for pinctrl-amd debugfs output. Adopt some of those instead. Fixes: e8129a07 ("pinctrl: amd: Use unicode for debugfs output") Suggested-by:
Kent Gibson <warthog618@gmail.com> Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20220823230753.14799-1-mario.limonciello@amd.comSigned-off-by:
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Stephen Rothwell authored
Fix up the build. Signed-off-by:
Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20220826152650.2c55e482@canb.auug.org.auSigned-off-by:
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Linus Walleij authored
Merge branch 'i2c/make_remove_callback_void-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into devel This branch is needed to make the i2c driver remove() callback in new driver compile properly. Signed-off-by:
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- 25 Aug, 2022 9 commits
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Allen-KH Cheng authored
The mt8186 contains 8 GPIO physical address bases that correspond to the 'reg-names' of the pinctrl driver. The 'reg-names' entries in bindings are ordered incorrectly, though. The system crashes due of an erroneous address when the regulator initializes. We fix the 'reg-names' for the pinctrl nodes and the pinctrl-mt8186 example in bindings. Fixes: 338e953f ("dt-bindings: pinctrl: mt8186: add pinctrl file and binding document") Co-developed-by:
Guodong Liu <guodong.liu@mediatek.com> Signed-off-by:
Allen-KH Cheng <allen-kh.cheng@mediatek.com> Acked-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220819120649.21523-1-allen-kh.cheng@mediatek.comSigned-off-by:
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Hui.Liu authored
Add pinctrl driver support for MediaTek SoC mt8188. Signed-off-by:
Hui.Liu <hui.liu@mediatek.com> Reviewed-by:
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Hui.Liu authored
Add the pinctrl header file on MediaTek mt8188. Add the new binding document for pinctrl on MediaTek mt8188. Signed-off-by:
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Srinivas Kandagatla authored
Add pinctrl driver to support pin configuration for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SC8280XP. This IP is an additional pin control block for Audio Pins on top the existing SoC Top level pin-controller. Hardware setup looks like: TLMM GPIO[189 - 207] --> LPASS LPI GPIO [0 - 18] This pin controller has some similarities compared to Top level msm SoC Pin controller like 'each pin belongs to a single group' and so on. However this one is intended to control only audio pins in particular, which can not be configured/touched by the Top level SoC pin controller except setting them as gpios. Apart from this, slew rate is also available in this block for certain pins which are connected to SLIMbus or SoundWire Bus. Signed-off-by:Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20220817113747.9111-3-srinivas.kandagatla@linaro.orgSigned-off-by:
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Srinivas Kandagatla authored
Add device tree binding Documentation details for Qualcomm SC8280XP LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver. Signed-off-by:
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Srinivas Kandagatla authored
Add pinctrl driver to support pin configuration for LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl on SM8450. This IP is an additional pin control block for Audio Pins on top the existing SoC Top level pin-controller. Hardware setup looks like: TLMM GPIO[165 - 187] --> LPASS LPI GPIO [0 - 22] This pin controller has some similarities compared to Top level msm SoC Pin controller like 'each pin belongs to a single group' and so on. However this one is intended to control only audio pins in particular, which can not be configured/touched by the Top level SoC pin controller except setting them as gpios. Apart from this, slew rate is also available in this block for certain pins which are connected to SLIMbus or SoundWire Bus. Signed-off-by: -
Srinivas Kandagatla authored
Add device tree binding Documentation details for Qualcomm SM8450 LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver. Signed-off-by:
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Andy Shevchenko authored
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by:
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Andy Shevchenko authored
The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by:
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- 24 Aug, 2022 2 commits
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Patrick Rudolph authored
Add support for cypress I2C GPIO expanders cy8c9520, cy8c9540 and cy8c9560. The GPIO expanders feature a PWM mode, thus add it as pinctrl driver. The chip features multiple drive modes for each pin when configured as output and multiple bias settings when configured as input. Tested all three components and verified that all functionality is fully working. Datasheet: https://www.cypress.com/file/37971/downloadSigned-off-by:
Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by:
Naresh Solanki <naresh.solanki@9elements.com> Link: https://lore.kernel.org/r/20220816054917.7893-3-patrick.rudolph@9elements.comSigned-off-by:
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Patrick Rudolph authored
Added device tree binding documentation for Cypress CY8C95x0 I2C pin-controller. Signed-off-by:
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- 22 Aug, 2022 7 commits
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Rob Herring authored
The aspeed pinctrl parent node (SCU) in the examples is missing various properties. Add the properties in preparation for the SCU schema. Signed-off-by:
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Pali Rohár authored
Macro PIN_GRP() is not used, remove it. Signed-off-by:
Pali Rohár <pali@kernel.org> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20220805122202.23174-4-pali@kernel.orgSigned-off-by:
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Pali Rohár authored
Now when all MPP pins are properly defined and every MPP pin has GPIO function, always checks for errors in armada_37xx_gpio_request_enable() function when calling armada_37xx_pmx_set_by_name(). Function armada_37xx_pmx_set_by_name() should not return "not supported" error anymore for any GPIO pin when requesting GPIO mode. Fixes: 87466ccd ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by:
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Pali Rohár authored
All 3 MPP pins (20, 21 and 22) can be configured individually and also can be configured to GPIO functions. Fix definitions for these MPP pins in existing pin groups. After this change GPIO function can be enabled just for one of these 3 pins. Fixes: 87466ccd ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by:
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Pali Rohár authored
gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table so they are properly exported as valid pin numbers. Fixes: 87466ccd ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx") Signed-off-by:
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Jagan Teki authored
RV1126 has five GPIOs groups - GPIO0 in PD_MMU and GPIO1-4 in PD_BUS. In GPIO0, up to Lower C group GPIO0_C[3:0] is part of PMU but rest of the groups from there are part of GRF. Added pinctrl support for RV1126 and the pull, drv and schmitt calculations are inferred from [1] authored by Jianqun Xu. [1] https://github.com/rockchip-linux/kernel/blob/develop-4.19/drivers/pinctrl/pinctrl-rockchip.c Cc: linux-gpio@vger.kernel.org Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by:
Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by:
Jagan Teki <jagan@edgeble.ai> Link: https://lore.kernel.org/r/20220818124132.125304-8-jagan@edgeble.aiSigned-off-by:
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Jagan Teki authored
Document dt-bindings for RV1126 SoC pinctrl support. Cc: linux-gpio@vger.kernel.org Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by:
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- 16 Aug, 2022 7 commits
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Uwe Kleine-König authored
The value returned by an i2c driver's remove function is mostly ignored. (Only an error message is printed if the value is non-zero that the error is ignored.) So change the prototype of the remove function to return no value. This way driver authors are not tempted to assume that passing an error to the upper layer is a good idea. All drivers are adapted accordingly. There is no intended change of behaviour, all callbacks were prepared to return 0 before. Reviewed-by:
Peter Senna Tschudin <peter.senna@gmail.com> Reviewed-by:
Jeremy Kerr <jk@codeconstruct.com.au> Reviewed-by:
Benjamin Mugnier <benjamin.mugnier@foss.st.com> Reviewed-by:
Javier Martinez Canillas <javierm@redhat.com> Reviewed-by:
Crt Mori <cmo@melexis.com> Reviewed-by:
Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marek Behún <kabel@kernel.org> # for leds-turris-omnia Acked-by:
Vladimir Oltean <olteanv@gmail.com> Acked-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> # for drivers/power Acked-by:
Krzysztof Hałasa <khalasa@piap.pl> Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Wolfram Sang <wsa@kernel.org>
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Uwe Kleine-König authored
All platforms that provide a teardown callback return 0. New users are supposed to not make use of platform support, so there is no functionality lost. This patch is a preparation for making i2c remove callbacks return void. Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by:
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Uwe Kleine-König authored
Returning an error value in an i2c remove callback results in a generic error message being emitted by the i2c core, but otherwise it doesn't make a difference. The device goes away anyhow and the devm cleanups are called. So instead of triggering the generic i2c error message, emit a more helpful message if a problem occurs and return 0 to suppress the generic message. This patch is a preparation for making i2c remove callbacks return void. Acked-by:
Pavel Machek <pavel@ucw.cz> Signed-off-by:
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Uwe Kleine-König authored
The mutex might still be in use until the devm cleanup callback devm_led_classdev_flash_release() is called. This only happens some time after lm3601x_remove() completed. Fixes: e63a7448 ("leds: lm3601x: Convert class registration to device managed") Acked-by:
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Uwe Kleine-König authored
Returning an error value from an i2c remove callback results in an error message being emitted by the i2c core, but otherwise it doesn't make a difference. The device goes away anyhow and the devm cleanups are called. As lm3697_remove() already emits an error message on failure and the additional error message by the i2c core doesn't add any useful information, don't pass the error value up the stack. Instead continue to clean up and return 0. This patch is a preparation for making i2c remove callbacks return void. Acked-by:
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Uwe Kleine-König authored
A remove callback that just returns 0 is equivalent to no callback at all as can be seen in i2c_device_remove(). So simplify accordingly. Signed-off-by:
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Lad Prabhakar authored
RZ/Five SoC is pin compatible with RZ/G2UL (Type 1) SoC. This patch updates the comment to include RZ/Five SoC so that we make it clear "renesas,r9a07g043-pinctrl" compatible string will be used for RZ/Five SoC. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220726175315.1147-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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- 14 Aug, 2022 4 commits
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Linus Torvalds authored
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Yury Norov authored
Radix tree header includes gfp.h for __GFP_BITS_SHIFT only. Now we have gfp_types.h for this. Fixes powerpc allmodconfig build: In file included from include/linux/nodemask.h:97, from include/linux/mmzone.h:17, from include/linux/gfp.h:7, from include/linux/radix-tree.h:12, from include/linux/idr.h:15, from include/linux/kernfs.h:12, from include/linux/sysfs.h:16, from include/linux/kobject.h:20, from include/linux/pci.h:35, from arch/powerpc/kernel/prom_init.c:24: include/linux/random.h: In function 'add_latent_entropy': >> include/linux/random.h:25:46: error: 'latent_entropy' undeclared (first use in this function); did you mean 'add_latent_entropy'? 25 | add_device_randomness((const void *)&latent_entropy, sizeof(latent_entropy)); | ^~~~~~~~~~~~~~ | add_latent_entropy include/linux/random.h:25:46: note: each undeclared identifier is reported only once for each function it appears in Reported-by:kernel test robot <lkp@intel.com> CC: Andy Shevchenko <andriy.shevchenko@linux.intel.com> CC: Andrew Morton <akpm@linux-foundation.org> CC: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by:
Yury Norov <yury.norov@gmail.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds authored
Pull vfs lseek fix from Al Viro: "Fix proc_reg_llseek() breakage. Always had been possible if somebody left NULL ->proc_lseek, became a practical issue now" * tag 'pull-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: take care to handle NULL ->proc_lseek()
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Al Viro authored
Easily done now, just by clearing FMODE_LSEEK in ->f_mode during proc_reg_open() for such entries. Fixes: 868941b1 "fs: remove no_llseek" Signed-off-by:
Al Viro <viro@zeniv.linux.org.uk>
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