- 20 May, 2021 40 commits
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Guchun Chen authored
Current golden setting is out of date. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Guchun Chen authored
Current golden setting is out of date. Signed-off-by:
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xinhui pan authored
looks like we forget to set ttm->sg to NULL. Hit panic below [ 1235.844104] general protection fault, probably for non-canonical address 0x6b6b6b6b6b6b7b4b: 0000 [#1] SMP DEBUG_PAGEALLOC NOPTI [ 1235.989074] Call Trace: [ 1235.991751] sg_free_table+0x17/0x20 [ 1235.995667] amdgpu_ttm_backend_unbind.cold+0x4d/0xf7 [amdgpu] [ 1236.002288] amdgpu_ttm_backend_destroy+0x29/0x130 [amdgpu] [ 1236.008464] ttm_tt_destroy+0x1e/0x30 [ttm] [ 1236.013066] ttm_bo_cleanup_memtype_use+0x51/0xa0 [ttm] [ 1236.018783] ttm_bo_release+0x262/0xa50 [ttm] [ 1236.023547] ttm_bo_put+0x82/0xd0 [ttm] [ 1236.027766] amdgpu_bo_unref+0x26/0x50 [amdgpu] [ 1236.032809] amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu+0x7aa/0xd90 [amdgpu] [ 1236.040400] kfd_ioctl_alloc_memory_of_gpu+0xe2/0x330 [amdgpu] [ 1236.046912] kfd_ioctl+0x463/0x690 [amdgpu] Signed-off-by:
xinhui pan <xinhui.pan@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Alex Deucher authored
To stay consistent with the user's setting. v2: rebase on multi-eDP support Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1337Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Alex Deucher authored
And cache the value. These can be used by the backlight callbacks and modesetting functions. v2: rebase on latest backlight changes. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1337Reviewed-by:
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Mukul Joshi authored
For Aldebaran, driver needs to query DramMegaBaseAddress to check if DF hashing is enabled. Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Acked-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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James Zhu authored
Add video_codecs query support for aldebaran. Signed-off-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
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Dennis Li authored
The function kfd_lookup_process_by_pasid will increase the reference count of kfd_process object, its caller should call kfd_unref_process to decrease the reference count. Otherwise resource leakage will happen. Signed-off-by:
Dennis Li <Dennis.Li@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Felix Kuehling authored
The dmabuf attachment should be updated by moving the SG BO to DOMAIN_CPU and back to DOMAIN_GTT. This does not necessarily invoke the populate/unpopulate callbacks. Do this in backend_bind/unbind instead. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
Oak Zeng <Oak.Zeng@amd.com> Acked-by:
Ramesh Errabolu <Ramesh.Errabolu@amd.com> Signed-off-by:
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Felix Kuehling authored
Use DMABufs with dynamic attachment to DMA-map GTT BOs on other GPUs. Signed-off-by:
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Felix Kuehling authored
This is needed to avoid deadlocks with DMA buf import in the next patch. Also move PT/PD validation out of kfd_mem_attach, that way the caller can bo this unconditionally. Signed-off-by:
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Felix Kuehling authored
DMA map kfd_mem_attachments in update_gpuvm_pte. This function is called with the BO and page tables reserved, so we can safely update the DMA mapping. DMA unmap when a BO is unmapped from a GPU and before updating mappings in restore workers. Signed-off-by:
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Felix Kuehling authored
Add BO-type specific helpers functions to DMA-map and unmap kfd_mem_attachments. Implement this functionality for userptrs by creating one SG BO per GPU and filling it with a DMA mapping of the pages from the original mem->bo. Signed-off-by:
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Felix Kuehling authored
Do AQL queue double-mapping with a single attach call. That will make it easier to create per-GPU BOs later, to be shared between the two BO VA mappings on the same GPU. Freeing the attachments is not necessary if map_to_gpu fails. These will be cleaned up when the kdg_mem object is destroyed in amdgpu_amdkfd_gpuvm_free_memory_of_gpu. Signed-off-by:
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Felix Kuehling authored
For now they all reference the same BO. For correct DMA mappings they will refer to different BOs per-GPU. Signed-off-by:
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Felix Kuehling authored
This name is more fitting, especially for the changes coming next to support multi-GPU systems with proper DMA mappings. Cleaned up the code and renamed some related functions and variables to improve readability. Signed-off-by:
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Jingwen Chen authored
[Why] the gem object rfb->base.obj[0] is get according to num_planes in amdgpufb_create, but is not put according to num_planes [How] put rfb->base.obj[0] in amdgpu_fbdev_destroy according to num_planes Signed-off-by:
Jingwen Chen <Jingwen.Chen2@amd.com> Acked-by:
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YuBiao Wang authored
[Why] IH_RB_CNTL is blocked by PSP so we need to ask psp to help config it. [How] Move psp ip block before ih, and use psp to program IH_RB_CNTL under sriov. Reviewed-by:
Chen, Horace <Horace.Chen@amd.com> Signed-off-by:
YuBiao Wang <YuBiao.Wang@amd.com> Signed-off-by:
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Joe Perches authored
/n should be \n Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] MALL requires idle optimizations to be enabled. This enables MALL feature on dcn303 Signed-off-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Add beige_goby_ta.bin to module firmware table and call psp init for TA Signed-off-by:
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Joshua Aberback authored
[Why] This update was made for DCN30, but it is needed for DCN303 as well Signed-off-by:
Joshua Aberback <joshua.aberback@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Absense of this callback causes null pointer dereference. Add the corresponding callback in dcn303 resources. Fixes: 443dfba0 ("drm/amd/display: fix dcn3+ bw validation soc param update sequence") Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Adds DCN IP block initialization for Beige Goby Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Adds the firmware definition and missing cases statement hooks for Beige Goby support in AMDGPU DM. Signed-off-by:
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Aurabindo Pillai authored
[How] * Add MIT license to all new files as SPDX tag. * Fix copyright year Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Add Beige Goby (DCN303) resource, irq service, & dmub loader. v2: fix nbio include (Alex) Signed-off-by:
Chris Park <Chris.Park@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Adds registers definitions required for Beige Goby initial support. Signed-off-by:
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Jiansong Chen authored
beige_goby has similar gc_10_3 ip with sienna_cichlid, so follow its registers offset setting. Signed-off-by:
Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by:
Jack Gui <Jack.Gui@amd.com> Signed-off-by:
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Chengming Gui authored
Enable gfxoff in driver side based on SMC#73.3 v2: fix typo 'Eanble' --> 'Enable' Signed-off-by:
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Chengming Gui authored
Switch from softPPTable to VBIOS PPTable. v2: drop extra parens (Alex) Signed-off-by:
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Tao Zhou authored
Enable cgls to improve the runtime power efficiency. Signed-off-by:
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Veerabadhran Gopalakrishnan authored
Enable VCN CG for BEIGE GOBY Signed-off-by:
Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by:
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Tao Zhou authored
Enable ih clock gating for beige_goby. Signed-off-by:
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Tao Zhou authored
Enable hdp MGCG and LS for beige_goby. Signed-off-by:
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Tao Zhou authored
Enable mc CG and LS for beige_goby. Signed-off-by:
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Tao Zhou authored
Enable athub/mmhub power gating for beige_goby. Signed-off-by:
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Tao Zhou authored
Enable athub cg for beige_goby. Signed-off-by:
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Tao Zhou authored
Enable GFX MGCG, CGCG and 3DCG for beige_goby. Signed-off-by:
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Chengming Gui authored
Use macro to get the pptable members for different pptable structures. v2: abstract the table operations especially get the table members to simplify cover the two different pptable structures. v3: move pptable operations related structures and functions into ppt.c v4: use macro to simplify the operation to get pptable members v5: fix parameter reference error and add dump pptable support for beige_goby Signed-off-by:
Evan Quan <Evan.Quan@amd.com> Signed-off-by:
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