- 22 Aug, 2023 1 commit
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Frank Li authored
fixed build error reported by kernel test robot. >> s390-linux-ld: fsl-edma-main.c:(.text+0xf4c): undefined reference to `devm_platform_ioremap_resource' s390-linux-ld: drivers/dma/idma64.o: in function `idma64_platform_probe': Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202306210131.zaHVasxz-lkp@intel.com/Signed-off-by:
Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20230821161617.2142561-2-Frank.Li@nxp.comSigned-off-by:
Vinod Koul <vkoul@kernel.org>
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- 21 Aug, 2023 18 commits
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Fenghua Yu authored
There are two issues in the current PRS disable sysfs store function wq_prs_disable_store(): 1. Since PRS disable knob is invisible if PRS disable is not supported in WQ, it's redundant to check PRS support again in the store function again. Remove the redundant PRS support check. 2. Since PRS disable is read-only when the device is not configurable, PRS disable cannot be changed on the device. Add device configurable check in the store function. Fixes: f2dc3271 ("dmaengine: idxd: add per wq PRS disable") Signed-off-by:
Fenghua Yu <fenghua.yu@intel.com> Reviewed-by:
Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20230811012635.535413-2-fenghua.yu@intel.comSigned-off-by:
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Fenghua Yu authored
ATS disable status in a WQ is read-only if the device is not configurable. This change ensures that the ATS disable attribute can be modified via sysfs only on configurable devices. Fixes: 92de5fa2 ("dmaengine: idxd: add ATS disable knob for work queues") Signed-off-by:
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Radhey Shyam Pandey authored
Program IRQDelay for AXI DMA. The interrupt timeout mechanism causes the DMA engine to generate an interrupt after the delay time period has expired. It enables dmaengine to respond in real-time even though interrupt coalescing is configured. It also remove the placeholder for delay interrupt and merge it with frame completion interrupt. Since by default interrupt delay timeout is disabled this feature addition has no functional impact on VDMA, MCDMA and CDMA IP's. Signed-off-by:
Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://lore.kernel.org/r/1691387509-2113129-8-git-send-email-radhey.shyam.pandey@amd.comSigned-off-by:
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Radhey Shyam Pandey authored
Schedule tasklet with high priority to ensure that callback processing is prioritized. It improves throughput for netdev dma clients. Signed-off-by:
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Radhey Shyam Pandey authored
AXIDMA IP in SG mode sets completion bit to 1 when the transfer is completed. Read this bit to move descriptor from active list to the done list. This feature is needed when interrupt delay timeout and IRQThreshold is enabled i.e Dly_IrqEn is triggered w/o completing interrupt threshold. Signed-off-by:
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Radhey Shyam Pandey authored
Increase AXI DMA transaction segments count to ensure that even in high load we always get a free segment in prepare descriptor for a DMA_SLAVE transaction. Signed-off-by:
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Radhey Shyam Pandey authored
Read DT property to check if AXI DMA is connected to streaming IP i.e axiethernet. If connected i.e xlnx,axistream-connected property is present in the dma node then pass AXI4-Stream control words to dma client using metadata_ops dmaengine API. If not connected then driver won't support metadata_ops dmaengine API and continue to support all legacy usecases. Signed-off-by:
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Radhey Shyam Pandey authored
Add an optional AXI DMA property 'xlnx,irq-delay'. It specifies interrupt timeout value and causes the DMA engine to generate an interrupt after the delay time period has expired. Timer begins counting at the end of a packet and resets with receipt of a new packet or a timeout event occurs. This property is useful when AXI DMA is connected to the streaming IP i.e axiethernet where inter packet latency is critical while still taking the benefit of interrupt coalescing. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1691387509-2113129-3-git-send-email-radhey.shyam.pandey@amd.comSigned-off-by:
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Radhey Shyam Pandey authored
Add an optional AXI DMA property 'xlnx,axistream-connected'. This can be specified to indicate that DMA is connected to a streaming IP in the hardware design and dma driver needs to do some additional handling i.e pass metadata and perform streaming IP specific configuration. Signed-off-by:
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Jialin Zhang authored
PCI core API pci_dev_id() can be used to get the BDF number for a pci device. We don't need to compose it mannually. Use pci_dev_id() to simplify the code a little bit. Signed-off-by:
Jialin Zhang <zhangjialin11@huawei.com> Reviewed-by:
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Yajun Deng authored
The chancnt would be updated in __dma_async_device_channel_register(), but it was assigned in ioat_enumerate_channels(). Therefore chancnt has the wrong value. Add chancnt member to the struct ioatdma_device, ioat_dma->chancnt is used in ioat, dma_dev->chancnt is used in dmaengine. Signed-off-by:
Yajun Deng <yajun.deng@linux.dev> Reviewed-by:
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Yajun Deng authored
There are a lot of duplicate codes for checking if the dma has some capability. Define a temporary macro that is used to check if the dma claims some capability and if the corresponding function is implemented. Signed-off-by:
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Yu Liao authored
Make use of the struct_size() helper instead of an open-coded version, in order to avoid any potential type mistakes or integer overflows that, in the worst scenario, could lead to heap overflows. Signed-off-by:
Yu Liao <liaoyu15@huawei.com> Link: https://lore.kernel.org/r/20230821073600.4078584-1-liaoyu15@huawei.comSigned-off-by:
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Christophe JAILLET authored
Use struct_size() instead of hand writing it. This is less verbose and more informative. 'mcf_chan' is now unused and can be removed. In fact, it is shadowed by another variable in the 'for' loop below. Keep this one. Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/97c2bb1c9b69d0739da3762a7752ae6582c4ad02.1683390112.git.christophe.jaillet@wanadoo.frSigned-off-by:
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Li Zetao authored
Use the builtin_platform_driver macro to simplify the code, which is the same as declaring with device_initcall(). Signed-off-by:
Li Zetao <lizetao1@huawei.com> Acked-by:
Peter Harliman Liem <pliem@maxlinear.com> Link: https://lore.kernel.org/r/20230815080250.1089589-1-lizetao1@huawei.comSigned-off-by:
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ruanjinjie authored
Check for the return value of platform_get_irq(): if no interrupt is specified, it wouldn't make sense to call request_irq(). Fixes: 8d318a50 ("DMAENGINE: Support for ST-Ericssons DMA40 block v3") Signed-off-by:
Ruan Jinjie <ruanjinjie@huawei.com> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230724144108.2582917-1-ruanjinjie@huawei.comSigned-off-by:
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Justin Stitt authored
When building with clang 18 I see the following warning: | drivers/dma/owl-dma.c:1119:14: warning: cast to smaller integer type | 'enum owl_dma_id' from 'const void *' [-Wvoid-pointer-to-enum-cast] | 1119 | od->devid = (enum owl_dma_id)of_device_get_match_data(&pdev->dev); This is due to the fact that `of_device_get_match_data()` returns a void* while `enum owl_dma_id` has the size of an int. Cast result of `of_device_get_match_data()` to a uintptr_t to silence the above warning for clang builds using W=1 Link: https://github.com/ClangBuiltLinux/linux/issues/1910Reported-by:
Nathan Chancellor <nathan@kernel.org> Signed-off-by:
Justin Stitt <justinstitt@google.com> Acked-by:
Manivannan Sadhasivam <mani@kernel.org> Link: https://lore.kernel.org/r/20230816-void-drivers-dma-owl-dma-v1-1-a0a5e085e937@google.comSigned-off-by:
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Yue Haibing authored
Commit c05257b5 ("dmanegine: idxd: open code the dsa_drv registration") removed idxd_{un}register_driver() definitions but not the declarations. Commit 034b3290 ("dmaengine: idxd: create idxd_device sub-driver") declared idxd_{un}register_idxd_drv() but never implemented it. Commit 8f47d1a5 ("dmaengine: idxd: connect idxd to dmaengine subsystem") declared idxd_parse_completion_status() but never implemented it. Signed-off-by:
Yue Haibing <yuehaibing@huawei.com> Reviewed-by:
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- 01 Aug, 2023 7 commits
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Varshini Rajendran authored
Add compatible for sam9x7. Signed-off-by:
Varshini Rajendran <varshini.rajendran@microchip.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230728102451.265869-1-varshini.rajendran@microchip.comSigned-off-by:
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Christophe JAILLET authored
Use struct_size() instead of hand-writing it, when allocating a structure with a flex array. This is less verbose, more robust and more informative. Signed-off-by:
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Rob Herring authored
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by:
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Fenghua Yu authored
WQ Advanced Translation Service (ATS) can be controlled only when WQ ATS is supported. The sysfs ATS disable knob should be visible only when the features is supported. Signed-off-by:
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Fenghua Yu authored
The functions that check if WQ attributes are invisible are almost duplicate. Define a helper to simplify these functions and future WQ attribute visibility checks as well. Signed-off-by:
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Uros Bizjak authored
Use local64_try_cmpxchg instead of local64_cmpxchg (*ptr, old, new) == old in perfmon_pmu_event_update. x86 CMPXCHG instruction returns success in ZF flag, so this change saves a compare after cmpxchg (and related move instruction in front of cmpxchg). Also, try_cmpxchg implicitly assigns old *ptr value to "old" when cmpxchg fails. There is no need to re-read the value in the loop. No functional change intended. Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by:
Uros Bizjak <ubizjak@gmail.com> Reviewed-by:
Tom Zanussi <tom.zanussi@linux.intel.com> Link: https://lore.kernel.org/r/20230703145346.5206-1-ubizjak@gmail.comSigned-off-by:
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Fabio Estevam authored
The i.MX3 IPU driver does not support devicetree and i.MX has been converted to a DT-only platform since kernel 5.10. As there is no user for this driver anymore, just remove it. Signed-off-by:
Fabio Estevam <festevam@denx.de> Reviewed-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20230729192945.1217206-1-festevam@gmail.comSigned-off-by:
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- 12 Jul, 2023 14 commits
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Zong Li authored
As following patches, xilinx dma is also now architecture agnostic, and it can be compiled for several architectures. We have verified the CDMA on RISC-V platform, let's remove the ARCH dependency list instead of adding new ARCH. To avoid breaking the s390 build, add a dependency on HAS_IOMEM. 'e8b6c54f ("net: xilinx: temac: Relax Kconfig dependencies")' 'd7eaf962 ("net: axienet: In kconfig remove arch dependency for axi_emac")' Signed-off-by:
Zong Li <zong.li@sifive.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Suggested-by:
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Christophe JAILLET authored
dma_alloc_coherent() already clear the allocated memory, there is no need to explicitly call memset(). Signed-off-by:
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Rex Zhang authored
Modify the sysfs attribute description in ABI/stable documentation for the attribute /sys/bus/dsa/devices/dsa0/pasid_enabled. Signed-off-by:
Rex Zhang <rex.zhang@intel.com> Acked-by:
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Rex Zhang authored
Kernel PASID and user PASID are separately enabled. User needs to know the user PASID enabling status to decide how to use IDXD device in user space. This is done via the attribute /sys/bus/dsa/devices/dsa0/pasid_enabled. It's unnecessary for user to know the kernel PASID enabling status because user won't use the kernel PASID. But instead of showing the user PASID enabling status, the attribute shows the kernel PASID enabling status. Fix the issue by showing the user PASID enabling status in the attribute. Fixes: 42a1b738 ("dmaengine: idxd: Separate user and kernel pasid enabling") Signed-off-by:
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Johan Hovold authored
The runtime PM state must be updated while runtime PM is disabled for the change to take effect. Drop the bogus pm_runtime_set_active() which left the PM state set to suspended (as it should be or the clock would not be enabled when the device is resumed). Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20230622075150.885-1-johan+linaro@kernel.orgSigned-off-by:
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Krzysztof Kozlowski authored
The BAM DMA resources can be controlled remotely (e.g. by trusted environment; needs qcom,powered-remotely or qcom,controlled-remotely properties) or locally. In the latter case we need to provide its clock. Require one of methods of such control to properly validate DTS. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230626145645.646136-1-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Stefan Wahren authored
Convert the DT binding document for bcm2835-dma from .txt to YAML. Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by:
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Bhupesh Sharma authored
Since SM8250 BAM DMA engine supports six iommu entries, increase the maxItems in the iommu property section, without which 'dtbs_check' would throw errors. Acked-by:
Anders Roxell <anders.roxell@linaro.org> Tested-by:
Linux Kernel Functional Testing <lkft@linaro.org> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Link: https://lore.kernel.org/r/20230630082230.2264698-3-bhupesh.sharma@linaro.orgSigned-off-by:
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Bhupesh Sharma authored
Add new compatible for BAM DMA engine version v1.7.4 which is found on Qualcomm SM6115 and QCM2290 SoCs. Since its very similar to v1.7.0 used on SM8150 like SoCs, mark the comptible scheme accordingly. While at it, also update qcom,bam-dma bindings to add comments which describe the BAM DMA versions used in SM8150 and SM8250 SoCs. This provides an easy reference for identifying the actual BAM DMA version available on Qualcomm SoCs. Acked-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
Yangtao Li <frank.li@vivo.com> Reviewed-by:
Amelie Delaunay <amelie.delaunay@foss.st.com> Tested-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
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