1. 15 May, 2020 1 commit
    • Linus Walleij's avatar
      Merge tag 'intel-pinctrl-v5.8-1' of... · 98a09fb4
      Linus Walleij authored
      Merge tag 'intel-pinctrl-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel
      
      intel-pinctrl for v5.8-1
      
      * Introduce GPIO driver for Jasper Lake
      * Fix long standing bug in Sunrisepoint-H PAD locking code
      * Enable pin configuration setting for GPIO chip for Baytrail
      * Work around race condition in Cherriview hardware when handle IRQ
      * Clean up Cherryview code to be closer to other drivers
      
      The following is an automated git shortlog grouped by driver:
      
      baytrail:
       -  Use platform_get_irq_optional() explicitly
       -  Enable pin configuration setting for GPIO chip
      
      cannonlake:
       -  Use generic flag for special GPIO base treatment
      
      cherryview:
       -  Add missing spinlock usage in chv_gpio_irq_handler
       -  Use GENMASK() consistently
       -  Re-use data structures from pinctrl-intel.h (part 2)
      
      icelake:
       -  Use generic flag for special GPIO base treatment
      
      intel:
       -  Move npins closer to pin_base in struct intel_community
       -  Update description in struct intel_community
       -  Add Intel Jasper Lake pin controller support
       -  Introduce new flag to force GPIO base to be 0
       -  Introduce common flags for GPIO mapping scheme
      
      lynxpoint:
       -  Use platform_get_irq_optional() explicitly
      
      sunrisepoint:
       -  Fix PAD lock register offset for SPT-H
      
      tigerlake:
       -  Use generic flag for special GPIO base treatment
      98a09fb4
  2. 12 May, 2020 5 commits
  3. 08 May, 2020 1 commit
  4. 28 Apr, 2020 9 commits
  5. 22 Apr, 2020 2 commits
  6. 20 Apr, 2020 2 commits
  7. 17 Apr, 2020 3 commits
  8. 16 Apr, 2020 16 commits
  9. 15 Apr, 2020 1 commit