- 23 Sep, 2022 6 commits
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Arnd Bergmann authored
Merge tag 'sunxi-dt-for-6.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt - Allwinner A100 DMA node - Allwinner H6 GPU devfreq scaling - sunxi sram bindings cleanup and D1 addition * tag 'sunxi-dt-for-6.1-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: dt-bindings: sram: sunxi-sram: Add D1 compatible string dt-bindings: sram: sunxi-sram: Clean up the compatible lists arm64: dts: allwinner: beelink-gs1: Enable GPU OPP arm64: dts: allwinner: h6: Add GPU OPP table arm64: dts: allwinner: h6: Add cooling map for GPU arm64: dts: allwinner: a100: Add I2C DMA requests arm64: dts: allwinner: a100: Add device node for DMA controller Link: https://lore.kernel.org/r/YyePKDnOeP8Tdt5n@kista.localdomainSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'imx-dt64-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree change for 6.1: - New board support: i.MX8DXL EVK, Kontron SL/BL i.MX8MM OSM-S, i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board, NXP LS2081ARDB. - Update i.MX8MQ device tree to use generic name 'dma-controller' for SDMA. - A number of i.MX8ULP device tree improvements and updates: correct parent clock of LPI2C & LPSPI, increase the clock speed of LPSPI, add PMU and mailbox device, drop undocumented CGC property, enable FEC, etc. - Add interconnect property for various i.MX8MP blk-ctrl devices. - Enable VPU PGC, blk-ctrl and PCIe support for i.MX8MP SoC. - A set of changes from Peng Fan to add various devices for i.MX93 SoC, including MU, blk-ctrl, PMU, LPI2C, LPSPI, SRC, etc. - Two set of changes to update LS1043A and LS1046A device trees on various aspects, including USB3, PCIe, DMA, mdio-mux, QSPI Flash, etc. - Board imx8mq-librem5 update: add USB role switching, add RGB PWM notification LEDs, add voice coil motor for focus control, fix MIPI_CSI description. - A series from Frieder Schrempf to improve imx8mm-kontron device trees for VSELECT switch, DDRC operating point, SPI NOR partition layout etc. - A set of display and PMIC related additions and improvements on imx8mm-verdin board. - A number of i.MX8M Plus DHCOM PDK2 device tree improvments from Marek Vasut. - A few imx8mp-venice device tree updates on USB, cpufreq and WiFi/BT. - A series from Vladimir Oltean to enable multiple switch CPU ports support. - Other small and random board specific updates. * tag 'imx-dt64-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (90 commits) arm64: dts: ls1046a-qds: Modify the qspi flash frequency arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGA arm64: dts: ls1046a: add gpios based i2c recovery information arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma size arm64: dts: ls1046a: make dma-coherent global to the SoC arm64: dts: ls1046a: add missing dma ranges property arm64: dts: ls1046a: Add big-endian property for PCIe nodes arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node arm64: dts: ls1043a-rdb: add pcf85263 rtc node arm64: dts: ls1043a-qds: add mmio based mdio-mux support arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size arm64: dts: ls1043a: add gpio based i2c recovery information arm64: dts: ls1043a: make dma-coherent global to the SoC arm64: dts: ls1043a: add missing dma ranges property arm64: dts: ls1043a: Add big-endian property for PCIe nodes arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes arm64: dts: ls1043a: use pcie aer/pme interrupts arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node arm64: dts: ls1043a: fix the wrong size of dcfg space ... Link: https://lore.kernel.org/r/20220918092806.2152700-4-shawnguo@kernel.orgSigned-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linuxArnd Bergmann authored
i.MX device tree change for 6.1 - A series from Alexander Stein to add missing properties for i.MX6 SRAM. - Drop 'interrupts' property when 'interrupts-extended' is present. This fixes a dtbs_check warning with i.MX6 DT. - Update device trees to use generic name 'dma-controller' for SDMA. - A set of changes from Krzysztof Kozlowski to align SPI, LED and gpio-keys node name with dtschema. - A series of indentation and white-space cleanups from Marcel Ziswiler to address various checkpatch warnings. - Add DDR pinmux defines to VF610 DT header. - A couple of changes from Peng Fan to update clock-names and add IPG clock for i.MX7ULP LPI2C devices. - Improve device tree structure for Kontron i.MX6UL/ULL based boards. - A series of changes from Tim Harvey to add CAN regulator for Gateworks i.MX6QDL boards. - Various small and random board specific updates. * tag 'imx-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (40 commits) ARM: dts: imx6qdl-gw54xx: add CAN regulator ARM: dts: imx6qdl-gw53xx: add CAN regulator ARM: dts: imx6qdl-gw52xx: add CAN regulator ARM: dts: imx: update sdma node name format ARM: dts: imx6: skov: migrate to resistive-adc-touch ARM: dts: imx6sx-udoo-neo: don't use multiple blank lines ARM: dts: imx6sl: use tabs for code indent ARM: dts: imx6sx: add missing properties for sram ARM: dts: imx6sll: add missing properties for sram ARM: dts: imx6sl: add missing properties for sram ARM: dts: imx6qp: add missing properties for sram ARM: dts: imx6dl: add missing properties for sram ARM: dts: imx6q: add missing properties for sram ARM: dts: imx7ulp: Add IPG clock for lpi2c ARM: dts: imx7ulp: update the LPI2C clock-names ARM: dts: vf610: ddr pinmux ARM: dts: imx6qdl-dhcom: Move IPU iomux node from PDK2 to SoM file ARM: dts: imx6ul-kontron: Add imx6ull-kontron-bl to Makefile ARM: dts: imx6ul-kontron: Simplify devicetree structure ARM: dts: vf610: align SPI node name with dtschema ... Link: https://lore.kernel.org/r/20220918092806.2152700-3-shawnguo@kernel.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX DT bindings for 6.1: - Add compatible for new boards: Kontron BL i.MX8MM OSM-S, MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier, i.MX8M Mini Gateworks GW7904 board, i.MX8DXL EVK Board. - Add add interconnect property for i.MX8MP various blk-ctrl devices. - Add i.MX8MP HDMI HDCP and HRV power domain DT IDs. - Add bindings for i.MX93 SRC and MEDIAMIX blk-ctrl. - A minor style fix on i.MX8MM clock binding header. * tag 'imx-bindings-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: imx: update fsl.yaml for imx8dxl dt-bindings: firmware: add missing resource IDs for imx8dxl dt-bindings: arm: Add i.MX8M Mini Gateworks GW7904 board dt-bindings: soc: add i.MX93 mediamix blk ctrl dt-bindings: soc: add i.MX93 SRC dt-bindings: mfd: syscon: Add i.MX93 blk ctrl system registers dt-bindings: arm: fsl: Add MSC SM2S-IMX8PLUS SoM and SM2-MB-EP1 Carrier dt-bindings: arm: fsl: Add Kontron BL i.MX8MM OSM-S board dt-bindings: arm: fsl: Rename compatibles for Kontron i.MX8MM SoM/board dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MM vpu blk ctrl dt-bindings: soc: imx: drop minItems for i.MX8MM vpu blk ctrl dt-bindings: power: imx8mp-power: add HDMI HDCP/HRV dt-bindings: arm: fsl: imx6ul-kontron: Update bindings dt-bindings: clk: imx8mm: don't use multiple blank lines dt-bindings: soc: imx: add interconnect property for i.MX8MP hsio blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MP hdmi blk ctrl dt-bindings: soc: imx: add interconnect property for i.MX8MP media blk ctrl Link: https://lore.kernel.org/r/20220918092806.2152700-1-shawnguo@kernel.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v6.1-rc1 These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin. DMA support is enabled for I2C on a number of SoC generations and the Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi support. Other than that this also contains some minor cleanups and fixes. * tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Add GPCDMA support for Tegra I2C arm64: tegra: Add iommus for HDA on Tegra234 arm64: tegra: Enable HDA node for Jetson AGX Orin arm64: tegra: Add context isolation domains on Tegra234 arm64: tegra: Fixup iommu-map property formatting arm64: dts: tegra: smaug: Add Wi-Fi node arm64: dts: tegra: smaug: Add Bluetooth node arm64: tegra: Enable MGBE on Jetson AGX Orin Developer Kit arm64: tegra: Add MGBE nodes on Tegra234 arm64: tegra: Fix up compatible for Tegra234 GPCDMA arm64: tegra: Enable PCIe slots in P3737-0000 board arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT arm64: tegra: Add regulators required for PCIe Link: https://lore.kernel.org/r/20220916101957.1635854-5-thierry.reding@gmail.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v6.1-rc1 Adds device tree bindings for the MGBE found on Tegra234 SoCs, as well as stream IDs for the shared host1x context devices. * tag 'tegra-for-6.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: Add Host1x context stream IDs on Tegra234 dt-bindings: net: Add Tegra234 MGBE Link: https://lore.kernel.org/r/20220916101957.1635854-4-thierry.reding@gmail.comSigned-off-by:
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- 18 Sep, 2022 2 commits
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Samuel Holland authored
D1 needs to export a register for managing some LDO regulators, so it needs a unique compatible. Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220815041248.53268-3-samuel@sholland.orgSigned-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
Use enumerations where appropriate to combine "const" choices and deduplicate fallback compatible strings. Suggested-by:
Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20220815041248.53268-2-samuel@sholland.orgSigned-off-by:
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- 17 Sep, 2022 32 commits
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https://git.kernel.org/pub/scm/linux/kernel/git/at91/linuxArnd Bergmann authored
AT91 DT for v6.1 #2 It contains: - new SAMA5D3 based board, namely SAMA5D3-EDS - adjustments to pass the DT binding validations - disable AES on some LAN966 based boards as they are reserverd by secure OS * tag 'at91-dt-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: spi: dt-bindings: atmel,at91rm9200-spi: Add DMA related properties ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodes ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1 ARM: dts: at91: sama7g5: Swap rx and tx for spi11 dts: arm: at91: Add SAMA5D3-EDS Board dt-bindings: arm: at91: Add info on SAMA5D3-EDS ARM: dts: lan966x: disable aes Link: https://lore.kernel.org/r/20220916105407.1287452-1-claudiu.beznea@microchip.comSigned-off-by:
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Pankaj Bansal authored
The qspi flash in ls1046a QDS board can operate at 50MHz frequency. Therefore, update the maximum supported freq in dts file. Signed-off-by:
Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by:
Li Yang <leoyang.li@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Li Yang authored
There is mmio based mdio mux function in the FPGA device on ls1046a-qds board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and add simple-mfd as a compatbile for the FPGA node to reflect the multi-function nature of it. Signed-off-by:
Camelia Groza <camelia.groza@nxp.com> Signed-off-by:
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Li Yang authored
Add scl-gpios property for i2c recovery and add SoC specific compatible string for SoC specific fixup. Signed-off-by:
Zhang Ying <ying.zhang22455@nxp.com> Signed-off-by:
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Laurentiu Tudor authored
Wrap the usb and sata controllers in an intermediate simple-bus and use it to constrain the dma address size of these usb controllers to the 40 bits that they generate toward the interconnect. This is required because the SoC uses 48 bits address sizes and this mismatch would lead to smmu context faults because the usb generates 40-bit addresses while the smmu page tables are populated with 48-bit wide addresses. Suggested-by:
Robin Murphy <robin.murphy@arm.com> Signed-off-by:
Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by:
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Li Yang authored
These SoCs are really completely dma coherent in their entirety so add the dma-coherent property at the soc level in the device tree and drop the instances where it's specifically added to a few select devices. Signed-off-by:
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Laurentiu Tudor authored
These chips have a 48-bit address size so make sure that the dma-ranges reflects this. Otherwise the linux kernel's dma sub-system will set the default dma masks to full 64-bit, badly breaking dmas. Signed-off-by:
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Hou Zhiqiang authored
Add the big-endian property for LS1046A PCIe RC nodes. Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by:
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Xiaowei Bao authored
Add the PME interrupt porperty and big-endian property in PCIe EP nodes. Signed-off-by:
Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by:
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Li Yang authored
Enable USB3 HW LPM feature for ls1046a. Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> Signed-off-by:
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Li Yang authored
Add the missing node for rtc device under i2c and fix style problems at the same time. Signed-off-by:
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Li Yang authored
There is mmio based mdio mux function in the FPGA device on ls1043a-qds board. Add the mmio based mdio-mux nodes to ls1043a-qds boards and add simple-mfd as a compatbile for the FPGA node to reflect the multi-function nature of it. Also connect the ethernet interfaces to these phy interfaces. Signed-off-by:
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Laurentiu Tudor authored
Wrap the usb and sata controllers in an intermediate simple-bus and use it to constrain the dma address size of these usb controllers to the 40 bits that they generate toward the interconnect. This is required because the SoC uses 48 bits address sizes and this mismatch would lead to smmu context faults because the usb generates 40-bit addresses while the smmu page tables are populated with 48-bit wide addresses. Suggested-by:
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Li Yang authored
Add scl-gpios property for i2c recovery and add SoC specific compatible string for SoC specific fixup. Signed-off-by:
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Li Yang authored
ls1043a is really completely dma coherent in their entirety so add the dma-coherent property at the soc level in the device tree and drop the instances where it's specifically added to a few select devices. Signed-off-by:
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Laurentiu Tudor authored
ls1043a has a 48-bit address size so make sure that the dma-ranges reflects this. Otherwise the linux kernel's dma sub-system will set the default dma masks to full 64-bit, badly breaking dmas. Signed-off-by:
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Hou Zhiqiang authored
Add the big-endian property for LS1043A PCIe nodes for accessing PEX_LUT and PF register block. Signed-off-by:
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Hou Zhiqiang authored
The LS1043A PCIe controller has some control registers in SCFG block, so add the SCFG phandle for each PCIe controller node. Signed-off-by:
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Li Yang authored
After the binding has been updated to include more specific interrupt definition, update the dts to use the more specific interrupt names. Signed-off-by:
Po Liu <po.liu@nxp.com> Signed-off-by:
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Li Yang authored
Enable USB3 HW LPM feature for ls1043a. Signed-off-by:
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Li Yang authored
The size of the block should be 0x1000 instead of 0x10000. Signed-off-by:
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Pankaj Bansal authored
NXP Erratum A008585 affects A57 core cluster used in LS2085 rev1. However this problem has been fixed in A72 core cluster used in LS2088. Therefore remove the erratum from LS2088A. Keeping it only in LS2085. Signed-off-by:
Sandeep Malik <sandeep.malik@nxp.com> Acked-by:
Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by:
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Biwen Li authored
Specify a channel zero in idle state to avoid enterring tri-stated state for PCA9547. Some information about E-00013: - Description: I2C1 and I2C3 buses are missing pull-up. - Impact: When the PCA954x device is tri-stated, the I2C bus will float. This makes the I2C bus and its associated downstream devices inaccessible. - Hardware fix: Populate resistors R189 and R190 for I2C1 and resistors R228 and R229 for I2C3. - Software fix: Remove the tri-state option from the PCA954x driver(PCA954x always on enable status, specify a channel zero in dts to fix the errata E-00013). Signed-off-by:
Biwen Li <biwen.li@nxp.com> Signed-off-by:
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Priyanka Jain authored
This patch adds support for NXP LS2081ARDB board which has LS2081A SoC. LS2081A SoC is 40-pin derivative of LS2088A SoC. From functional perspective both are same. Hence, LS2088a SoC dtsi file is included from LS2081ARDB dts. Signed-off-by:
Santan Kumar <santan.kumar@nxp.com> Signed-off-by:
Tao Yang <b31903@freescale.com> Signed-off-by:
Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by:
Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by:
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Ioana Radulescu authored
Define PHY nodes on the board. Signed-off-by:
Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by:
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Li Yang authored
Update the cpld node name to be generic board-contrl and add mmio mdio mux nodes from the on-board FPGA. Signed-off-by:
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Tim Harvey authored
Add PCIe support on the Gateworks GW74xx board. While at it, fix the related gpio line names from the previous incorrect values. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
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Shenwei Wang authored
This is to support the EVK (Evaluation Kit Board) for the i.MX8DXL. The patch has enabled the serial console, SD/EMMC interface, and the eqos and fec ethernet network. Signed-off-by:
Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by:
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Shenwei Wang authored
i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. This patch adds the basic support for i.MX8DXL SoC. Signed-off-by:
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Shenwei Wang authored
The ddr-pmu on i.mx8dxl has a different interrupt number. Add a node label to ddr-pmu so that it could be referred and changed in i.mx8dxl dts. Signed-off-by:
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Tim Harvey authored
The GW7904 is based on the i.MX 8M Mini SoC featuring: - LPDDR4 DRAM - eMMC FLASH - microSD connector with UHS support - LIS2DE12 3-axis accelerometer - Gateworks System Controller - IMX8M FEC - 2x RS232 off-board connectors - PMIC - 10x bi-color LED's - 1x miniPCIe socket with PCIe and USB2.0 - 802.3at Class 4 PoE - 10-30VDC input via barrel-jack Signed-off-by:
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Tim Harvey authored
The GW74xx supports an on-board Laird Connectivity Sterling LWB5+ module which uses a Cypress CYW4373W chip to provide 1x1 802.11 a/b/g/n/ac + Bluetooth 5.2. Add the proper device-tree nodes for it. Signed-off-by:
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