1. 11 May, 2020 11 commits
    • Jakub Kicinski's avatar
      Merge branch 'cross-chip-bridging-for-disjoint-dsa-trees' · a6f0b26d
      Jakub Kicinski authored
      Vladimir Oltean says:
      
      ====================
      This series adds support for boards where DSA switches of multiple types
      are cascaded together. Actually this type of setup was brought up before
      on netdev, and it looks like utilizing disjoint trees is the way to go:
      
      https://lkml.org/lkml/2019/7/7/225
      
      The trouble with disjoint trees (prior to this patch series) is that only
      bridging of ports within the same hardware switch can be offloaded.
      After scratching my head for a while, it looks like the easiest way to
      support hardware bridging between different DSA trees is to bridge their
      DSA masters and extend the crosschip bridging operations.
      
      I have given some thought to bridging the DSA masters with the slaves
      themselves, but given the hardware topology described in the commit
      message of patch 4/4, virtually any number (and combination) of bridges
      (forwarding domains) can be created on top of those 3x4-port front-panel
      switches. So it becomes a lot less obvious, when the front-panel ports
      are enslaved to more than 1 bridge, which bridge should the DSA masters
      be enslaved to.
      
      So the least awkward approach was to just create a completely separate
      bridge for the DSA masters, whose entire purpose is to permit hardware
      forwarding between the discrete switches beneath it.
      
      This is a direct resend of v3, which was deferred due to lack of review.
      In the meantime Florian has reviewed and tested some of them.
      
      v1 was submitted here:
      https://patchwork.ozlabs.org/project/netdev/cover/20200429161952.17769-1-olteanv@gmail.com/
      
      v2 was submitted here:
      https://patchwork.ozlabs.org/project/netdev/cover/20200430202542.11797-1-olteanv@gmail.com/
      
      v3 was submitted here:
      https://patchwork.ozlabs.org/project/netdev/cover/20200503221228.10928-1-olteanv@gmail.com/
      ====================
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      a6f0b26d
    • Vladimir Oltean's avatar
      net: dsa: sja1105: implement cross-chip bridging operations · ac02a451
      Vladimir Oltean authored
      sja1105 uses dsa_8021q for DSA tagging, a format which is VLAN at heart
      and which is compatible with cascading. A complete description of this
      tagging format is in net/dsa/tag_8021q.c, but a quick summary is that
      each external-facing port tags incoming frames with a unique pvid, and
      this special VLAN is transmitted as tagged towards the inside of the
      system, and as untagged towards the exterior. The tag encodes the switch
      id and the source port index.
      
      This means that cross-chip bridging for dsa_8021q only entails adding
      the dsa_8021q pvids of one switch to the RX filter of the other
      switches. Everything else falls naturally into place, as long as the
      bottom-end of ports (the leaves in the tree) is comprised exclusively of
      dsa_8021q-compatible (i.e. sja1105 switches). Otherwise, there would be
      a chance that a front-panel switch transmits a packet tagged with a
      dsa_8021q header, header which it wouldn't be able to remove, and which
      would hence "leak" out.
      
      The only use case I tested (due to lack of board availability) was when
      the sja1105 switches are part of disjoint trees (however, this doesn't
      change the fact that multiple sja1105 switches still need unique switch
      identifiers in such a system). But in principle, even "true" single-tree
      setups (with DSA links) should work just as fine, except for a small
      change which I can't test: dsa_towards_port should be used instead of
      dsa_upstream_port (I made the assumption that the routing port that any
      sja1105 should use towards its neighbours is the CPU port. That might
      not hold true in other setups).
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      ac02a451
    • Vladimir Oltean's avatar
      net: dsa: introduce a dsa_switch_find function · 3b7bc1f0
      Vladimir Oltean authored
      Somewhat similar to dsa_tree_find, dsa_switch_find returns a dsa_switch
      structure pointer by searching for its tree index and switch index (the
      parameters from dsa,member). To be used, for example, by drivers who
      implement .crosschip_bridge_join and need a reference to the other
      switch indicated to by the tree_index and sw_index arguments.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      3b7bc1f0
    • Vladimir Oltean's avatar
      net: dsa: permit cross-chip bridging between all trees in the system · f66a6a69
      Vladimir Oltean authored
      One way of utilizing DSA is by cascading switches which do not all have
      compatible taggers. Consider the following real-life topology:
      
            +---------------------------------------------------------------+
            | LS1028A                                                       |
            |               +------------------------------+                |
            |               |      DSA master for Felix    |                |
            |               |(internal ENETC port 2: eno2))|                |
            |  +------------+------------------------------+-------------+  |
            |  | Felix embedded L2 switch                                |  |
            |  |                                                         |  |
            |  | +--------------+   +--------------+   +--------------+  |  |
            |  | |DSA master for|   |DSA master for|   |DSA master for|  |  |
            |  | |  SJA1105 1   |   |  SJA1105 2   |   |  SJA1105 3   |  |  |
            |  | |(Felix port 1)|   |(Felix port 2)|   |(Felix port 3)|  |  |
            +--+-+--------------+---+--------------+---+--------------+--+--+
      
      +-----------------------+ +-----------------------+ +-----------------------+
      |   SJA1105 switch 1    | |   SJA1105 switch 2    | |   SJA1105 switch 3    |
      +-----+-----+-----+-----+ +-----+-----+-----+-----+ +-----+-----+-----+-----+
      |sw1p0|sw1p1|sw1p2|sw1p3| |sw2p0|sw2p1|sw2p2|sw2p3| |sw3p0|sw3p1|sw3p2|sw3p3|
      +-----+-----+-----+-----+ +-----+-----+-----+-----+ +-----+-----+-----+-----+
      
      The above can be described in the device tree as follows (obviously not
      complete):
      
      mscc_felix {
      	dsa,member = <0 0>;
      	ports {
      		port@4 {
      			ethernet = <&enetc_port2>;
      		};
      	};
      };
      
      sja1105_switch1 {
      	dsa,member = <1 1>;
      	ports {
      		port@4 {
      			ethernet = <&mscc_felix_port1>;
      		};
      	};
      };
      
      sja1105_switch2 {
      	dsa,member = <2 2>;
      	ports {
      		port@4 {
      			ethernet = <&mscc_felix_port2>;
      		};
      	};
      };
      
      sja1105_switch3 {
      	dsa,member = <3 3>;
      	ports {
      		port@4 {
      			ethernet = <&mscc_felix_port3>;
      		};
      	};
      };
      
      Basically we instantiate one DSA switch tree for every hardware switch
      in the system, but we still give them globally unique switch IDs (will
      come back to that later). Having 3 disjoint switch trees makes the
      tagger drivers "just work", because net devices are registered for the
      3 Felix DSA master ports, and they are also DSA slave ports to the ENETC
      port. So packets received on the ENETC port are stripped of their
      stacked DSA tags one by one.
      
      Currently, hardware bridging between ports on the same sja1105 chip is
      possible, but switching between sja1105 ports on different chips is
      handled by the software bridge. This is fine, but we can do better.
      
      In fact, the dsa_8021q tag used by sja1105 is compatible with cascading.
      In other words, a sja1105 switch can correctly parse and route a packet
      containing a dsa_8021q tag. So if we could enable hardware bridging on
      the Felix DSA master ports, cross-chip bridging could be completely
      offloaded.
      
      Such as system would be used as follows:
      
      ip link add dev br0 type bridge && ip link set dev br0 up
      for port in sw0p0 sw0p1 sw0p2 sw0p3 \
      	    sw1p0 sw1p1 sw1p2 sw1p3 \
      	    sw2p0 sw2p1 sw2p2 sw2p3; do
      	ip link set dev $port master br0
      done
      
      The above makes switching between ports on the same row be performed in
      hardware, and between ports on different rows in software. Now assume
      the Felix switch ports are called swp0, swp1, swp2. By running the
      following extra commands:
      
      ip link add dev br1 type bridge && ip link set dev br1 up
      for port in swp0 swp1 swp2; do
      	ip link set dev $port master br1
      done
      
      the CPU no longer sees packets which traverse sja1105 switch boundaries
      and can be forwarded directly by Felix. The br1 bridge would not be used
      for any sort of traffic termination.
      
      For this to work, we need to give drivers an opportunity to listen for
      bridging events on DSA trees other than their own, and pass that other
      tree index as argument. I have made the assumption, for the moment, that
      the other existing DSA notifiers don't need to be broadcast to other
      trees. That assumption might turn out to be incorrect. But in the
      meantime, introduce a dsa_broadcast function, similar in purpose to
      dsa_port_notify, which is used only by the bridging notifiers.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      f66a6a69
    • Vladimir Oltean's avatar
      net: bridge: allow enslaving some DSA master network devices · 9eb8eff0
      Vladimir Oltean authored
      Commit 8db0a2ee ("net: bridge: reject DSA-enabled master netdevices
      as bridge members") added a special check in br_if.c in order to check
      for a DSA master network device with a tagging protocol configured. This
      was done because back then, such devices, once enslaved in a bridge
      would become inoperative and would not pass DSA tagged traffic anymore
      due to br_handle_frame returning RX_HANDLER_CONSUMED.
      
      But right now we have valid use cases which do require bridging of DSA
      masters. One such example is when the DSA master ports are DSA switch
      ports themselves (in a disjoint tree setup). This should be completely
      equivalent, functionally speaking, from having multiple DSA switches
      hanging off of the ports of a switchdev driver. So we should allow the
      enslaving of DSA tagged master network devices.
      
      Instead of the regular br_handle_frame(), install a new function
      br_handle_frame_dummy() on these DSA masters, which returns
      RX_HANDLER_PASS in order to call into the DSA specific tagging protocol
      handlers, and lift the restriction from br_add_if.
      Suggested-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Suggested-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Tested-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      9eb8eff0
    • Jakub Kicinski's avatar
      Merge branch 'net-hns3-misc-updates-for-next' · 90d9834e
      Jakub Kicinski authored
      Huazhong Tan says:
      
      ====================
      net: hns3: misc updates for -next
      
      This patchset includes some misc updates for the HNS3 ethernet driver.
      
       #1 & #2 add two cleanups.
       #3 provides an interface for the client to query the CMDQ's status.
       #4 adds a little optimization about debugfs.
       #5 prevents 1000M auto-negotiation off setting.
      ====================
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      90d9834e
    • Yufeng Mo's avatar
      net: hns3: disable auto-negotiation off with 1000M setting in ethtool · 81c287e3
      Yufeng Mo authored
      The 802.3 specification does not specify the behavior of
      auto-negotiation off with 1000M in PHY. Therefore, some PHY
      compatibility issues occur. This patch forbids the setting of
      this unreasonable mode by ethtool in driver.
      Signed-off-by: default avatarYufeng Mo <moyufeng@huawei.com>
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      81c287e3
    • Yufeng Mo's avatar
      net: hns3: optimized the judgment of the input parameters of dump ncl config · b4401a04
      Yufeng Mo authored
      This patch optimizes the judgment of the input parameters of dump ncl
      config by checking the number and value of the input parameters apart.
      It's clearer and more reasonable.
      Signed-off-by: default avatarYufeng Mo <moyufeng@huawei.com>
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      b4401a04
    • Huazhong Tan's avatar
      net: hns3: provide .get_cmdq_stat interface for the client · a4de0228
      Huazhong Tan authored
      This patch provides a new interface for the client to query
      whether CMDQ is ready to work.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      a4de0228
    • Huazhong Tan's avatar
      net: hns3: modify two uncorrect macro names · 4279b4d5
      Huazhong Tan authored
      According to the UM, command 0x0B03 and 0x0B13 are used to
      query the statistics about TX and RX, not the status, so
      modifies the unsuitable macro name of these two command.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      4279b4d5
    • Huazhong Tan's avatar
      net: hns3: remove a redundant register macro definition · 5705b451
      Huazhong Tan authored
      HCLGE_MISC_VECTOR_INT_STS and HCLGE_VECTOR_PF_OTHER_INT_STS_REG
      both represent the misc interrupt status register(0x20800), so
      removes HCLGE_VECTOR_PF_OTHER_INT_STS_REG and replaces it with
      HCLGE_MISC_VECTOR_INT_STS.
      Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
      Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
      5705b451
  2. 10 May, 2020 17 commits
  3. 09 May, 2020 12 commits