Merge tag 'at91-fixes-6.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes

AT91 fixes for 6.0 #2

It contains a fix for LAN966 SoCs that corrects the interrupt
number for internal PHYs.

* tag 'at91-fixes-6.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: lan966x: Fix the interrupt number for internal PHYs

Link: https://lore.kernel.org/r/20220915105833.4159850-1-claudiu.beznea@microchip.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'imx-fixes-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.0, 2nd round:

- A couple of TQMa8MPQL device tree fixes from Alexander Stein on button
  GPIOs and PCF85063 RTC alarm pinctrl.
- Include phy-imx8-pcie.h header in tqma8mqml-mba8mx device tree to fix
  build errors when this SoM dtsi is included on customer carrier boards.
- Remove GPU power domain reset from i.MX8MN device tree to fix
  a sporadical hang seen with GPUMIX powering up.
- Correct CPLD_Dn GPIO label mapping for Toradex Verdin based Menlo
  board.
- Add ARCH_NXP back to defconfig, which was dropped accidentally by
  commit 566e373f ("arm64: Kconfig.platforms: Group NXP platforms
  together").
- Add missing #reset-cells for i.MX8ULP PCC clock controllers.
- Update PMIC voltages for imx8mm-verdin board to fix an issue with one
  Toradex SKU that uses a consumer-grade chip that is capable of going up
  to 1.8GHz at 1.00V.
- A series of imx8mp-venice-gw74xx device tree changes from Tim Harvey
  to fix things on CAN STBY polarity, KSZ9477 CPU uplink port and
  phy-mode.

* tag 'imx-fixes-6.0-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation
  arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
  arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
  arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header
  arm64: defconfig: enable ARCH_NXP
  arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm
  arm64: dts: imx8mm-verdin: extend pmic voltages
  arm64: dts: imx8ulp: add #reset-cells for pcc
  arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
  arm64: dts: imx8mn: remove GPU power domain reset
  arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Since commit 65ac79e1 ("net: dsa: microchip: add the phylink
get_caps") the phy-mode must be set otherwise the switch driver will
assume "NA" mode and invalidate the port.

Fixes: 7899eb6c ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

According to the datasheet the interrupts for internal PHYs are
80 and 81.

Fixes: 6ad69e07 ("ARM: dts: lan966x: add MIIM nodes")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220912192629.461452-1-horatiu.vultur@microchip.com

The CPU uplink port on the KSZ9477 is P5 not P6 - fix this.

Fixes: 7899eb6c ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The CAN STBY poarlity is active-low. Specify it as such by removing the
'enable-active-high' property and updating the gpio property.

Fixes: 7899eb6c ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Emails to Leonard Crestez bounce ("550 5.4.1 Recipient address rejected:
Access denied:), so change maintainer to Peng Fan from NXP.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220817065946.24303-2-krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20220909153037.824092-1-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'v6.0-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Drop some not-specified properties, fix phy-supply properties,
fix edp clock on Gru, fix usb port on BPI-R2-Pro, fix license typo,
fix wlan-wake-pin on Gru-Bob and lower the sd-card speed on Quartz64-B

* tag 'v6.0-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Remove 'enable-active-low' from rk3566-quartz64-a
  arm64: dts: rockchip: Remove 'enable-active-low' from rk3399-puma
  arm64: dts: rockchip: fix property for usb2 phy supply on rk3568-evb1-v10
  arm64: dts: rockchip: fix property for usb2 phy supply on rock-3a
  arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
  arm64: dts: rockchip: fix upper usb port on BPI-R2-Pro
  arm64: dts: rockchip: Fix typo in lisense text for PX30.Core
  arm64: dts: rockchip: Pull up wlan wake# on Gru-Bob
  arm64: dts: rockchip: Lower sd speed on quartz64-b

Link: https://lore.kernel.org/r/2645885.mvXUDI8C0e@philSigned-off-by: Arnd Bergmann <arnd@arndb.de>

imx8mm-tqma8mqml.dtsi has PCIe support, so it should include
<dt-bindings/phy/phy-imx8-pcie.h>.

Otherwise, there are build errors when this SoM dtsi is included
on customers' carrier boards.

While at it, remove the PCI header from imx8mm-tqma8mqml-mba8mx.dts,
which is now unneeded.

Fixes: 1d842831 ("arm64: dts: tqma8mqml: add PCIe support")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Commit 566e373f ("arm64: Kconfig.platforms: Group NXP platforms
together") introduced a new symbol ARCH_NXP and made ARCH_LAYERSCAPE
(among others) depend on it, but didn't enable it in the defconfig.
Thus, now the defconfig doesn't include support for any NXP
architectures anymore. Fix it.

Fixes: 566e373f ("arm64: Kconfig.platforms: Group NXP platforms together")
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Although the RTC is on the module, the RTC_EVENT# signal is connected
on the mainboard. Already set by bootloader, but make it explicit in Linux
as well.

Fixes: 418d1d84 ("arm64: dts: freescale: add initial device tree for TQMa8MPQL with i.MX8MP")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Driver moxart-mmc.c has .compatible = "moxa,moxart-mmc".

But moxart .dts/.dtsi and the documentation file moxa,moxart-dma.txt
contain compatible = "moxa,moxart-sdhci".

Change moxart .dts/.dtsi files and moxa,moxart-dma.txt to match the driver.

Replace 'sdhci' with 'mmc' in names too, since SDHCI is a different
controller from FTSDC010.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Link: https://lore.kernel.org/r/20220907175341.1477383-1-saproj@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'scmi-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

Arm SCMI fixes for v6.0

Few fixes addressing possible out of bound access violations by
hardening them, incorrect asynchronous resets by restricting them,
incorrect SCMI tracing message format by harmonizing them, missing
kernel-doc in optee transport, missing SCMI PM driver remove
routine by adding it to avoid warning when scmi driver is unloaded
and finally improve checks in the info_get operations.

* tag 'scmi-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: arm_scmi: Harmonize SCMI tracing message format
  firmware: arm_scmi: Add SCMI PM driver remove routine
  firmware: arm_scmi: Fix the asynchronous reset requests
  firmware: arm_scmi: Harden accesses to the reset domains
  firmware: arm_scmi: Harden accesses to the sensor domains
  firmware: arm_scmi: Improve checks in the info_get operations
  firmware: arm_scmi: Fix missing kernel-doc in optee

Link: https://lore.kernel.org/r/20220829174435.207911-1-sudeep.holla@arm.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Currently, we limited the voltages from the PMIC very strictly. This
causes an issue with one Toradex SKU that uses a consumer-grade chip
that is capable of going up to 1.8GHz at 1.00V.

Extend the ranges to min/max values of the SoC operating ranges (table
10) in the datasheet. Detailed explanation as follows:

BUCK2:
  - As already described above, the SKU with the consumer-grade chip
    needs a voltage of at least 1.00V. 1.05V is chosen now as this is
    listed as the maximum. Both industrial and consumer-grade chips have
    an absolute maximum rating of 1.15V which makes it still safe to put
    1.05V
  - Lower the regulator-min value to the smallest value allowed from the
    Quad-A53, 1.2GHz version of the SoC

BUCK3:
  - This regulator is used for SoC input voltages VDD_GPU, VDD_VPU and
    VDD_DRAM.
  - Use the smallest value of these three inputs as the regulator-min
  - Use the largest value of these three inputs as the regulator-max

LDO2:
  - This LDO is used for VDD_SNVS_0P8 SoC input voltage. As this has a
    single nominal input voltage just put this in the middle of 0.8V.

Fixes: 6a57f224 ("arm64: dts: freescale: add initial support for verdin imx8m mini")
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The 'enable-active-low' property is not a valid one.

Only 'enable-active-high' is valid, and when this property is absent
the gpio regulator will act as active low by default.

Remove the invalid 'enable-active-low' property.

Fixes: b33a22a1 ("arm64: dts: rockchip: add basic dts for Pine64 Quartz64-A")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20220827175140.1696699-2-festevam@denx.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The 'enable-active-low' property is not a valid one.

Only 'enable-active-high' is valid, and when this property is absent
the gpio regulator will act as active low by default.

Remove the invalid 'enable-active-low' property.

Fixes: 2c66fc34 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://lore.kernel.org/r/20220827175140.1696699-1-festevam@denx.deSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The property "vbus-supply" was copied from the vendor kernel but is not
available in mainstream. Use correct property "phy-supply".

Fixes: d6cfb110 ("arm64: dts: rockchip: add usb3 support to rk3568-evb1-v10")
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220905064335.104650-2-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The property "vbus-supply" was copied from the vendor kernel but is not
available in mainstream. Use correct property "phy-supply".

Fixes: 254a1f6a ("arm64: dts: rockchip: add usb3 support to the radxa rock3 model a")
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220905064335.104650-1-michael.riesch@wolfvision.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The binding file clock/imx8ulp-pcc-clock.yaml indicates '#reset-cells'
is a required property, add it.

Fixes: fe6291e9 ("arm64: dts: imx8ulp: Add the basic dtsi file for imx8ulp")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

They were in wrong order, so fix it by switching them.

Fixes: 418d1d84 ("arm64: dts: freescale: add initial device tree for TQMa8MPQL with i.MX8MP")
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

The PGC (power gating controller) already handles the reset for the
GPUMIX power domain. By specifying it within the device tree the reset
it issued a 2nd time. This confuses the hardware during power up and
sporadically hangs the SoC. Fix this by removing the reset property and
let the hardware handle the reset.

Fixes: 9a0f3b15 ("arm64: dts: imx8mn: Enable GPU")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

We've found the AUX channel to be less reliable with PCLK_EDP at a
higher rate (typically 25 MHz). This is especially important on systems
with PSR-enabled panels (like Gru-Kevin), since we make heavy, constant
use of AUX.

According to Rockchip, using any rate other than 24 MHz can cause
"problems between syncing the PHY an PCLK", which leads to all sorts of
unreliabilities around register operations.

Fixes: d67a38c5 ("arm64: dts: rockchip: move core edp from rk3399-kevin to shared chromebook")
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Link: https://lore.kernel.org/r/20220830131212.v2.1.I98d30623f13b785ca77094d0c0fd4339550553b6@changeidSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The CPLD_Dn GPIO assignment between SoM and CPLD has now been clarified
in schematic and the assignment is reversed. Update the DT to match the
hardware.

Fixes: 510c527b ("arm64: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo board")
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Merge tag 'renesas-fixes-for-v6.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/fixes

Renesas fixes for v6.0

  - Fix the serial console on the Renesas White Hawk development board.

* tag 'renesas-fixes-for-v6.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a779g0: Fix HSCIF0 interrupt number

Link: https://lore.kernel.org/r/ab2866f12ca18747413ba41409231d44e0c6149b.1662111547.git.geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'at91-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes

AT91 fixes for 6.0

It contains:
- fixes for self-refresh on SAMA7G5 while in AT91 power management modes:
  one disabling a DDR PHY controller DLL which has been proved to be buggy
  and can introduce glitches that can cause unexpected behavior; one
  fixing the DDR PHY recalibration which cannot work for all possible
  cases (due to hardware bug) while using backup and self-refresh AT91
  power management mode;
- one defconfig fix to remove CONFIG_MICROCHIP_PIT64B from all AT91
  defconfigs;
- multiple device tree fixes for regulators to avoid having some of them
  enabled all the time and to describe min and max output ranges
  according to board capabilities.

* tag 'at91-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d2_icp: don't keep vdd_other enabled all the time
  ARM: dts: at91: sama5d27_wlsom1: don't keep ldo2 enabled all the time
  ARM: dts: at91: sama7g5ek: specify proper regulator output ranges
  ARM: dts: at91: sama5d2_icp: specify proper regulator output ranges
  ARM: dts: at91: sama5d27_wlsom1: specify proper regulator output ranges
  ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh
  ARM: at91: pm: fix self-refresh for sama7g5
  ARM: configs: at91: remove CONFIG_MICROCHIP_PIT64B

Link: https://lore.kernel.org/r/20220902085744.4193554-1-claudiu.beznea@microchip.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

The soc/fsl/dpio driver will perform a soc_device_match()
to determine the optimal cache settings for a given CPU core.

If FSL_GUTS is not enabled, this search will fail and
the driver will not configure cache stashing for the given
DPIO, and a string of "unknown SoC" messages will appear:

fsl_mc_dpio dpio.7: unknown SoC version
fsl_mc_dpio dpio.6: unknown SoC version
fsl_mc_dpio dpio.5: unknown SoC version

Fixes: 51da14e9 ("soc: fsl: dpio: configure cache stashing destination")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220901052149.23873-2-matt@traverse.com.au'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

This pull request contains Broadcom SoCs driver fixes for 6.0, please
pull the following:

- Liang fixes the legacy Broadcom STB ARM system suspend/resume code
error paths that were leaking ioremap() and other of_* operations

* tag 'arm-soc/for-6.0/drivers-fixes' of https://github.com/Broadcom/stblinux:
  soc: brcmstb: pm-arm: Fix refcount leak and __iomem leak bugs

Link: https://lore.kernel.org/r/20220829225103.753223-2-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
6.0, please pull the following:

- William fixes a number of the recently submitted DTS files for 63178,
6846, 6878 to have correct PSCI node propertie as well as correct timer
CPU masks

* tag 'arm-soc/for-6.0/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: bcmbca: bcm6878: cosmetic change
  ARM: dts: bcmbca: bcm6878: fix timer node cpu mask flag
  ARM: dts: bcmbca: bcm6846: fix interrupt controller node
  ARM: dts: bcmbca: bcm6846: clean up psci node
  ARM: dts: bcmbca: bcm6846: fix timer node cpu mask flag
  ARM: dts: bcmbca: bcm63178: cosmetic change
  ARM: dts: bcmbca: bcm63178: fix interrupt controller node
  ARM: dts: bcmbca: bcm63178: clean up psci node
  ARM: dts: bcmbca: bcm63178: fix timer node cpu mask flag

Link: https://lore.kernel.org/r/20220829225103.753223-1-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'juno-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes

Armv8 Juno fixes for v6.0

Couple of fixes to add missing MHU secure-irq and remove the legacy
coresight 'slave-mode' property.

* tag 'juno-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: juno: Add missing MHU secure-irq
  arm64: dts: arm: juno: Remove legacy Coresight 'slave-mode' property

Link: https://lore.kernel.org/r/20220829174420.207880-1-sudeep.holla@arm.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

VDD_OTHER is not connected to any on board consumer thus it is not
needed to keep it enabled all the time.

Fixes: 68a95ef7 ("ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-9-claudiu.beznea@microchip.com

ldo2 is not used by any consumer on sama5d27_wlsom1 board, thus
don't keep it enabled all the time.

Fixes: 5d4c3cfb ("ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-8-claudiu.beznea@microchip.com

Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.

Fixes: 7540629e ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-7-claudiu.beznea@microchip.com

Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.

Fixes: 68a95ef7 ("ARM: dts: at91: sama5d2-icp: add SAMA5D2-ICP")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-6-claudiu.beznea@microchip.com

Min and max output ranges of regulators need to satisfy board
requirements not PMIC requirements. Thus adjust device tree to
cope with this.

Fixes: 5d4c3cfb ("ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-5-claudiu.beznea@microchip.com

On SAMA7G5, when resuming from backup and self-refresh, the bootloader
performs DDR PHY recalibration by restoring the value of ZQ0SR0 (stored
in RAM by Linux before going to backup and self-refresh). It has been
discovered that the current procedure doesn't work for all possible values
that might go to ZQ0SR0 due to hardware bug. The workaround to this is to
avoid storing some values in ZQ0SR0. Thus Linux will read the ZQ0SR0
register and cache its value in RAM after processing it (using
modified_gray_code array). The bootloader will restore the processed value.

Fixes: d2d4716d ("ARM: at91: pm: save ddr phy calibration data to securam")
Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-4-claudiu.beznea@microchip.com

It has been discovered that on some parts, from time to time, self-refresh
procedure doesn't work as expected. Debugging and investigating it proved
that disabling AC DLL introduce glitches in RAM controllers which
leads to unexpected behavior. This is confirmed as a hardware bug. DLL
bypass disables 3 DLLs: 2 DX DLLs and AC DLL. Thus, keep only DX DLLs
disabled. This introduce 6mA extra current consumption on VDDCORE when
switching to any ULP mode or standby mode but the self-refresh procedure
still works.

Fixes: f0bbf179 ("ARM: at91: pm: add self-refresh support for sama7g5")
Suggested-by: Frederic Schumacher <frederic.schumacher@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Cristian Birsan <cristian.birsan@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-3-claudiu.beznea@microchip.com

In brcmstb_pm_probe(), there are two kinds of leak bugs:

(1) we need to add of_node_put() when for_each__matching_node() breaks
(2) we need to add iounmap() for each iomap in fail path

Fixes: 0b741b82 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)")
Signed-off-by: Liang He <windhl@126.com>
Link: https://lore.kernel.org/r/20220707015620.306468-1-windhl@126.comSigned-off-by: Florian Fainelli <f.fainelli@gmail.com>

Since commit f611af4c ("ARM: at91: Kconfig: implement PIT64B selection")
there is no need to explicitly select PIT64B.

Fixes: f611af4c ("ARM: at91: Kconfig: implement PIT64B selection")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220826083927.3107272-2-claudiu.beznea@microchip.com

Various spelling mistakes in comments.
Detected with the help of Coccinelle.
Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220318103729.157574-26-Julia.Lawall@inria.fr
Link: https://lore.kernel.org/r/20220826112153.438829-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tee-fix-for-v6.0' of https://git.linaro.org/people/jens.wiklander/linux-tee into arm/fixes

Add a missing include in the TEE subsystem

* tag 'tee-fix-for-v6.0' of https://git.linaro.org/people/jens.wiklander/linux-tee:
  tee: fix compiler warning in tee_shm_register()

Link: https://lore.kernel.org/r/YwdHcdEUib7obbbW@jadeSigned-off-by: Arnd Bergmann <arnd@arndb.de>