- 05 Jun, 2024 4 commits
-
-
Dmitry Baryshkov authored
The function dp_wait_hpd_asserted() uses pm_runtime_get_sync() and doesn't care about the return value. Potentially this can lead to unclocked access if for some reason resuming of the DP controller fails. Change the function to use pm_runtime_resume_and_get() and return an error if resume fails. Fixes: e2969ee3 ("drm/msm/dp: move of_dp_aux_populate_bus() to eDP probe()") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/580137/ Link: https://lore.kernel.org/r/20240226223446.4194079-1-dmitry.baryshkov@linaro.org [quic_abhinavk@quicinc.com: resolved trivial conflict while rebase] Signed-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Junhao Xie authored
There are duplicate items in wb2_formats_rgb and wb2_formats_rgb_yuv, which cause weston assertions failed. weston: libweston/drm-formats.c:131: weston_drm_format_array_add_format: Assertion `!weston_drm_format_array_find_format(formats, format)' failed. Signed-off-by:
Junhao Xie <bigfoot@classfun.cn> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Fixes: 8c16b988 ("drm/msm/dpu: introduce separate wb2_format arrays for rgb and yuv") Fixes: 53324b99 ("drm/msm/dpu: add writeback blocks to the sm8250 DPU catalog") Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/596847/ Link: https://lore.kernel.org/r/20240524150128.1878297-2-bigfoot@classfun.cnSigned-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Dmitry Baryshkov authored
In the DPU driver blank IRQ handling is called from a vblank worker and can happen outside of the irq_enable / irq_disable pair. Using the worker makes that completely asynchronous with the rest of the code. Revert commit d13f638c ("drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set") to fix vblank IRQ assignment for CMD DSI panels. Call trace: dpu_encoder_phys_cmd_control_vblank_irq+0x218/0x294 dpu_encoder_toggle_vblank_for_crtc+0x160/0x194 dpu_crtc_vblank+0xbc/0x228 dpu_kms_enable_vblank+0x18/0x24 vblank_ctrl_worker+0x34/0x6c process_one_work+0x218/0x620 worker_thread+0x1ac/0x37c kthread+0x114/0x118 ret_from_fork+0x10/0x20 Fixes: d13f638c ("drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/595065/ Link: https://lore.kernel.org/r/20240522-dpu-revert-ams-v2-1-b37825d708e1@linaro.orgSigned-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Barnabás Czémán authored
The irq_idx is unsigned so it cannot be lower than zero, better to change the condition to check if it is equal with zero. It could not cause any issue because a valid irq index starts from one. Fixes: 5a9d5015 ("drm/msm/dpu: shift IRQ indices by 1") Signed-off-by:
Barnabás Czémán <trabarni@gmail.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/596853/ Link: https://lore.kernel.org/r/20240509-irq_wait-v2-1-b8b687b22cc4@gmail.comSigned-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
- 20 May, 2024 1 commit
-
-
Abhinav Kumar authored
Since commit 5acf4911 ("drm/msm: import gen_header.py script from Mesa"), compilation is broken on machines having python versions older than 3.9 due to dependency on argparse.BooleanOptionalAction. Switch to use simple bool for the validate flag to remove the dependency. Fixes: 5acf4911 ("drm/msm: import gen_header.py script from Mesa") Closes: https://lore.kernel.org/all/CA+G9fYs1ZN2K=UHOjrwRR2JNE-M0nf9iW_Q-YPzVgmW+9daU4Q@mail.gmail.com/Tested-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/593057/ Link: https://lore.kernel.org/r/20240507230440.3384949-1-quic_abhinavk@quicinc.comSigned-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com>
-
- 07 May, 2024 2 commits
-
-
Dmitry Baryshkov authored
We don't need to run the validation of the XML files if we are just compiling the kernel. Skip the validation unless the user enables corresponding Kconfig option. This removes a warning from gen_header.py about lxml being not installed. Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/all/20240409120108.2303d0bd@canb.auug.org.au/Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/592558/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Rob Clark authored
These tables were made non-const in commit 3cba4a2c ("drm/msm/a6xx: Update ROQ size in coredump") in order to avoid powering up the GPU when reading back a devcoredump. Instead let's just stash the count that is potentially read from hw in struct a6xx_gpu_state_obj, and make the tables const again. Signed-off-by:
Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/592699/
-
- 05 May, 2024 2 commits
-
-
Connor Abbott authored
Add an a750 case to the various places where we choose a list of registers. Patchwork: https://patchwork.freedesktop.org/patch/592519/Signed-off-by:
Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592519Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Connor Abbott authored
Use the kgsl-style list of indices, because this is about to change for a750 and we want to reuse the downstream header directly. Patchwork: https://patchwork.freedesktop.org/patch/592520/Signed-off-by:
Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592520Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
- 04 May, 2024 8 commits
-
-
Connor Abbott authored
Update to Mesa commit e82d70d472cc ("freedreno/a7xx: Add A7XX_HLSQ_DP_STR location from kgsl"). Signed-off-by:
Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592518/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Connor Abbott authored
Add A7XX prefixes necessary because we use the same code for dumping a6xx and a7xx, fix register name prefixes for upstream, and use the upstream header. Patchwork: https://patchwork.freedesktop.org/patch/592517/Signed-off-by:
Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592517Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Connor Abbott authored
Import from kgsl commit 809ee24fe560. Signed-off-by:
Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592516/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Konrad Dybcio authored
Add myself as a reviewer for Adreno driver changes. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590705/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Konrad Dybcio authored
The msm driver is.. gigantic and covers display hardware (incl. things concerning (e)DP, DSI, HDMI), as well as the entire lineup of Adreno GPUs (with hw bringup, memory mappings, userspace interaction etc.). Because of that, people listed as M:/R: receive patches concerning drivers for any part of the display block OR the GPU. Separate the latter, as it's both a functionally separate block and is of interest to different folks. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590704/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Konrad Dybcio authored
Calling a6xx_destroy() before adreno_gpu_init() leads to a null pointer dereference on: msm_gpu_cleanup() : platform_set_drvdata(gpu->pdev, NULL); as gpu->pdev is only assigned in: a6xx_gpu_init() |_ adreno_gpu_init |_ msm_gpu_init() Instead of relying on handwavy null checks down the cleanup chain, explicitly de-allocate the LLC data and free a6xx_gpu instead. Fixes: 76efc245 ("drm/msm/gpu: Fix crash during system suspend after unbind") Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/588919/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Zan Dobersek authored
a7xx_submit() should use the a7xx variant of the RBBM_PERFCTR_CP register for retrieving the CP cycles value before and after the submitted command stream execution. Signed-off-by:
Zan Dobersek <zdobersek@igalia.com> Fixes: af66706a ("drm/msm/a6xx: Add skeleton A7xx support") Patchwork: https://patchwork.freedesktop.org/patch/588445/Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
Zan Dobersek authored
In addition to the CP_PERFCTR_CP_SEL register range, allow writes to the CP_BV_PERFCTR_CP_SEL registers in the 0x8e0-0x8e6 range for profiling purposes of tools like fdperf and perfetto. Signed-off-by:
Zan Dobersek <zdobersek@igalia.com> Patchwork: https://patchwork.freedesktop.org/patch/580548/ [fixup a730_protect size] Signed-off-by:
Rob Clark <robdclark@chromium.org>
-
- 23 Apr, 2024 11 commits
-
-
Dmitry Baryshkov authored
Change struct mdp4_plane allocation to use drmm_plane_alloc(). This removes the need to perform any actions on plane destruction. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/546181/ Link: https://lore.kernel.org/r/20230708010407.3871346-17-dmitry.baryshkov@linaro.org
-
Dmitry Baryshkov authored
Change struct mdp5_plane allocation to use drmm_plane_alloc(). This removes the need to perform any actions on plane destruction. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/546167/ Link: https://lore.kernel.org/r/20230708010407.3871346-11-dmitry.baryshkov@linaro.org
-
Aleksandr Mishin authored
In dpu_core_irq_callback_handler() callback function pointer is compared to NULL, but then callback function is unconditionally called by this pointer. Fix this bug by adding conditional return. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: c929ac60 ("drm/msm/dpu: allow just single IRQ callback") Signed-off-by:
Aleksandr Mishin <amishin@t-argos.ru> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/588237/ Link: https://lore.kernel.org/r/20240408085523.12231-1-amishin@t-argos.ruSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Dmitry Baryshkov authored
Now as all subdrivers were converted to use common database of formats, drop the get_format() callback and use mdp_get_format() directly. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590431/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-9-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
Finally remove duplication between DPU and generic MDP code by merging DPU format lists to the MDP format database. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/590435/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-8-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
Instead of having a u8 or bool field unpack_align_msb, convert it to the flag, this save space in the tables and allows us to handle all booleans in the same way. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590427/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-7-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
Instead of having a u8 or bool field unpack_tight, convert it to the flag, this save space in the tables and allows us to handle all booleans in the same way. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590428/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-6-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
Structures dpu_format and mdp_format are largely the same structures. In order to remove duplication between format databases, merge these two stucture definitions into the global struct msm_format. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590434/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-5-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
In preparation to merger of formats databases, pull format flag definitions to mdp_format.h header, so that they are visibile to both dpu and mdp drivers. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/590425/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-4-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
Using bitmap for the flags results in a clumsy syntax on test_bit, replace it with unsigned long type and simple binary ops. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590422/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-3-9e93226cbffd@linaro.org
-
Dmitry Baryshkov authored
MDP4 and MDP5 drivers enumerate supported formats each time the plane is created. In preparation to merger of MDP DPU format databases, define precise formats list, so that changes to the database do not cause the driver to add unsupported format to the list. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590421/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-2-9e93226cbffd@linaro.orgSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
- 22 Apr, 2024 12 commits
-
-
Dmitry Baryshkov authored
Instead of having DPU-specific defines, switch to the definitions from the mdp_common.xml.h file. This is the preparation for merged of DPU and MDP format tables. Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/590420/ Link: https://lore.kernel.org/r/20240420-dpu-format-v2-1-9e93226cbffd@linaro.org
-
Marijn Suijten authored
All other functions in dpu_hw_intf name the "self" parameter `intf`, except dpu_hw_intf_setup_timing_engine() and the recently added dpu_hw_intf_program_intf_cmd_cfg(). Clean that up for consistency. Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589903/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-7-78ae3ee9a697@somainline.orgSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Marijn Suijten authored
Just like the active interface and writeback block in ctl_intf_cfg_v1(), and later the rest of the blocks in followup active-CTL fixes or reworks, multiple calls to this function should enable additional DSC blocks instead of overwriting the blocks that are enabled. This pattern is observed in an active-CTL scenario since DPU 5.0.0 where for example bonded-DSI uses a single CTL to drive multiple INTFs, and each encoder calls this function individually with the INTF (hence the pre-existing update instead of overwrite of this bitmask) and DSC blocks it wishes to be enabled, and expects them to be OR'd into the bitmask. The reverse already exists in reset_intf_cfg_v1() where only specified DSC blocks are removed out of the CTL_DSC_ACTIVE bitmask (same for all other blocks and ACTIVE bitmasks), leaving the rest enabled. Fixes: 77f6da90 ("drm/msm/disp/dpu1: Add DSC support in hw_ctl") Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589902/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-4-78ae3ee9a697@somainline.orgSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Marijn Suijten authored
As we can clearly see in a downstream kernel [1], flushing the slave INTF is skipped /only if/ the PPSPLIT topology is active. However, when DPU was originally submitted to mainline PPSPLIT was no longer part of it (seems to have been ripped out before submission), but this clause was incorrectly ported from the original SDE driver. Given that there is no support for PPSPLIT (currently), flushing the slave INTF should /never/ be skipped (as the `if (ppsplit && !master) goto skip;` clause downstream never becomes true). [1]: https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/display-kernel.lnx.5.4.r1-rel/msm/sde/sde_encoder_phys_cmd.c?ref_type=heads#L1131-1139 Fixes: 25fdd593 ("drm/msm: Add SDM845 DPU support") Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589901/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-3-78ae3ee9a697@somainline.orgSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Marijn Suijten authored
When dual-DSI (bonded DSI) was added in commit ed9976a0 ("drm/msm/dsi: adjust dsi timing for dual dsi mode") some DBG() prints were not updated, leading to print the original mode->clock rather than the adjusted (typically the mode clock divided by two, though more recently also adjusted for DSC compression) msm_host->pixel_clk_rate which is passed to clk_set_rate() just below. Fix that by printing the actual pixel_clk_rate that is being set. Fixes: ed9976a0 ("drm/msm/dsi: adjust dsi timing for dual dsi mode") Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589896/ Link: https://lore.kernel.org/r/20240417-drm-msm-initial-dualpipe-dsc-fixes-v1-1-78ae3ee9a697@somainline.orgSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Dmitry Baryshkov authored
Instead of having two functions, msm_dsi_manager_bridge_init() and msm_dsi_manager_ext_bridge_init(), merge them into msm_dsi_manager_connector_init(), moving drm_bridge_attach() to be called from the bridge's attach callback (as most other bridges do). Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582212/ Link: https://lore.kernel.org/r/20240309-fd-dsi-cleanup-bridges-v1-3-962ebdba82ed@linaro.org
-
Dmitry Baryshkov authored
Currently the MSM DSI driver looks for the next bridge during msm_dsi_modeset_init(). If the bridge is not registered at that point, this might result in -EPROBE_DEFER, which can be problematic that late during the device probe process. Move next bridge acquisition to the dsi_bind state so that probe deferral is returned as early as possible. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582210/ Link: https://lore.kernel.org/r/20240309-fd-dsi-cleanup-bridges-v1-2-962ebdba82ed@linaro.org
-
Dmitry Baryshkov authored
All the bridges that are being used with the MSM DSI hosts have been converted to support DRM_BRIDGE_ATTACH_NO_CONNECTOR. Drop the fallback code and require DRM_BRIDGE_ATTACH_NO_CONNECTOR to be supported by the downstream bridges. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/582209/ Link: https://lore.kernel.org/r/20240309-fd-dsi-cleanup-bridges-v1-1-962ebdba82ed@linaro.org
-
Konrad Dybcio authored
Totally useless. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by:
Andrew Halaney <ahalaney@redhat.com> Patchwork: https://patchwork.freedesktop.org/patch/588804/ Link: https://lore.kernel.org/r/20240410-topic-msm_rw-v1-1-e1fede9ffaba@linaro.orgSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Jon Hunter authored
The gen_header.py script is failing for older versions of python3 such as python 3.5. Two issues observed with python 3.5 are ... 1. Python 3 versions prior to 3.6 do not support the f-string format. 2. Early python 3 versions do not support the 'required' argument for the argparse add_subparsers(). Fix both of the above so that older versions of python 3 still work. Fixes: 8f7abf0b86fe ("drm/msm: generate headers on the fly") Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/589427/ Link: https://lore.kernel.org/r/20240412165407.42163-1-jonathanh@nvidia.comSigned-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-
Dmitry Baryshkov authored
Now as the headers are generated during the build step, drop pre-generated copies of the Adreno A6xx header. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585868/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-18-4bdb277a85a1@linaro.org
-
Dmitry Baryshkov authored
As a preparation to removal of a6xx.xml.h, drop the C++ part of the heder, it is not used by the kernel anyway. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/585866/ Link: https://lore.kernel.org/r/20240401-fd-xml-shipped-v5-17-4bdb277a85a1@linaro.org
-