- Add Qualcomm PCIe Endpoint controller driver and DT binding (Manivannan
  Sadhasivam)

- Add qcom struct for device-specific details in match data (Prasad
  Malisetty)

- Switch pcie_1_pipe_clk_src from TCXO to pipe clock after PHY init in
  SC7280 (Prasad Malisetty)

- Add .compatible device ID for SC8180x platform (Bjorn Andersson)

* remotes/lorenzo/pci/qcom:
  PCI: qcom: Add sc8180x compatible
  PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280
  PCI: qcom: Replace ops with struct pcie_cfg in pcie match data
  MAINTAINERS: Add entry for Qualcomm PCIe Endpoint driver and binding
  PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver
  dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller

- Add MediaTek MT7621 SoC PCIe host controller (moved from staging) (Sergio
  Paracuellos)

* pci/host/mt7621:
  MAINTAINERS: Add Sergio Paracuellos as MT7621 PCIe maintainer
  PCI: mt7621: Add MediaTek MT7621 PCIe host controller driver
  dt-bindings: PCI: Add MT7621 SoC PCIe host controller

# Conflicts:
#	drivers/pci/controller/Kconfig
#	drivers/pci/controller/Makefile

- Reorganize to separate out PHY logic (Mauro Carvalho Chehab)

- Add support for external PHY in addition to the internal PHY (Mauro
  Carvalho Chehab)

- Use regmap so both kirin driver and PHY can access APB registers (Mauro
  Carvalho Chehab)

- Add support for per-lane PERST# GPIOs on HiKey970 external PEX 8606 PCI
  bridge (Mauro Carvalho Chehab)

- Add "hisilicon,kirin970-pcie" compatible string (Mauro Carvalho Chehab)

- Add MODULE_* macros (Mauro Carvalho Chehab)

- Allow building as a module (Mauro Carvalho Chehab)

- Add power_off support for Kirin 960 PHY (Mauro Carvalho Chehab)

- Disable clkreq during poweroff sequence (Mauro Carvalho Chehab)

- De-init the dwc driver during remove (Mauro Carvalho Chehab)

- Allow removal of kirin driver (Mauro Carvalho Chehab)

* pci/host/kirin:
  PCI: kirin: Allow removing the driver
  PCI: kirin: De-init the dwc driver
  PCI: kirin: Disable clkreq during poweroff sequence
  PCI: kirin: Move the power-off code to a common routine
  PCI: kirin: Add power_off support for Kirin 960 PHY
  PCI: kirin: Allow building it as a module
  PCI: kirin: Add MODULE_* macros
  PCI: kirin: Add Kirin 970 compatible
  PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge
  PCI: kirin: Use regmap for APB registers
  PCI: kirin: Add support for a PHY layer
  PCI: kirin: Reorganize the PHY logic inside the driver

- Remove unused assignment (Krzysztof Wilczyński)

* remotes/lorenzo/pci/imx6:
  PCI: imx6: Remove unused assignment to variable ret

- Use sysfs_emit() in "show" functions instead of sprintf() to avoid buffer
  overruns (Kunihiko Hayashi)

* remotes/lorenzo/pci/endpoint:
  PCI: endpoint: Use sysfs_emit() in "show" functions

- Export dw_pcie_ep_reset_bar(), dw_pcie_link_up() so more drivers can be
  modular (Luca Ceresoli)

- Allow dra7xx host and endpoint drivers to be modules (Luca Ceresoli)

- Enable dra7xx optional external clock if present (Luca Ceresoli)

- Clean up Kconfig dependencies for PCIE_DW_HOST- and PCIE_DW_EP-based
  drivers (Andy Shevchenko)

- Remove visconti redundant dev_err() after platform_get_irq_byname()
  failure (Krzysztof Wilczyński)

- Run dwc .host_init() method before registering MSI interrupt handler so
  we have a chance to deal with pending interrupts left by bootloader
  (Bjorn Andersson)

- Serialize uniphier INTx masking/unmasking (Kunihiko Hayashi)

* pci/host/dwc:
  PCI: uniphier: Serialize INTx masking/unmasking and fix the bit operation
  PCI: dwc: Perform host_init() before registering msi
  PCI: visconti: Remove surplus dev_err() when using platform_get_irq_byname()
  PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_EP)
  PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_HOST)
  PCI: dra7xx: Get an optional clock
  PCI: dra7xx: Remove unused include
  PCI: dra7xx: Make it a kernel module
  PCI: dwc: Export more symbols to allow modular drivers

- Add Rockchip SoC PCIe controller DT bindings (Simon Xue)

* remotes/lorenzo/pci/dt:
  dt-bindings: rockchip: Add DesignWare based PCIe controller

- Disable PHY when j721e_pcie_probe() fails after initializing it
  (Christophe JAILLET)

- Return success when cdns-pcie probe succeeds instead of doing error
  cleanup (Li Chen)

* pci/host/cadence:
  PCI: cadence: Add cdns_plat_pcie_probe() missing return
  PCI: j721e: Fix j721e_pcie_probe() error path

- Make of_phandle_args_to_fwspec() generally available (Marc Zyngier)

- Allow matching of interrupt-maps local to interrupt controller or PCI
  device (Marc Zyngier)

- Add Apple SoC (e.g., M1) PCIe host controller driver, which enables
  access to USB type-A, Ethernet, Wi-Fi, Bluetooth devices; these require
  additional drivers of their own (Alyssa Rosenzweig)

- Add apple INTx, per-port, and MSI interrupt support (Marc Zyngier)

- Configure apple Requester-ID-to-Stream-ID mapper for IOMMU (DART) support
  (Marc Zyngier)

* pci/host/apple:
  PCI: apple: Configure RID to SID mapper on device addition
  iommu/dart: Exclude MSI doorbell from PCIe device IOVA range
  PCI: apple: Implement MSI support
  PCI: apple: Add INTx and per-port interrupt support
  PCI: apple: Set up reference clocks when probing
  PCI: apple: Add initial hardware bring-up
  PCI: of: Allow matching of an interrupt-map local to a PCI device
  of/irq: Allow matching of an interrupt-map local to an interrupt controller
  irqdomain: Make of_phandle_args_to_fwspec() generally available

- Define macros for PCI_EXP_DEVCTL_PAYLOAD_* (Pali Rohár)

- Set Max Payload Size to 512 bytes per Marvell spec (Pali Rohár)

- Downgrade PIO Response Status messages to debug level (Marek Behún)

- Preserve CRS SV (Config Request Retry Software Visibility) bit in
  emulated Root Control register (Pali Rohár)

- Fix issue in configuring reference clock (Pali Rohár)

- Don't clear status bits for masked interrupts (Pali Rohár)

- Don't mask unused interrupts (Pali Rohár)

- Avoid code repetition in advk_pcie_rd_conf() (Marek Behún)

- Retry config accesses on CRS response (Pali Rohár)

- Simplify emulated Root Capabilities initialization (Pali Rohár)

- Fix several link training issues (Pali Rohár)

- Fix link-up checking via LTSSM (Pali Rohár)

- Fix reporting of Data Link Layer Link Active (Pali Rohár)

- Fix emulation of W1C bits (Marek Behún)

- Fix MSI domain .alloc() method to return zero on success (Marek Behún)

- Read entire 16-bit MSI vector in MSI handler, not just low 8 bits (Marek
  Behún)

- Clear Root Port I/O Space, Memory Space, and Bus Master Enable bits at
  startup; PCI core will set those as necessary (Pali Rohár)

- When operating as a Root Port, set class code to "PCI Bridge" instead of
  the default "Mass Storage Controller" (Pali Rohár)

- Add emulation for PCI_BRIDGE_CTL_BUS_RESET since aardvark doesn't
  implement this per spec (Pali Rohár)

- Add emulation of option ROM BAR since aardvark doesn't implement this per
  spec (Pali Rohár)

* remotes/lorenzo/pci/aardvark:
  PCI: aardvark: Fix support for PCI_ROM_ADDRESS1 on emulated bridge
  PCI: aardvark: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge
  PCI: aardvark: Set PCI Bridge Class Code to PCI Bridge
  PCI: aardvark: Fix support for bus mastering and PCI_COMMAND on emulated bridge
  PCI: aardvark: Read all 16-bits from PCIE_MSI_PAYLOAD_REG
  PCI: aardvark: Fix return value of MSI domain .alloc() method
  PCI: pci-bridge-emul: Fix emulation of W1C bits
  PCI: aardvark: Fix reporting Data Link Layer Link Active
  PCI: aardvark: Fix checking for link up via LTSSM state
  PCI: aardvark: Fix link training
  PCI: aardvark: Simplify initialization of rootcap on virtual bridge
  PCI: aardvark: Implement re-issuing config requests on CRS response
  PCI: aardvark: Deduplicate code in advk_pcie_rd_conf()
  PCI: aardvark: Do not unmask unused interrupts
  PCI: aardvark: Do not clear status bits of masked interrupts
  PCI: aardvark: Fix configuring Reference clock
  PCI: aardvark: Fix preserving PCI_EXP_RTCTL_CRSSVE flag on emulated bridge
  PCI: aardvark: Don't spam about PIO Response Status
  PCI: aardvark: Fix PCIe Max Payload Size setting
  PCI: Add PCI_EXP_DEVCTL_PAYLOAD_* macros

- Tidy setup-irq.c comments (Pranay Sanghai)

- Fix misspellings (Krzysztof Wilczyński)

- Fix sprintf(), sscanf() format mismatches (Krzysztof Wilczyński)

- Tidy cpqphp code formatting (Krzysztof Wilczyński)

- Remove unused pci_pool wrappers, which have been replaced by dma_pool
  (Cai Huoqing)

- Remove a redundant initialization in __pci_reset_function_locked() (Colin
  Ian King)

- Use 'unsigned int' instead of 'unsigned' (Krzysztof Wilczyński)

- Update PCI subsystem information in MAINTAINERS (Krzysztof Wilczyński)

- Include generic <linux/> headers instead of <asm/> for cpqphp and vmd
  (Krzysztof Wilczyński)

* pci/misc:
  PCI: vmd: Drop redundant includes of <asm/device.h>, <asm/msi.h>
  PCI: cpqphp: Use <linux/io.h> instead of <asm/io.h>
  MAINTAINERS: Update PCI subsystem information
  PCI: Prefer 'unsigned int' over bare 'unsigned'
  PCI: Remove redundant 'rc' initialization
  PCI: Remove unused pci_pool wrappers
  PCI: cpqphp: Format if-statement code block correctly
  PCI: Use unsigned to match sscanf("%x") in pci_dev_str_match_path()
  PCI: hv: Remove unnecessary use of %hx
  PCI: Correct misspelled and remove duplicated words
  PCI: Tidy comments

- Add pci_read_vpd_any(), pci_write_vpd_any() to access VPD at arbitrary
  offsets (Heiner Kallweit)

- Use VPD API to replace custom code in cxgb3 driver (Heiner Kallweit)

* pci/vpd:
  cxgb3: Remove seeprom_write and use VPD API
  cxgb3: Use VPD API in t3_seeprom_wp()
  cxgb3: Remove t3_seeprom_read and use VPD API
  PCI/VPD: Use pci_read_vpd_any() in pci_vpd_size()
  PCI/VPD: Add pci_read/write_vpd_any()

- Avoid bus resets on Atheros QCA6174, since they hang (Ingmar Klein)

- Use store and forward mode on Pericom PI7C9X2G switches to avoid ACS
  erratum with ACS P2P Request Redirect (Nathan Rossi)

* pci/virtualization:
  PCI: Add ACS quirk for Pericom PI7C9X2G switches
  PCI: Mark Atheros QCA6174 to avoid bus reset

- Check for CAP_SYS_ADMIN before validating sysfs user input, not after
  (Krzysztof Wilczyński)

- Always return -EINVAL from sysfs "store" functions for invalid user input
  instead of -EINVAL sometimes and -ERANGE others (Krzysztof Wilczyński)

- Use kstrtobool() directly instead of the strtobool() wrapper (Krzysztof
  Wilczyński)

* pci/sysfs:
  PCI: Use kstrtobool() directly, sans strtobool() wrapper
  PCI/sysfs: Return -EINVAL consistently from "store" functions
  PCI/sysfs: Check CAP_SYS_ADMIN before parsing user input

# Conflicts:
#	drivers/pci/iov.c

- Return error to application when command execution fails because an
  out-of-band reset has cleared the device BARs, Memory Space Enable, etc
  (Kelvin Cao)

- Fix MRPC error status handling issue (Kelvin Cao)

- Mask out other bits when reading of management VEP instance ID (Kelvin
  Cao)

- Return EOPNOTSUPP instead of ENOTSUPP from sysfs show functions (Kelvin
  Cao)

- Add check of event support (Logan Gunthorpe)

* pci/switchtec:
  PCI/switchtec: Add check of event support
  PCI/switchtec: Replace ENOTSUPP with EOPNOTSUPP
  PCI/switchtec: Update the way of getting management VEP instance ID
  PCI/switchtec: Fix a MRPC error status handling issue
  PCI/switchtec: Error out MRPC execution when MMIO reads fail

- Coalesce host bridge contiguous apertures to allow P2P bridge windows
  that span several contiguous host bridge apertures (Kai-Heng Feng)

* pci/resource:
  PCI: Coalesce host bridge contiguous apertures

- Don't setup portdrv IRQs if there are no port drivers that use them, to
  conserve vectors and avoid spurious events (Jan Kiszka)

* pci/portdrv:
  PCI/portdrv: Do not setup up IRQs if there are no users

- Apply bus offset correctly in DMA address calculation, which used the
  wrong sign before (Wang Lu)

* pci/p2pdma:
  PCI/P2PDMA: Apply bus offset correctly in DMA address calculation

- Document sysfs "irq" attribute, which contains either the INTx IRQ (the
  intended behavior) or the first MSI IRQ (historical mistake retained for
  backwards compatibility) (Barry Song)

- Rework "irq" sysfs show function to explicitly fetch first MSI IRQ
  instead of depending on core to put it in dev->irq, to enable future core
  cleanup (Barry Song)

* pci/msi:
  PCI/sysfs: Explicitly show first MSI IRQ for 'irq'
  PCI: Document /sys/bus/pci/devices/.../irq

- Ignore Link Down/Up caused by error-induced Hot Reset so endpoint driver
  can remain bound to device during error recovery (Lukas Wunner)

- Remove unused resume err_handler (Lukas Wunner)

- Remove unused pcie_port_bus_{,un}register() declarations (Lukas Wunner)

- Skip compiling err.c when CONFIG_PCIEAER not set (Lukas Wunner)

* pci/hotplug:
  PCI/ERR: Reduce compile time for CONFIG_PCIEAER=n
  PCI/portdrv: Remove unused pcie_port_bus_{,un}register() declarations
  PCI/portdrv: Remove unused resume err_handler
  PCI: pciehp: Ignore Link Down/Up caused by error-induced Hot Reset
  PCI/portdrv: Rename pm_iter() to pcie_port_device_iter()

- Drop the struct pci_dev.driver pointer, which is redundant with the
  struct device.driver pointer (Uwe Kleine-König)

* pci/driver:
  PCI: Remove struct pci_dev->driver
  PCI: Use to_pci_driver() instead of pci_dev->driver
  x86/pci/probe_roms: Use to_pci_driver() instead of pci_dev->driver
  perf/x86/intel/uncore: Use to_pci_driver() instead of pci_dev->driver
  powerpc/eeh: Use to_pci_driver() instead of pci_dev->driver
  usb: xhci: Use to_pci_driver() instead of pci_dev->driver
  cxl: Use to_pci_driver() instead of pci_dev->driver
  cxl: Factor out common dev->driver expressions
  xen/pcifront: Use to_pci_driver() instead of pci_dev->driver
  xen/pcifront: Drop pcifront_common_process() tests of pcidev, pdrv
  nfp: use dev_driver_string() instead of pci_dev->driver->name
  mlxsw: pci: Use dev_driver_string() instead of pci_dev->driver->name
  net: marvell: prestera: use dev_driver_string() instead of pci_dev->driver->name
  net: hns3: use dev_driver_string() instead of pci_dev->driver->name
  crypto: hisilicon - use dev_driver_string() instead of pci_dev->driver->name
  powerpc/eeh: Use dev_driver_string() instead of struct pci_dev->driver->name
  ssb: Use dev_driver_string() instead of pci_dev->driver->name
  bcma: simplify reference to driver name
  crypto: qat - simplify adf_enable_aer()
  scsi: message: fusion: Remove unused mpt_pci driver .probe() 'id' parameter
  PCI/ERR: Factor out common dev->driver expressions
  PCI: Drop pci_device_probe() test of !pci_dev->driver
  PCI: Drop pci_device_remove() test of pci_dev->driver
  PCI: Return NULL for to_pci_driver(NULL)

- Rename pcibios_add_device() to pcibios_device_add() since it's called
  from pci_device_add() (Oliver O'Halloran)

- Don't try to enable AtomicOps on VFs, since they can only be enabled on
  the PF (Selvin Xavier)

* pci/enumeration:
  PCI: Do not enable AtomicOps on VFs
  PCI: Rename pcibios_add_device() to pcibios_device_add()

- Re-enable LTR in Downstream Ports after it has been disabled by reset or
  hotplug to allow use of ASPM L1.2 again and prevent Unsupported Request
  errors when Endpoint sends LTR messages (Mingchuang Qiao)

* pci/aspm:
  PCI: Re-enable Downstream Port LTR after reset or hotplug

- Simplify _OSC negotiation with platform for control of PCIe features
  (Joerg Roedel)

* pci/acpi:
  PCI/ACPI: Check for _OSC support in acpi_pci_osc_control_set()
  PCI/ACPI: Move _OSC query checks to separate function
  PCI/ACPI: Move supported and control calculations to separate functions
  PCI/ACPI: Remove OSC_PCI_SUPPORT_MASKS and OSC_PCI_CONTROL_MASKS

The Pericom PI7C9X2G404/PI7C9X2G304/PI7C9X2G303 PCIe switches have an
erratum for ACS P2P Request Redirect behaviour when used in the cut-through
forwarding mode. The recommended work around for this issue is to use the
switch in store and forward mode. The erratum results in packets being
queued and not being delivered upstream, which can be observed as very poor
downstream device performance and/or dropped device-generated
data/interrupts.

Add a fixup so that when enabling or resuming the downstream port we check
if it has enabled ACS P2P Request Redirect, and if so, change the device
(via the upstream port) to use the store and forward operating mode.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=177471
Link: https://lore.kernel.org/r/20210910025823.196508-1-nathan@nathanrossi.comTested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Nathan Rossi <nathan.rossi@digi.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

The Apple PCIe controller doesn't directly feed the endpoint's Requester ID
to the IOMMU (DART), but instead maps RIDs onto Stream IDs (SIDs). The DART
and the PCIe controller must thus agree on the SIDs that are used for
translation (by using the 'iommu-map' property).

For this purpose, parse the 'iommu-map' property each time a device gets
added, and use the resulting translation to configure the PCIe RID-to-SID
mapper. Similarly, remove the translation if/when the device gets removed.

This is all driven from a bus notifier which gets registered at probe time.
Hopefully this is the only PCI controller driver in the whole system.

[bhelgaas: squash indentation from Zhaoyu Liu <zackary.liu.pro@gmail.com>:
https://lore.kernel.org/r/20211031135544.GA1616@pc]
Link: https://lore.kernel.org/r/20210929163847.2807812-10-maz@kernel.orgTested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sven Peter <sven@svenpeter.dev>

The MSI doorbell on Apple HW can be any address in the low 4GB range.
However, the MSI write is matched by the PCIe block before hitting the
iommu. It must thus be excluded from the IOVA range that is assigned to any
PCIe device.

Link: https://lore.kernel.org/r/20210929163847.2807812-9-maz@kernel.orgTested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sven Peter <sven@svenpeter.dev>

Probe for the 'msi-ranges' property, and implement the MSI support in the
form of the usual two-level hierarchy.

Note that contrary to the wired interrupts, MSIs are shared among all the
ports.

Link: https://lore.kernel.org/r/20210929163847.2807812-8-maz@kernel.orgTested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Add support for the per-port interrupt controller that deals with both INTx
signalling and management interrupts.

This allows the Link-up/Link-down interrupts to be wired, allowing the
bring-up to be synchronised (and provide debug information).  The framework
can further be used to handle the rest of the per port events if and when
necessary.

Likewise, INTx signalling is implemented so that end-points can actually be
used.

Link: https://lore.kernel.org/r/20210929163847.2807812-7-maz@kernel.org
Link: https://lore.kernel.org/r/20211004150552.3844830-1-maz@kernel.orgTested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Now that everything is in place at the poweroff sequence, this driver can
use module_platform_driver(), which allows it to be removed.

Link: https://lore.kernel.org/r/53b40494252444a9b830827922c4e3a301b8f863.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

The logic under .remove ops is missing a call to dw_pcie_host_deinit(). Add
it, in order to allow the DWC core to be properly cleaned up.

Link: https://lore.kernel.org/r/838621e1c84ebaac153ccd9c36ea5e1254c61ead.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

The logic at kirin_pcie_gpio_request() enables some clkreq GPIO lines.
Disable them during power-off.

Link: https://lore.kernel.org/r/f403e590843de1a581cade2d534d34715706f54e.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

Instead of having two copies of the same logic, place the power-off logic
in a separate function.

No functional changes.

Link: https://lore.kernel.org/r/64f6e8da3e5fff38b6c8fcb208ace46efe6555bb.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

In order to prepare for module unload, add a power_off method for HiKey
960.

Link: https://lore.kernel.org/r/b095818b0d7fadae4cae200f481caf7a66e61fb4.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

There's nothing preventing this driver from being loaded as a module.
Change its config from bool to tristate.

Link: https://lore.kernel.org/r/b5e7cfe9df09b492750bd6db0f0c911eaae8c2d4.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

This driver misses the MODULE_* macros. Add them.

Link: https://lore.kernel.org/r/f7a951d0c2009f5765214fc2e83e24cf41585023.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

Now that everything is in place, add a compatible for Kirin 970.

Link: https://lore.kernel.org/r/ac8c730c0300b90d96bdaaf387d458d8949241a9.1634812676.git.mchehab+huawei@kernel.orgSigned-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>

On HiKey970, there's a PEX 8606 PCI bridge on its PHY with 6 lanes. Only 4
lanes are connected:

  lane 0 - connected to Kirin 970 (upstream)
  lane 4 - M.2 slot
  lane 5 - mini PCIe slot
  lane 6 - on-board Ethernet controller

Each lane has its own PERST# GPIO pin and needs a clock request.

Add support to parse a DT schema containing the above data.

HiKey 970 requires a little more waiting time for the PCI bridge - which is
outside the SoC - to finish the PERST# reset, and then initialize the eye
diagram.

Increase the waiting time for the PERST# signals accordingly.

[bhelgaas: squash refcount fix from Wan Jiabing <wanjiabing@vivo.com>:
https://lore.kernel.org/r/20211103062518.25695-1-wanjiabing@vivo.com
and drop "parent" refcount per
https://lore.kernel.org/all/20211103143059.GA683503@bhelgaas/]
Link: https://lore.kernel.org/r/bb391a0e0f0863b66e645048315fab1a4f63f277.1634812676.git.mchehab+huawei@kernel.org
Link: https://lore.kernel.org/all/9a365cffe5af9ec5a1f79638968c3a2efa979b65.1634622716.git.mchehab+huawei@kernel.org/Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>

Apple's PCIe controller requires clocks to be configured in order to
bring up the hardware. Add the register pokes required to do so.

Adapted from Corellium's driver via Mark Kettenis's U-Boot patches.
Co-developed-by: Stan Skowronek <stan@corellium.com>
Link: https://lore.kernel.org/r/20210929163847.2807812-6-maz@kernel.orgSigned-off-by: Stan Skowronek <stan@corellium.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Add a minimal driver to bring up the PCIe bus on Apple system-on-chips,
particularly the Apple M1. This driver exposes the internal bus used for
the USB type-A ports, Ethernet, Wi-Fi, and Bluetooth. Bringing up the
radios requires additional drivers beyond what's necessary for PCIe itself.
Co-developed-by: Stan Skowronek <stan@corellium.com>
Link: https://lore.kernel.org/r/20210929163847.2807812-5-maz@kernel.orgSigned-off-by: Stan Skowronek <stan@corellium.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Sven Peter <sven@svenpeter.dev>