- 22 Apr, 2013 9 commits
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Terje Bergstrom authored
Add client driver for 2D device, and IOCTLs to pass work to host1x channel for 2D. Also adds functions that can be called to access sync points from DRM. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
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Arto Merilainen authored
This patch introduces a memory manager for tegra drm and moves existing parts to use it. As cma framebuffer helpers can no more be used, this patch adds also a separate framebuffer driver for tegra. Signed-off-by:
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Terje Bergstrom authored
Remove second host1x driver, and bind tegra-drm to the new host1x driver. The logic to parse device tree and track clients is moved to drm.c. Signed-off-by:
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Arto Merilainen authored
Both host1x and drm drivers have host1x structures. This patch renames the host1x structure under drm to follow name host1x_drm. Signed-off-by:
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Terje Bergstrom authored
Make drm part of host1x driver. Signed-off-by:
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Terje Bergstrom authored
Add support for host1x debugging. Adds debugfs entries, and dumps channel state to UART in case of stuck job. Signed-off-by:
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Terje Bergstrom authored
Add support for host1x client modules, and host1x channels to submit work to the clients. Signed-off-by:
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Terje Bergstrom authored
Add support for sync point interrupts, and sync point wait. Sync point wait used interrupts for unblocking wait. Signed-off-by:
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Terje Bergstrom authored
Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by:
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- 18 Apr, 2013 1 commit
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Dave Airlie authored
Reported-by: Randy Dunlap Signed-off-by:Dave Airlie <airlied@redhat.com>
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- 17 Apr, 2013 1 commit
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git://github.com/patjak/drm-gma500Dave Airlie authored
Patrik writes: I haven't had much review or testing on other platforms than Poulsbo but at least the following Cedarview bug has been squashed and no regressions reported: https://bugs.freedesktop.org/show_bug.cgi?id=58527 * 'gma500-next' of git://github.com/patjak/drm-gma500: drm/gma500: Add debugging info to psb_gtt_restore() drm/gma500: Check connector status before restoring sdvo gma500:fix build failure for 3.9-rc5 drm/gma500: Fix hibernation problems on sdvo encoders drm/gma500: Add hooks for hibernation drm/gma500: Activate the gtt rebuild on suspend/resume drm/gma500: Add support for rebuilding the gtt drm/gma500: Change fb name so pm-utils doesn't apply quirks gma500: Make VGA and HDMI connector hotpluggable drm/gma500: Clean up various defines drm/gma500: Remove unnecessary function exposure drm/gma500: Type clock limits directly into array and remove defines drm/gma500: Calculate clock in one function instead of three identical drm/gma500: Remove unused i8xx clock limits gma500: medfield: Fix possible NULL pointer dereference drivers: gpu: drm: gma500: Replaced calls kzalloc & memcpy with kmemdup gma500: remove unused drm_psb_no_fb
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- 16 Apr, 2013 11 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
Alex writes: This is the initial 3.10 pull request for radeon. The big changes here are UVD support and proper tiling support for SI. The rest is bug fixes. I hope to have another pull request later in the week with some new things we've been working on internally. * 'drm-next-3.10' of git://people.freedesktop.org/~agd5f/linux: (28 commits) drm/radeon: Always flush the VM drm/radeon: re-enable PTE/PDE packet for set_page on cayman/TN drm/radeon: cleanup properly if mmio mapping fails drm/radeon/evergreen+: don't enable HPD interrupts on eDP/LVDS drm/radeon: add si tile mode array query v3 drm/radeon: add ring working query drm/radeon: handle broken disabled rb mask gracefully drm/radeon: add pcie set/get lanes callbacks for newer asics drm/radeon: update r600 set/get pcie lane config drm/radeon/kms: replace *REG32_PCIE_P with *REG32_PCIE_PORT drm/radeon: remove unused blit remnants from si.c drm/radeon: add UVD tiling addr config v2 drm/radeon: init UVD clocks to sane defaults drm/radeon: add set_uvd_clocks callback for r7xx v3 drm/radeon: add set_uvd_clocks callback for SI drm/radeon: add set_uvd_clocks callback for evergreen drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4) drm/radeon: add radeon_atom_get_clock_dividers helper drm/radeon: add pm callback for setting uvd clocks drm/radeon: UVD bringup v8 ...
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Jerome Glisse authored
This is slightly cleaned up version of Jerome's patch. There seems to be an issue tracking the last flush of the VM which results in hangs in certain cases when VM is used. For now just flush the VM for every IB. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=62959 https://bugs.freedesktop.org/show_bug.cgi?id=62997Signed-off-by:
Jerome Glisse <jglisse@redhat.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Alex Deucher authored
PTE/PDE doesn't support a single update (count = 1). We had previously disabled it since it we were hitting that case which let to hangs. The PTE/PDE packet is much more efficient for VM updates where it can be used. Signed-off-by: -
Dave Airlie authored
drivers/gpu/drm/qxl/qxl_display.c:99 qxl_alloc_client_monitors_config() error: dereferencing freed memory 'qdev->client_monitors_config' drivers/gpu/drm/qxl/qxl_object.c:66 qxl_ttm_placement_from_domain() warn: bitwise AND condition is false here drivers/gpu/drm/qxl/qxl_ioctl.c:353 qxl_clientcap_ioctl() warn: buffer overflow 'qdev->rom->client_capabilities' 58 <= 58 Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Dave Airlie authored
/usr/lib/gcc/x86_64-linux-gnu/4.7/include/stddef.h:414:9: sparse: preprocessor token offsetof redefined include/linux/stddef.h:17:9: this was the original definition >> drivers/gpu/drm/qxl/qxl_drv.c:49:5: sparse: symbol 'qxl_modeset' was not declared. Should it be static? Reported-by: kbuild test robot. Signed-off-by: -
git://gitorious.org/linux-omap-dss2/linuxDave Airlie authored
Omapdss patches for 3.10 merge window The biggest changes are: * DSI video mode: automatic clock and timing calculation * Lots of platform data related panel driver cleanups, to prepare for DT * tag 'omapdss-for-3.10' of git://gitorious.org/linux-omap-dss2/linux: (69 commits) drm/omap: add statics to a few structs drm/omap: Fix and improve crtc and overlay manager correlation drm/omap: Take a fb reference in omap_plane_update() drm/omap: Make fixed resolution panels work drm/omap: fix modeset_init if a panel doesn't satisfy omapdrm requirements OMAPDSS: DPI: widen the pck search when using dss fck OMAPDSS: fix dss_fck clock rate rounding omapdss: use devm_clk_get() OMAPDSS: nec-nl8048 panel: Use dev_pm_ops OMAPDSS: DISPC: Revert to older DISPC Smart Standby mechanism for OMAP5 OMAPDSS: DISPC: Configure doublestride for NV12 when using 2D Tiler buffers omapdss: Features: Fix some parameter ranges omapdss: DISPC: add max pixel clock limits for LCD and TV managers OMAPDSS: DSI: Use devm_clk_get() drivers: video: omap2: dss: Use PTR_RET function OMAPDSS: VENC: remove platform_enable/disable calls OMAPDSS: n8x0 panel: remove use of platform_enable/disable OMAPDSS: n8x0 panel: handle gpio data in panel driver OMAPDSS: picodlp panel: remove platform_enable/disable callbacks OMAPDSS: picodlp panel: handle gpio data in panel driver ...
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Chris Wilson authored
Userspace is free to pass in any command bits it feels like through the ioctl cmd, and for example trinity likes to fuzz those bits to create conflicting commands. So instead of relying upon userspace to pass along the correct IN/OUT flags for the ioctl, use the flags as expected by the kernel. This does have a side-effect that NULL pointers can not be substituted by userspace in place of a struct. This feature was not being used by any driver, but instead exposed all of the command handlers to a user triggerable OOPS. Reported-by:
Tommi Rantala <tt.rantala@gmail.com> Link: http://lkml.kernel.org/r/CA+ydwtpuBvbwxbt-tdgPUvj1EU7itmCHo_2B3w13HkD5+jWKow@mail.gmail.comSigned-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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Paul Sokolovsky authored
An ifdef in drm.h expects to be compiled with full-fledged Linux toolchain, but it's common to compile kernel with just bare-metal toolchain which doesn't define __linux__. So, also add __KERNEL__ check. [nm@ti.com: port forward to 3.9-rc6 and post to dri devel for feedback as RFC] Signed-off-by:
Paul Sokolovsky <paul.sokolovsky@linaro.org> Signed-off-by:
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Libin authored
(*->vm_end - *->vm_start) >> PAGE_SHIFT operation is implemented as a inline funcion vma_pages() in linux/mm.h, so using it. Signed-off-by:
Libin <huawei.libin@huawei.com> Signed-off-by:
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Laurent Pinchart authored
Property blob objects need to be destroyed when cleaning up to avoid memory leaks. Go through the list of all blobs in the drm_mode_config_cleanup() function and destroy them. The drm_mode_config_cleanup() function needs to be moved after the drm_property_destroy_blob() declaration. Move drm_mode_config_init() as well to keep the functions together. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-intel-next-2013-04-06' of git://people.freedesktop.org/~danvet/drm-intel into drm-next Daniel writes: Since I expect Linus to open the merge window in about a week I guess this is the last i915 feature pull for 3.10. Highlights: Updated testing tree for -next. Highlights: - Corner case fixes discovered with static analyzers (Damien). - More fixes to combat unclaimed register errors on Haswell (Paulo). - Some small fixes to the gpu turbo code (Rodrigo+Ben), Ben has more fixes for overclocking support pending. - More prep work for fastboot from Chris. - VT-switchless suspend/resume from Jesse. - The prep work of Egbert Eich's hpd irq storm handling. Hopefully we can squeeze in the actual storm handling code for 3.10 ... - More convenience helpers for Imre's sg iterator. Core parts acked by Andrew Morton. - A bit of backlight code cleanup from Jani. - Fixed ilk gpu reset (Jesse). - Reduced color range handling fixes for VLV (Ville). The big item here is though the introduction of pipe_config to properly pre-compute the desired modeset state before touching the hw. Together with some very basic support to read out the current config from the hw and compare the state with the sw tracking. This is all prep work for more reliable fastboot, atomic modesets and other cool features. Stuff converted to the new world includes: - Most simple pipe attributes (reduce color range, pixel multiplier). - Pipe bpp/dither handling. - Some convenience flags like ->has_pch_encoder to simplify the code flow. - (Almost) DP clock handling, had to be reverted since part of a prep patch was lost in rebasing ... Expect a lot of patches for this throughout 3.11, there's tons of work till we have all state properly tracked for fastbooting to woExpect a lot of patches for this throughout 3.11, there's tons of work till we have all state properly tracked for fastbooting to work. For 3.10 I have a bunch of fixes queued up and I plan to send them all out at the end of this week. I need to shuffle patches in my -next queue a bit so that we don't but feature-y stuff in there, too. The main thing I'd like to sneak in is Egbert's hpd irq storm handling, which should be pretty low-risk since all the infrastructure work has landed already. I also have the oops fix pending, but that only mustered review before the w/e and giving how hairy that part of our modeset code is, I want to give it some more testing before forwarding. Note: annarchy.fd.o seems to run out of disk space, so couldn't push the usual for-airlied branch. Tag should work though. Note 2: I've had to do a backmerge since conflicts grew too ugly, but the upstream -rc I've backmerged is already in your drm-next. * tag 'drm-intel-next-2013-04-06' of git://people.freedesktop.org/~danvet/drm-intel: (75 commits) drm/i915: info level for simulated gpu hang dmesg notice drm/i915: revert eDP bpp clamping code changes Revert "drm/i915: fix DP get_hw_state return value" drm/i915: Don't use the HDMI port color range bit on Valleyview drm/i915: Set PIPECONF color range bit on Valleyview drm/i915: extract i9xx_set_pipeconf drm/i915: Add no-lvds quirk for Fujitsu Esprimo Q900 drm/i915: create pipe_config->dpll for clock state drm/i915: hw readout support for ->has_pch_encoders drm/i915: add hw state readout/checking for pipe_config drm/i915: rip out superflous is_dp&is_cpu_edp tracking drm/i915: remove leaky eDP functions drm/i915: track dp target_clock in pipe_config drm/i915: move dp_m_n computation to dp_encoder->compute_config drm/i915: clear up the fdi/dp set_m_n confusion drm/i915: Fix sdvo connector get_hw_state function drm/i915: drop DPFLIPSTAT enables on VLV v3 drm/i915: add Punit read/write routines for VLV v2 drm/i915: panel power sequencing for VLV eDP v2 drm/i915/dp: fix up VLV DP handling v2 ...
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- 15 Apr, 2013 5 commits
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Patrik Jakobsson authored
This makes it easier to see what's going on during resume/restore. Signed-off-by:Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
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Patrik Jakobsson authored
This patch fixes a bug introduced by: commit 749387dc Author: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Date: Sun Apr 7 16:35:50 2013 +0200 drm/gma500: Fix hibernation problems on sdvo encoders The bug is triggered when we do a mode set on a sdvo encoder with all connectors in the disconnected state. A crtc is considered enabled by drm even though all of its connectors are disconnected. Work around this by adding a check in our sdvo restore function. Also remove the unneeded dpms on. Prepare and Commit will take care of that. Signed-off-by:
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Alex Deucher authored
If we fail to map the mmio BAR, skip driver tear down that requires mmio. Should fix: https://bugzilla.kernel.org/show_bug.cgi?id=56541Signed-off-by:
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Alex Deucher authored
Avoids potential interrupt storms when the display is disabled. May fix: https://bugzilla.kernel.org/show_bug.cgi?id=56041Signed-off-by:
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Tomi Valkeinen authored
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- 12 Apr, 2013 8 commits
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archit taneja authored
drm_framebuffer_lookup() does a kref_get() for the framebuffer if it finds one corresponding to the fb id passed to it. Use drm_framebuffer_reference() instead for clarity since it's the function used in other places to take a reference. Signed-off-by:
Archit Taneja <archit@ti.com> Reviewed-by:
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Christopher Harvey authored
Signed-off-by:
Christopher Harvey <charvey@matrox.com> Signed-off-by:
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Christopher Harvey authored
Signed-off-by:
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Carsten Emde authored
The 1600x1200 (UXGA) screen resolution was lacking in the set of built-in selectable EDID screen resolutions that can be used to repair misbehaving monitor firmware. This patch adds the related data set and expands the documentation. Signed-off-by:
Carsten Emde <C.Emde@osadl.org> Acked-by:
Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by:
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Thierry Reding authored
In order to make it easier to port the code to other operating systems (like the BSDs), relicense the HDMI helpers under the more permissive MIT license. Signed-off-by:
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Dave Airlie authored
QXL is a paravirtual graphics device used by the Spice virtual desktop interface. The drivers uses GEM and TTM to manage memory, the qxl hw fencing however is quite different than normal TTM expects, we have to keep track of a number of non-linear fence ids per bo that we need to have released by the hardware. The releases are freed from a workqueue that wakes up and processes the release ring. releases are suballocated from a BO, there are 3 release categories, drawables, surfaces and cursor cmds. The hw also has 3 rings for commands, cursor and release handling. The hardware also have a surface id tracking mechnaism and the driver encapsulates it completely inside the kernel, userspace never sees the actual hw surface ids. This requires a newer version of the QXL userspace driver, so shouldn't be enabled until that has been placed into your distro of choice. Authors: Dave Airlie, Alon Levy v1.1: fixup some issues in the ioctl interface with padding v1.2: add module device table v1.3: fix nomodeset, fbcon leak, dumb bo create, release ring irq, don't try flush release ring (broken hw), fix -modesetting. v1.4: fbcon cpu usage reduction + suitable accel flags. Signed-off-by:Alon Levy <alevy@redhat.com> Signed-off-by:
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Dave Airlie authored
qxl wants to use io mapping like i915 gem does, for now just export the symbols so the driver can implement atomic page maps using io mapping. Signed-off-by: -
Alon Levy authored
Signed-off-by:
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- 11 Apr, 2013 5 commits
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Jerome Glisse authored
Allow userspace to query for the tile mode array so userspace can properly compute surface pitch and alignment requirement depending on tiling. v2: Make strict aliasing safer by casting to char when copying v3: merge fix from Christian Signed-off-by:
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Christian König authored
Add new ioctl option and bumb minor version number. Signed-off-by:
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Alex Deucher authored
If the disabled rb mask register is not properly initialized program a sane default based on the number of RBs for the asic. This avoids a potential divide by 0 when calculating the backend mask. Signed-off-by: -
Tomi Valkeinen authored
Some static structs are not marked as static. Add it. Signed-off-by:Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
The omapdrm driver currently takes a config/module arg to figure out the number of crtcs it needs to create. We could create as many crtcs as there are overlay managers in the DSS hardware, but we don't do that because each crtc eats up one DSS overlay, and that reduces the number of planes we can attach to a single crtc. Since the number of crtcs may be lesser than the number of hardware overlay managers, we need to figure out which overlay managers to use for our crtcs. The current approach is to use pipe2chan(), which returns a higher numbered manager for the crtc. The problem with this approach is that it assumes that the overlay managers we choose will connect to the encoders the platform's panels are going to use, this isn't true, an overlay manager connects only to a few outputs/encoders, and choosing any overlay manager for our crtc might lead to a situation where the encoder cannot connect to any of the crtcs we have chosen. For example, an omap5-panda board has just one hdmi output. If num_crtc is set to 1, with the current approach, pipe2chan will pick up the LCD2 overlay manager, which cannot connect to the hdmi encoder at all. The only manager that could have connected to hdmi was the TV overlay manager. Therefore, there is a need to choose our overlay managers keeping in mind the panels we have on that platform. The new approach iterates through all the available panels, creates encoders and connectors for them, and then tries to get a suitable overlay manager to create a crtc which can connect to the encoders. We use the dispc_channel field in omap_dss_output to retrieve the desired overlay manager's channel number, we then check whether the manager had already been assigned to a crtc or not. If it was already assigned to a crtc, we assume that out of all the encoders which intend use this crtc, only one will run at a time. If the overlay manager wan't assigned to a crtc till then, we create a new crtc and link it with the overlay manager. This approach just looks for the best dispc_channel for each encoder. On DSS HW, some encoders can connect to multiple overlay managers. Since we don't try looking for alternate overlay managers, there is a greater possibility that 2 or more encoders end up asking for the same crtc, causing only one encoder to run at a time. Also, this approach isn't the most optimal one, it can do either good or bad depending on the sequence in which the panels/outputs are parsed. The optimal way would be some sort of back tracking approach, where we improve the set of managers we use as we iterate through the list of panels/encoders. That's something left for later. Signed-off-by:
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