- 26 Mar, 2021 40 commits
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Jiaran Zhang authored
According to the HW manual, the query operation is unnecessary when the TM QCN error event is enabled, so remove it. Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Peng Li authored
Remove some redundant blank lines. Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Jian Shen authored
Vmdq is not supported yet, the num_vmdq_vport is always 0, it's a bit confusing when using the num_vport, so remove these unused codes of vmdq. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Jian Shen <shenjian15@huawei.com> Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linuxDavid S. Miller authored
Saeed Mahameed says: ==================== mlx5-updates-2021-03-24 mlx5e netdev driver updates: 1) Some cleanups from Colin, Tariq and Saeed. 2) Aya made some trivial refactoring to cleanup and generalize PTP and RQ (Receive Queue) creation and management. Mostly code decoupling and reducing dependencies between the different RX objects in the netdev driver. This is a preparation series for upcoming PTP special RQ creation which will allow coexistence of CQE compression (important performance feature, especially in Multihost systems) and HW TS PTP. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Colin Ian King authored
There are two spelling mistakes in a mlx5_core_info message. Fix them. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Reduce scope of mlx5e_ptp_params, move to its c file. Remove unneeded variables from mlx5e_ptp_open and state bitmap from PTP channel. In addition, remove channel index from PTP channel since it is set to a hard coded value, use define instead. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Following patches in the set add support for RX PTP. Rename PTP prefix from %s/port_ptp/ptp/g to include RX PTP too. In addition rename indication (used in statistics context) that PTP-SQ was opened: %s/port_ptp_opened/tx_ptp_opened/g. This will simplify adding indication that PTP-RQ was opened. Signed-off-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Add input parameter indicating the size of direct-TIRs/direct-RQTs array to be created/destroyed. This allows next patches in the patch-set to handle a single direct-TIR pointing to a direct-RQT with a single entry. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Allow different flavours of RQ to use the same close flow. Add validity checks to support different RQ types which not necessarily initialize all the RQ's functionality. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Support RQ activation for RQs without an ICOSQ in the main flow, like existing trap-RQ and like PTP-RQ that will be introduced in the coming patches in the patchset. With this patch, remove the wrapper in traps to deactivate the trap-RQ. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Unify RQ creation for different RQ types. For each RQ type add a separate open helper which initializes the RQ specific values and trigger a call for generic open RQ function. Avoid passing the mlx5e_channel pointer to the generic open RQ as a container, since the RQ may reside under a different type of channel. Signed-off-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Translation method on the time-stamp is set by the capabilities. Avoid code duplication by using a helper to set ptp_cyc2time callback on a queue. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Aya Levin authored
Change the signature of mlx5e_rq_alloc_mpwqe_info from receiving channel pointer to receive the NUMA node. This allows creating mpwqe_info in context of different channels types. Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Tariq Toukan authored
Do not use generic struct mlx5e_priv as a parameter to param functions, as it is too generic. All calculations of the channel's param should be mainly based on struct mlx5_core_dev and struct mlx5e_params. Additional info can be explicitly passed. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Tariq Toukan authored
Take params logic out of en_main.c, into the dedicated params.c. Some functions are now hidden and become static. No functional change here. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Tariq Toukan authored
Pass q_counter idintifier, instead of reading it from mlx5e_priv parameter. This is a step towards removing the mlx5e_priv parameter from all params function and logic in the next patches of the series. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Aya Levin <ayal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Saeed Mahameed authored
The cited patch allocated the wrong size for the indirection_rqt table, fix that. Fixes: 2119bda6 ("net/mlx5e: allocate 'indirection_rqt' buffer dynamically") CC: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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Pablo Neira Ayuso authored
... cannot be used in block quote, it breaks compilation, remove it. Fix warnings due to missing blank line such as: net-next/Documentation/networking/nf_flowtable.rst:142: WARNING: Block quote ends without a blank line; unexpected unindent. Fixes: 143490cd ("docs: nf_flowtable: update documentation with enhancements") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Eric Dumazet says: ==================== net: use less storage for most sysctl This patch series adds a new sysctl type, to allow using u8 instead of "int" or "long int" types. Then we convert mosts sysctls found in struct netns_ipv4 to shrink it by three cache lines. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
Many tcp sysctls are either bools or small ints that can fit into u8. Reducing space taken by sysctls can save few cache line misses when sending/receiving data while cpu caches are empty, for example after cpu idle period. This is hard to measure with typical network performance tests, but after this patch, struct netns_ipv4 has shrunk by three cache lines. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
For these sysctls, their dedicated helpers have to use proc_dou8vec_minmax(). Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
This sysctl uses ip_fwd_update_priority() helper, so the conversion needs to change it. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
These sysctls that can fit in one byte instead of one int are converted to save space and thus reduce cache line misses. - icmp_echo_ignore_all, icmp_echo_ignore_broadcasts, - icmp_ignore_bogus_error_responses, icmp_errors_use_inbound_ifaddr - tcp_ecn, tcp_ecn_fallback - ip_default_ttl, ip_no_pmtu_disc, ip_fwd_use_pmtu - ip_nonlocal_bind, ip_autobind_reuse - ip_dynaddr, ip_early_demux, raw_l3mdev_accept - nexthop_compat_mode, fwmark_reflect Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
Networking has many sysctls that could fit in one u8. This patch adds proc_dou8vec_minmax() for this purpose. Note that the .extra1 and .extra2 fields are pointing to integers, because it makes conversions easier. Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Voon Weifeng says: ==================== net: stmmac: enable multi-vector MSI This patchset adds support for multi MSI interrupts in addition to current single common interrupt implementation. Each MSI interrupt is tied to a newly introduce interrupt service routine(ISR). Hence, each interrupt will only go through the corresponding ISR. In order to increase the efficiency, enabling multi MSI interrupt will automatically select the interrupt mode configuration INTM=1. When INTM=1, the TX/RX transfer complete signal will only asserted on corresponding sbd_perch_tx_intr_o[] or sbd_perch_rx_intr_o[] without asserting signal on the common sbd_intr_o. Hence, for each TX/RX interrupts, only the corresponding ISR will be triggered. Every vendor might have different MSI vector assignment. So, this patchset only includes multi-vector MSI assignment for Intel platform. Changes: v1 -> v2 patch 2/5 -Remove defensive check for invalid dev pointer ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Wong, Vee Khee authored
For interrupt mode INTM=0, TX/RX transfer complete will trigger signal not only on sbd_perch_[tx|rx]_intr_o (Transmit/Receive Per Channel) but also on the sbd_intr_o (Common). As for multi-MSI implementation, setting interrupt mode INTM=1 is more efficient as each TX intr and RX intr (TI/RI) will be handled by TX/RX ISR without the need of calling the common MAC ISR. Updated the TX/RX NORMAL interrupts status checking process as the NIS status bit is not asserted for any RI/TI events for INTM=1. Signed-off-by: Wong, Vee Khee <vee.khee.wong@intel.com> Co-developed-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ong Boon Leong authored
Intel mgbe controller supports multi-vector interrupts: msi_rx_vec 0,2,4,6,8,10,12,14 msi_tx_vec 1,3,5,7,9,11,13,15 msi_sfty_ue_vec 26 msi_sfty_ce_vec 27 msi_lpi_vec 28 msi_mac_vec 29 During probe(), the driver will starts with request allocation for multi-vector interrupts. If it fails, then it will automatically fallback to request allocation for single interrupts. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Co-developed-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ong Boon Leong authored
Now we introduce MSI interrupt service routines and hook these routines up if stmmac_open() sees valid irq line being requested:- stmmac_mac_interrupt() :- MAC (dev->irq), WOL (wol_irq), LPI (lpi_irq) stmmac_safety_interrupt() :- Safety Feat Correctible Error (sfty_ce_irq) & Uncorrectible Error (sfty_ue_irq) stmmac_msi_intr_rx() :- For all RX MSI irq (rx_irq) stmmac_msi_intr_tx() :- For all TX MSI irq (tx_irq) Each of IRQs will have its unique name so that we can differentiate them easily under /proc/interrupts. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ong Boon Leong authored
Refactor stmmac_interrupt() by introducing stmmac_common_interrupt() so that we prepare the ISR operation to be friendly to MSI later. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ong Boon Leong authored
In preparation to make stmmac support multi-vector MSI, we introduce the interrupt status masking according to RX, TX or RXTX. Default to use RXTX inside stmmac_dma_interrupt(), so there is no run-time logic difference now. Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Dmitry Vyukov authored
netdev_unregister_timeout_secs=0 can lead to printing the "waiting for dev to become free" message every jiffy. This is too frequent and unnecessary. Set the min value to 1 second. Also fix the merge issue introduced by "net: make unregister netdev warning timeout configurable": it changed "refcnt != 1" to "refcnt". Signed-off-by: Dmitry Vyukov <dvyukov@google.com> Suggested-by: Eric Dumazet <edumazet@google.com> Fixes: 5aa3afe1 ("net: make unregister netdev warning timeout configurable") Cc: netdev@vger.kernel.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Alex Elder says: ==================== net: ipa: update registers for other versions This series updates IPA and GSI register definitions to permit more versions of IPA hardware to be supported. Most of the updates are informational, updating comments to indicate which IPA versions support each register and field. But some registers are new and others are deprecated. In a few cases register fields are laid out differently, and in these cases the changes are a little more substantive. I won't claim the result is 100% correct, but it's close, and should allow all IPA versions 3.x through 4.x to be supported by the driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Alex Elder authored
IPA v4.5 (GSI v2.5) supports a larger set of channel protocols, and adds an additional field to hold the most-significant bits of the protocol identifier on a channel. Add an inline function that encodes the protocol (including the extra bits for newer versions of IPA), and define some additional protocols. At this point we still use only GPI protocol. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Alex Elder authored
Each GSI channel has a CNTXT_1 register that encodes the size of its ring buffer. The size of the field that records that is increased starting at IPA v4.9. Replace the use of a fixed-size field mask with a new inline function that encodes that size value. Similarly, the size of GSI event rings can be larger starting with IPA v4.9, so create a function to encode that as well. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Alex Elder authored
The main purpose of this is to extend these GSI register definitions to support additional IPA versions. This patch makes some minor updates to "gsi_reg.h": - Define a DB_IN_BYTES field in the channel QOS register - Add some comments clarifying when certain fields are valid - Add the definition of GSI_CH_DB_STOP channel command - Add a couple of blank lines - Move one comment and indent another - Delete two unused register definitions at the end. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Alex Elder authored
Starting with IPA v4.7, registers related to IPA interrupts are located at a fixed offset 0x1000 above than the addresses used for earlier versions. Define and use functions to provide the offset to use for these registers based on IPA version. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Alex Elder authored
IPA version 4.9 and later use a different layout of some fields found in the COMP_CFG register. Define arbitration_lock_disable_encoded(), and use it to encode a value into the ATOMIC_FETCHER_ARB_LOCK_DIS field based on the IPA version. And define full_flush_rsc_closure_en_encoded() to encode a value into the FULL_FLUSH_WAIT_RSC_CLOSE_EN field based on the IPA version. The values of these fields are neither modified nor extracted by current code, but this patch makes this possible for all supported versions. Fix a mistaken comment above ipa_hardware_config_comp() intended to describe the purpose for the register. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Alex Elder authored
Add and update IPA register definitions. Extend these definitions to incorporate a fairly small number of new symbols (register offsets and fields) to support IPA v3.0, v3.1, v3.5, v4.0, v4.1, v4.7, 4.9, and v4.11, and have the comments reflect when they are valid. None of the added symbols require changes elsewhere in the code. Update rsrc_grp_encoded() to support these other IPA versions. Add kerneldoc comments for the IPA IRQ numbers and sequencer type. Fix a few spots where the version check should be less restrictive (missed by an earlier patch). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Qiheng Lin authored
GCC reports the following warning with W=1: drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c:80:9: warning: variable 'count' set but not used [-Wunused-but-set-variable] 80 | int i, count; | ^~~~~ This variable is not used in function , this commit remove it to fix the warning. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Qiheng Lin <linqiheng@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Heiner Kallweit authored
We can simply use rtl_hw_start_8168c_2() also for chip version 21. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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