- 17 Oct, 2022 38 commits
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Krzysztof Kozlowski authored
Convert Qualcomm SDM845 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930200529.331223-3-krzysztof.kozlowski@linaro.orgSigned-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Neil Armstrong authored
Convert the MDM9515 pinctrl bindings to dt-schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, optional children with '-pins'). Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org [krzk: drop function from required] Signed-off-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Previous adjustment missefd one spot. Reviewed-by:
Bjorn Andersson <andersson@kernel.org> Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4 and sdc3 functions and DTS already uses it: qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ... qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed: 'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: -
Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
One pinxmux node can have more than 4 pins to configure: ['gpio1', 'gpio3', 'gpio4', 'gpio5', 'gpio6', 'gpio7', 'gpio8', 'gpio10', 'gpio11', 'gpio12', 'gpio13', 'gpio14', 'gpio15', 'gpio17'] is too long Reviewed-by:
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Krzysztof Kozlowski authored
The pin controller driver has BLSP functions from 0 to 5, not 1 to 6. Add missing blsp0_i2c, blsp0_spi (already used in ipq6018-cp01-c1) and blsp0_uart. Drop blsp6_i2c and blsp6_spi. This fixes dtbs_check warning: ipq6018-cp01-c1.dtb: pinctrl@1000000: spi-0-state: 'oneOf' conditional failed, one must be fixed: 'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' 'blsp0_spi' is not one of ['adsp_ext', 'alsp_int', ..... Reviewed-by: -
Krzysztof Kozlowski authored
The IPQ6018 pinctrl driver supports qpic_pad and DTS already uses it: 'qpic_pad' is not one of ['adsp_ext', 'alsp_int', 'atest_bbrx0', ... Reviewed-by:
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Add a check for this in common Qualcomm TLMM pin controller schema. Reviewed-by:
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Krzysztof Kozlowski authored
The existing SC7280 LPASS pin controller nodes use bias-bus-hold and input-enable, so allow them. Squash also blank lines for readability. Acked-by:
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Krzysztof Kozlowski authored
The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so allow it. Squash also blank lines for readability. Acked-by:
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Reviewed-by:
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a required property Reviewed-by:
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Reviewed-by:
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Reviewed-by:
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Krzysztof Kozlowski authored
Fix double ']' in GPIO pattern to properly match "pins" property. Otherwise schema for pins state fails. Fixes: 4faa4e73 ("dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings") Acked-by:
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Krzysztof Kozlowski authored
Fix double ']' in GPIO pattern to properly match "pins" property. Otherwise schema for pins state fails. Fixes: 958bb025 ("dt-bindings: pinctrl: qcom: Add sc8280xp lpass lpi pinctrl bindings") Acked-by:
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- 16 Oct, 2022 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/crng/randomLinus Torvalds authored
Pull more random number generator updates from Jason Donenfeld: "This time with some large scale treewide cleanups. The intent of this pull is to clean up the way callers fetch random integers. The current rules for doing this right are: - If you want a secure or an insecure random u64, use get_random_u64() - If you want a secure or an insecure random u32, use get_random_u32() The old function prandom_u32() has been deprecated for a while now and is just a wrapper around get_random_u32(). Same for get_random_int(). - If you want a secure or an insecure random u16, use get_random_u16() - If you want a secure or an insecure random u8, use get_random_u8() - If you want secure or insecure random bytes, use get_random_bytes(). The old function prandom_bytes() has been deprecated for a while now and has long been a wrapper around get_random_bytes() - If you want a non-uniform random u32, u16, or u8 bounded by a certain open interval maximum, use prandom_u32_max() I say "non-uniform", because it doesn't do any rejection sampling or divisions. Hence, it stays within the prandom_*() namespace, not the get_random_*() namespace. I'm currently investigating a "uniform" function for 6.2. We'll see what comes of that. By applying these rules uniformly, we get several benefits: - By using prandom_u32_max() with an upper-bound that the compiler can prove at compile-time is ≤65536 or ≤256, internally get_random_u16() or get_random_u8() is used, which wastes fewer batched random bytes, and hence has higher throughput. - By using prandom_u32_max() instead of %, when the upper-bound is not a constant, division is still avoided, because prandom_u32_max() uses a faster multiplication-based trick instead. - By using get_random_u16() or get_random_u8() in cases where the return value is intended to indeed be a u16 or a u8, we waste fewer batched random bytes, and hence have higher throughput. This series was originally done by hand while I was on an airplane without Internet. Later, Kees and I worked on retroactively figuring out what could be done with Coccinelle and what had to be done manually, and then we split things up based on that. So while this touches a lot of files, the actual amount of code that's hand fiddled is comfortably small" * tag 'random-6.1-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random: prandom: remove unused functions treewide: use get_random_bytes() when possible treewide: use get_random_u32() when possible treewide: use get_random_{u8,u16}() when possible, part 2 treewide: use get_random_{u8,u16}() when possible, part 1 treewide: use prandom_u32_max() when possible, part 2 treewide: use prandom_u32_max() when possible, part 1
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