- 05 May, 2022 2 commits
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Li Yang authored
Update the node name to be align with updated DT binding. But be noted that u-boot for ls1088a used the ifc node name to disable ifc-nor node when the SoC is configured to use QSPI. The u-boot has been updated to use the latest name but the change could break compatibility with older u-boot for ls1088a. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Li Yang authored
The binding of ifc device has been updated. Update dts to match accordingly. Signed-off-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 24 Apr, 2022 2 commits
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Fabio Estevam authored
UART3 pins are available in the J1003 connector. Add support for it. Signed-off-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo. The board is a compatible replacement for i.MX53 M53Menlo and features USB, multiple UARTs, ethernet, LEDs, SD and eMMC. Reviewed-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Francesco Dolcini <francesco.dolcini@toradex.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 18 Apr, 2022 7 commits
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Tim Harvey authored
The Gateworks GW7400 is an ARM based single board computer (SBC) featuring: - i.MX8M Plus SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (GSC) - QOS GbE - Microchip GbE Switch - Multiple multi-protocol RS232/RS485/RS422 Serial ports - USB 3.0 Front panel connector - onboard 802.11ac WiFi / BT - 3x miniPCIe socket with PCIe and USB 2.0 - 1x M.2 B/A-E socket with PCIe, USB 3.0 and dual nano-SIM sockets - off-board connectors for: MIPI DSI, MIPI CSI, SPI, GPIO, I2C - Wide range DC power input - Passive PoE - 802.3at PoE Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP Linux Team <linux-imx@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tommaso Merciai authored
Add pwm1/backlight support nodes for imx8mm_evk board. Align with u-boot dts References: - https://patchwork.ozlabs.org/project/uboot/patch/20220326111911.13720-9-tommaso.merciai@amarulasolutions.com/Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Add a device tree for the 8MNANOD3L-EVK eval board which features an IMX8MN SoC. It is similar to the 8MNANODLPD4-EVK eval board except it has an IMX8MN UltraLite SoC and DDR3L memory. It esp. differs in the PMIC configuration because the SoC has a smaller package and thus the ARM core voltage is combined with the SoC voltage and the DDR voltage is 1.35V for the DDR3L memory. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Add the missing 'uart-has-rtscts' property to UART's that have hardware flow control capability. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Ming Qian authored
Add the Video Processing Unit node for IMX8Q SoC. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Shijie Qin <shijie.qin@nxp.com> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The SDHC controller in the imx8mp has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The SDHC controller in the imx8mn has the same controller as the imx8mm which supports HS400-ES. Change the compatible fallback to imx8mm to enable it, but keep the imx7d-usdhc to prevent breaking backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 11 Apr, 2022 19 commits
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Marcel Ziswiler authored
This patch adds the device tree to support Toradex Verdin iMX8M Plus [1] a computer on module which can be used on different carrier boards. The module consists of an NXP i.MX 8M Plus family SoC (either i.MX 8M Plus Quad or 8M Plus QuadLite), a PCA9450C PMIC, a Gigabit Ethernet PHY, 1, 2, 4 or 8 GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, an optional I2C temperature sensor plus an optional Bluetooth/Wi-Fi module. Anything that is not self-contained on the module is disabled by default. The device tree for the Dahlia includes the module's device tree and enables the supported peripherals of the carrier board. The device tree for the Verdin Development Board includes the module's device tree as well as the Dahlia one as it is a superset and supports almost all peripherals available. So far there is no display functionality supported at all but basic console UART, USB host, eMMC and Ethernet functionality work fine. [1] https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plusSigned-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Add DMA properties to uart2 node. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Krzysztof Kozlowski authored
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Kuldeep Singh authored
fsl,clk-source property is of type uint8 and need to be defined as "/bits/ 8 <0>". Simply setting value to 0 raise warning: can@2180000: fsl,clk-source:0: [0, 0, 0, 0] is too long Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
At the moment, the dtsi will force the dr_mode to host. This is problematic because it will always turn on the Vbus voltage regardless if the port is host or device. This might lead to a "shortcut" between the two USB endpoints because both might have their Vbus supplies enabled. Therefore, the default should be "otg" for any ports which aren't host only (from a SoC point of view) and have a user of the dtsi file overwrite that explicitly. Move the 'dr_mode = "host";' into the board dts. Now that the dtsi doesn't set the dr_mode anymore, we can also drop the 'dr_mode = "otg";' in the board dts because that is the default value if dr_mode is not set. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Enable the ocelot-8021q tagger by default which supports ethernet flow control. The new default is set in the common board dtsi. The actual switch node is enabled on a per board variant basis. Because of this we set the new tagger default for both internal ports and a particular variant is free to choose among the two port. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Add SD1 sleep pinctrl to avoid backfeeding during sleep. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Add a note about us using discrete external on-module resistors pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly disabling the internal pull-ups due to ERR050080 [1]: IO: Degradation of internal IO pullup/pulldown current capability for IO’s continuously driven in a 3.3V operating mode [1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87WSigned-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Fix capitalisation of Verdin in comments. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Alphabetically re-order pinctrl groups. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Update IOMUX configuration as required by the hardware design team. Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Add a note about the bootloader being expected to switch on the I2C level shifter for the TLA2024 ADC behind this PMIC. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Make sure we only have dashes rather than underscores in node names by renaming ctrl_sleep_moci-hog to ctrl-sleep-moci-hog. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Alphabetically re-order nodes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Fix multi-line comment style. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marcel Ziswiler authored
Annotate regulators which are on-module. Rename usb_otg{1/2}_vbus to USB_{1/2}_EN more in-line with Verdin spec. Annotate PMIC regulators with information on which BUCK/LDO they are on. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Sherry Sun authored
i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
Add A53 OPP table and cpu regulator to support cpu-freq driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marek Vasut authored
And missing speed grade phandle to cpu@0 node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 08 Apr, 2022 8 commits
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Lucas Stach authored
Add the DT nodes for both the 3D and 2D GPU cores found on the i.MX8MP. etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6204 etnaviv-gpu 38008000.gpu: model: GC520, revision: 5341 [drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0 Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Tested-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
Add the power domains for the GPUs, which do not require any interaction with a blk-ctrl, but are simply two PU domains nested inside a MIX domain. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
There is a 32MiB Micron MT25QU256ABA1 serial NOR flash on the EVK board. Add a device tree node for it. Tested on a 8MNANOD3L-EVK. Signed-off-by: Michael Walle <michael@walle.cc> Tested-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
The r4 ("Evergreen") hardware revision of the Librem 5 phone includes a slightly different panel than the revisions before it. Since its' description is available, describe it properly for the board. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Angus Ainslie authored
This partition will hold a squashfs firmware jail. Only one read-only partition is needed. Signed-off-by: Angus Ainslie <angus@akkea.ca> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
1,5A is what's used by the type-c controller on the Librem 5 board so increase ti,boost-max-current to 1,5A too. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kepplinger authored
That pin is not connected on the board so no need to describe it. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kepplinger authored
They turn on the display currently so to be consistent, let's make them wake the system from suspend as well. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 06 Apr, 2022 2 commits
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Peng Fan authored
The i.MX8MQ PLL support hdmi phy 27m as pll reference clock, so add a fixed clock for it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Use the proper voltages as supported by the board instead of the ones supported by the PMIC. The voltages were taken from both the schematic of the 8MNANOLPD4-EVK eval board and the datasheet of the IMX8MN SoC. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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