- 20 Nov, 2021 40 commits
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Dang Huynh authored
This lets the user sees the framebuffer console. Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
Dang Huynh <danct12@riseup.net> Reviewed-by:
Caleb Connolly <caleb@connolly.tech> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211120214227.779742-8-danct12@riseup.net
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Dang Huynh authored
This commit enable the SD card slot and internal MMC. Signed-off-by:
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Dang Huynh authored
This enables the volume down key as well as the power button. Reviewed-by:
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Dang Huynh authored
Add most of the RPM PM660/PM660L regulators and the fixed ones, defining the common electrical part of this platform. Signed-off-by:
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Dang Huynh authored
It's not worth duplicating the same node over and over again, so let's keep the common bits in the pm660 DTSI, making only changing the status and keycode necessary. Also, disable RESIN/PWR by default just in case if there are devices that doesn't use them. Reviewed-by:
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Dang Huynh authored
This makes eMMC/SD device number consistent. Reviewed-by:
Martin Botka <martin.botka@somainline.org> Signed-off-by:
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Prasad Malisetty authored
Update interrupt-map parent address cells for sc7280 Similar to existing Qcom SoCs. Fixes: 92e0ee9f ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes") Signed-off-by:
Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Prasad Malisetty authored
Add pcie clock phandle for sc7280 SoC. Signed-off-by:
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Prasad Malisetty authored
Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk To match with dt binding. Fixes: ab7772de ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node") Signed-off-by:
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yangcong authored
When powering up the ps8640, we need to deassert PD right after we turn on the vdd33 regulator. Unfortunately, the vdd33 regulator takes some time (~4ms) to turn on. Add in the delay for the vdd33 regulator so that when the driver deasserts PD that the regulator has had time to ramp. Signed-off-by:
yangcong <yangcong5@huaqin.corp-partner.google.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Konrad Dybcio authored
Configure the Last-Level Cache Controller for SM8350. Signed-off-by:
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Konrad Dybcio authored
Configure ADSP, CDSP, MPSS, SLPI and IPA on SoMC Sagami. Signed-off-by:
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Konrad Dybcio authored
Based on current driver availability, add either nodes or comments regarding peripherals connected via I2C/SPI. Signed-off-by:
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Konrad Dybcio authored
Add support for SONY Xperia 1 III (PDX215) and 5 III (PDX214) smartphones. Both are based on the SM8350 Sagami platform and feature some really high-end specs, such as: - 4K (1 III / PRO-I) / 1080p (5 III), 120Hz HDR OLED 10-bit panels - USB-C 3.1 with HDMI in (yes, phone as display!) and DP out - 5G - 8 or 12 gigs of ram, 128/256/512 gigs of storage - A 3.5mm headphone jack, a RGB notification LED and a uSD card slot :) - IP65/68 dust/water resistance - Dual front-firing speakers and a lot of microphones - Crazy complex camera hardware (especially on the PRO-I), which includes 4 cameras, an RGBIR sensor and a 3D iToF The aforementioned PRO-I (PDX217) is not supported in this patch, because even though it shares most of the code with 1 III, nobody really has it (yet?) This only adds basic support for booting to a USB shell with a bootloader-enabled display, support for all the awesome hardware listed above will (hopefully) come (hopefully) soon. In order to get a working boot image, you need to run (e.g. for 1 III): cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm8350-sony-xperia-\ sagami-pdx215.dtb > .Image.gz-dtb mkbootimg \ --kernel .Image.gz-dtb \ --ramdisk some_initrd.img \ --pagesize 4096 \ --base 0x0 \ --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 \ --tags_offset 0x100 \ --cmdline "SOME_CMDLINE" \ --dtb_offset 0x1f00000 \ --header_version 1 \ --os_version 11 \ --os_patch_level 2021-10 \ # or newer -o boot.img-sony-xperia-pdx215 Then, you need to flash it on the device and get rid of all the vendor_boot/dtbo mess: fastboot flash boot boot.img-sony-xperia-pdx215 fastboot erase vendor_boot fastboot flash dtbo emptydtbo.img fastboot reboot Where emptydtbo.img is a tiny file that consists of 2 bytes (all zeroes), doing a "fastboot erase" won't cut it, the bootloader will go crazy and things will fall apart when it tries to overlay random bytes from an empty partition onto a perfectly good appended DTB. Signed-off-by:
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Konrad Dybcio authored
Assign the iommus property to allow access to QUP hosts that were not set up by the bootloader. Signed-off-by:
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Konrad Dybcio authored
Set up I2C&SPI hosts and UARTs connected to WRAP2 and their respective pins. Signed-off-by:
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Konrad Dybcio authored
Set up I2C&SPI hosts and UARTs connected to WRAP1 and their respective pins. Signed-off-by:
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Konrad Dybcio authored
Set up I2C&SPI hosts and UARTs connected to WRAP0 and their respective pins. Signed-off-by:
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Konrad Dybcio authored
Add all the clock names that the GCC driver expects to get via DT, so that the clock handles can be filled as the development progresses. Signed-off-by:
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Konrad Dybcio authored
Disable PON/RESIN keys by default and keep the RESIN keycode set-per-board, as these settings are not common between devices (one cannot even assume all devices have buttons nowadays..). Signed-off-by:
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Konrad Dybcio authored
Thermal zone names should not be longer than 20 names, which is indicated by a message at boot. Change "camera-thermal-bottom" to "cam-thermal-bottom" to fix it. Signed-off-by:
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Konrad Dybcio authored
Using interrupts = <&pdc X Y> makes the interrupt framework interpret this as the &pdc-nth range of the main interrupt controller (GIC). Fix it. Signed-off-by:
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Konrad Dybcio authored
Arch timer runs at 19.2 MHz. Specify the rate in the timer node. Signed-off-by:
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Konrad Dybcio authored
The redistributor properties were missing. Add them. Signed-off-by:
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Konrad Dybcio authored
Add the missing third QUPv3 master node. Signed-off-by:
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Konrad Dybcio authored
Almost any board that boots and has a way to interact with it (say for the rare cases of just-pstore or let's-rely-on-bootloader-setup) needs to set some GPIOs, so it makes no sense to include gpio.h separately each time. Hence move it to SoC DTSI. Signed-off-by:
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Shawn Guo authored
QUSB2 PHY requires vdd-supply for digital circuit operation. Add it for platforms that miss it. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Acked-by:
Vinod Koul <vkoul@kernel.org> Signed-off-by:
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Yassine Oudjana authored
This platform actually doesn't have TUSB320, but rather TUSB320L. The TUSB320 compatible string was used due to lack of support for TUSB320L, and it was close enough to detect cable plug-in and direction, but it was limited to upstream facing port mode only. Now that support for TUSB320L is added[1], change node name and compatible to match and allow it to be properly reset and have its mode set to dual-role port. [1] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=ce0320bd3872038569be360870e2d5251b975692Signed-off-by:
Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by:
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Yassine Oudjana authored
Add a node and pin states for Cypress StreetFighter touchkey controller. Signed-off-by:
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Dmitry Baryshkov authored
Device tree for the Sony Xperia tone family of devices specifies S9+S10+S11 SAW regulator as a part of the pmi8994_spmi_regulators device tree node. However PMI8994 does not have these regulators, they are part of the PM8994 device. All other MSM8996-based devices list them in the pm8994_spmi_regulators device tree node. Move them accordingly. Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
The qcom_rpm_smd_regulator driver uses vdd_lvs1_2-supply property to specify the supply regulator for LVS1 and LVS2 (following the pin name in the PMIC datasheet). Correct the board's device tree property, so that the regulator supply is setup properly. Cc: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Dmitry Baryshkov authored
The qcom_rpm_smd_regulator driver uses vdd_lvs1_2-supply property to specify the supply regulator for LVS1 and LVS2 (following the pin name in the PMIC datasheet). Correct the board's device tree property, so that the regulator supply is setup properly. Signed-off-by:
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Dmitry Baryshkov authored
Specify that S11 (well, whole block of s8+s9+s10+s11) of pm8994 and S2 (s2 + s3) of pmi8994 are supplied by vph_pwr. While we are at it, add regulator name to S11, so that is displayed as VDD_APCC in the system. Signed-off-by:
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Dmitry Baryshkov authored
Specify firmware name to be used for the ADSP. Quoting Bjorn from the respective apq8016-sbc commit: The firmware for the modem and WiFi subsystems platform specific and is signed with a OEM specific key (or a test key). In order to support more than a single device it is therefor not possible to rely on the default path and stash these files directly in the firmware directory. Signed-off-by:
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Konrad Dybcio authored
Add support for SONY Xperia XZ2, XZ2 Compact and XZ3 smartphones, all based on the Qualcomm SDM845 chipset. There also exists a fourth Tama device, the XZ2 Premium (Aurora) with a 4K display, but it's relatively rare. The devices are affected by a scary UFS behaviour where sending a certain UFS command (which is worked around on downstream) renders the device unbootable, by effectively erasing the bootloader. Therefore UFS AND UFSPHY are strictly disabled for now. Downstream workaround: https://github.com/kholk/kernel/commit/2e7a9ee1c91a016baa0b826a7752ec45663a0561 This platform's bootloader is not very nice either. To boot mainline you need to flash a bogus DTBO (fastboot erasing may cut it, but it takes an inhumane amount of time) - one that's just 4 bytes (all zeroes) seems to work just fine. Of course, one can also provide a "normal" DTBO (device-specific DT overlayed on top of the SoC DT), but that's not yet supported by the mainline kernel build system. Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by:
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David Heidelberg authored
These properties aren't documented nor implemented in the driver. Drop them. Fixes warnings as: $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/msm/gpu.yaml ... arch/arm64/boot/dts/qcom/msm8996-mtp.dt.yaml: gpu@b00000: 'qcom,gpu-quirk-fault-detect-mask', 'qcom,gpu-quirk-two-pass-use-wfi' do not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/display/msm/gpu.yaml ... Fixes: 69cc3114 ("arm64: dts: Add Adreno GPU definitions") Signed-off-by:
David Heidelberg <david@ixit.cz> Signed-off-by:
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Philip Chen authored
Support Homestar rev4 board where Parade ps8640 is added as the second source edp bridge. Support different edp bridge chips in different board revisions, now we move the #incldue line of the edp bridge dts fragment (e.g. sc7180-trogdor-ti-sn65dsi86.dtsi) from "sc7180-trogdor-homestar.dtsi" to per-board-rev dts files. Since the edp bridge dts fragment overrides 'dsi0_out', which is defined in "sc7180.dtsi", move the #incldue line of "sc7180.dtsi" from "sc7180-trogdor-homestar.dtsi" to per-board-rev dts files too, before the #include line of the edp bridge dts fragment. Signed-off-by:
Philip Chen <philipchen@chromium.org> Reviewed-by:
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Philip Chen authored
Support Lazor/Limozeen rev9 board where Parade ps8640 is added as the second source edp bridge. To support different edp bridge chips in different board revisions, now we move the #incldue line of the edp bridge dts fragment (e.g. sc7180-trogdor-ti-sn65dsi86.dtsi) from "sc7180-trogdor-lazor.dtsi" to per-board-rev dts files. Since the edp bridge dts fragment overrides 'dsi0_out', which is defined in "sc7180.dtsi", move the #incldue line of "sc7180.dtsi" from "sc7180-trogdor-lazor.dtsi" to per-board-rev dts files too, before the #include line of the edp bridge dts fragment. Signed-off-by:
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Philip Chen authored
MSM DSI host driver actually parses "data-lanes" in DT and compare it with the number of DSI lanes the bridge driver sets for mipi_dsi_device. So we need to always specify "data-lanes" for the DSI host output. As of now, "data-lanes" is added to ti-sn65dsi86 dts fragment, but missing in parade-ps8640 dts fragment, which requires a fixup. Since we'll do 4-lane DSI regardless of which bridge chip is used, instead of adding "data-lanes" to parade-ps8640 dts fragment, let's just move "data-lanes" from the bridge dts to sc7180-trogdor.dtsi. Signed-off-by:
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Philip Chen authored
The edp bridge dts fragment files use the macros defined in 'dt-bindings/gpio/gpio.h'. To help us more flexibly order the #include lines of dts files in a board-revision-specific dts file, let's include the gpio header in the bridge dts fragment files themselves. Signed-off-by:
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