- 29 Dec, 2022 1 commit
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Luca Weiss authored
Adjust node names so they're not just memory@ but actually show what they're used for. Also add labels to most nodes so we can easily reference them from devices. Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221207-msm8953-6-1-next-dtbs-v3-v3-2-a64b3b0af0eb@z3ntu.xyz
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- 28 Dec, 2022 39 commits
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Dzmitry Sankouski authored
resin node declaration was moved to pm8998.dtsi file (in disabled state). MSM8998 and SDM845 boards defining resin node did not previously have status="okay" and ended up disabled. Re-enable it by using resin node link from pm8998.dtsi with status="okay". Fixes: f86ae6f2 ("arm64: dts: qcom: sagit: add initial device tree for sagit") Signed-off-by:
Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Reported-by:
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Youghandhar Chintala authored
Currently, depth-charge Chrome OS bootloader code used in the SC7280 SoC accesses the WiFi node using node names (wifi@<addr>). Since depth-charge Chrome OS bootloader is a common code that is used in SoCs having different WiFi chipsets, it is better if the depth-charge Chrome OS bootloader code accesses the WiFi node using a WiFi alias. The advantage of this method is that the depth-charge Chrome OS bootloader code need not be changed for every new WiFi chip. Therefore, add wifi alias entry for SC7280-idp device tree. Signed-off-by:
Youghandhar Chintala <quic_youghand@quicinc.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Johan Hovold authored
Move the new 'regulator-vph-pwr' node before the wlan regulator node to restore the root-node sort order (alphabetically by node name). While at it, add a couple of newlines to separate the properties for consistency with the other regulator nodes. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Steev Klimaszewski authored
The firmware paths were pointing to qcom/manufacturer whereas other devices have them under qcom/chipset/manufacturer, so fix this up on the c630, so we follow the same standard setup. Signed-off-by:
Steev Klimaszewski <steev@kali.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Souradeep Chowdhury authored
Add the DCC(Data Capture and Compare) device tree node entry along with the address of the register region. Signed-off-by:
Souradeep Chowdhury <quic_schowdhu@quicinc.com> Signed-off-by:
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Souradeep Chowdhury authored
Add the DCC(Data Capture and Compare) device tree node entry along with the address of the register region. Signed-off-by:
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Souradeep Chowdhury authored
Add the DCC(Data Capture and Compare) device tree node entry along with the address of the register region. Signed-off-by:
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Souradeep Chowdhury authored
Add the DCC(Data Capture and Compare) device tree node entry along with the addresses for register regions. Signed-off-by:
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Marijn Suijten authored
Allow the Adreno GPU to access split pagetables specifically on the dedicated Adreno SMMU via the qcom,adreno-smmu compatible. Signed-off-by:
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Vinod Koul authored
Add the HDMI display nodes and link it to DSI. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
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Vinod Koul authored
Add the LT9611uxc DSI-HDMI bridge and supplies Signed-off-by:
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Dmitry Baryshkov authored
Enable MDSS/DPU/DSI0 on SM8450-HDK device. Reviewed-by:
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Dmitry Baryshkov authored
Add devices tree nodes describing display hardware on SM8450: - Display Clock Controller - MDSS - MDP - two DSI controllers and DSI PHYs This does not provide support for DP controllers present on SM8450. Reviewed-by:
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Dmitry Baryshkov authored
Add another power saving state used on SM8450. Unfortunately adding it in proper place causes renumbering of all the opp states in sm8450.dtsi Reviewed-by:
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Richard Acayan authored
According to the downstream device tree, the regulator that powers the I/O for eMMC should not be turned off. Keep it always on just in case the eMMC driver fails and doesn't enable it, or unloads and disables it. Fixes: 07c8ded6 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees") Link: https://android.googlesource.com/kernel/msm/+/9ed6ddbe955d3b84d1416a1cf77e83904d1e8421/arch/arm64/boot/dts/google/sdm670-bonito-common.dtsi#105Signed-off-by:
Richard Acayan <mailingradian@gmail.com> Signed-off-by:
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Johan Hovold authored
Move the 'thermal-zones' node after the regulator nodes to restore the root-node sort order (alphabetically by node name). Signed-off-by:
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Konrad Dybcio authored
Remove unnecessary newlines and fix up whitespace near the soundwire controller node. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
Use lowercase hex, as that's the preferred and overwhermingly present style. Signed-off-by:
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Konrad Dybcio authored
On eMMC devices, the UFS clocks aren't started in the bootloader (or well, at least it should not be, as that would just leak power..), which results in platform reboots when trying to access the unclocked UFS hardware, which unfortunately happens on each and every boot, as interconnect calls sync_state and goes over each and every path. Signed-off-by:
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Marijn Suijten authored
The volume-up button on both kumanos (Xperia 1 and Xperia 5) are mapped to resin. Signed-off-by:
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Konrad Dybcio authored
Add a node for NXP PN553 NFC (or PN557, unclear data), using the nxp-nci driver. Signed-off-by:
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Konrad Dybcio authored
Configure hardware buttons (V-, Camera Shutter/Focus) on Kumano devices. Signed-off-by:
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Konrad Dybcio authored
Align the style with other boards. Signed-off-by:
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Konrad Dybcio authored
With the recent patch that allowed us to reset the SDHCI controller from Linux, things started working properly. Enable SDHCI1, and by extension eMMC. Also, remove the now-useless cmdline SDHCI quirks. Signed-off-by:
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Krzysztof Kozlowski authored
The sound and codec nodes are not a property of a soc, but rather board as it describes the sound configuration. It also does not have unit address: sm8250-hdk.dtb: soc@0: sound: {} should not be valid under {'type': 'object'} Signed-off-by: -
Krzysztof Kozlowski authored
The sound node is not a property of a soc, but rather board as it describes the sound configuration. It also does not have unit address: sdm845-shift-axolotl.dtb: soc@0: sound: {} should not be valid under {'type': 'object'} Signed-off-by: -
Krzysztof Kozlowski authored
The SoC node is a simple-bus and its schema expect to have nodes only with unit addresses: sdm850-lenovo-yoga-c630.dtb: soc@0: opp-table-qup: {'compatible': ['operating-points-v2'], 'phandle': [[60]], 'opp-50000000': ... 'required-opps': [[55]]}} should not be valid under {'type': 'object'} Move to top-level OPP tables: - DSI and QUP which are shared between multiple nodes, - QSPI which cannot be placed in its node due to address/size cells. Signed-off-by: -
Krzysztof Kozlowski authored
The SoC node is a simple-bus and its schema expect to have nodes only with unit addresses: sc7180-trogdor-lazor-r3.dtb: soc@0: opp-table-qspi: {'compatible': ['operating-points-v2'], 'phandle': [[186]], 'opp-75000000': ... 'required-opps': [[47]]}} should not be valid under {'type': 'object'} Move to top-level OPP tables: - QUP which is shared between multiple nodes, - QSPI which cannot be placed in its node due to address/size cells. Signed-off-by: -
Krzysztof Kozlowski authored
By coding style, unit address should not start with 0x. Signed-off-by:
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Konrad Dybcio authored
Fix up the ramoops node to make it match bindings and style: - remove "removed-dma-pool" - don't pad size to 8 hex digits - change cc-size to ecc-size so that it's used - increase ecc-size from to 16 - remove the zeroed ftrace-size Fixes: 5f82b9cd ("arm64: dts: qcom: Add SM6350 device tree") Reported-by:
Luca Weiss <luca.weiss@fairphone.com> Signed-off-by:
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Marijn Suijten authored
The gpio node in PMIC dts'es define access to multiple GPIOs. Most Qcom PMICs were already using the plural _gpios label to point to this node, but a few PMICs were left behind including the recently-pulled pm(i)8950. Rename it from *_gpio to *_gpios for pm6125, pm6150(l), pm8005, pm(i)8950, and pm(i)8998. Signed-off-by:
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Marijn Suijten authored
This was pointed out in review but never followed up on thanks to sidetracked discussions about labels vs node names. Fixes: 0d97fdf3 ("arm64: dts: qcom: Add configuration for PMI8950 peripheral") Signed-off-by:
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