1. 11 May, 2022 1 commit
  2. 09 May, 2022 2 commits
  3. 05 May, 2022 10 commits
  4. 04 May, 2022 1 commit
  5. 02 May, 2022 1 commit
  6. 29 Apr, 2022 1 commit
  7. 28 Apr, 2022 3 commits
  8. 27 Apr, 2022 2 commits
    • Matt Roper's avatar
      drm/i915: Add first set of DG2 PCI IDs · 1bc4ae0c
      Matt Roper authored
      The IDs added here are the subset reserved for 'motherboard down'
      designs of DG2.  We have all the necessary support upstream to enable
      these now (although they'll continue to require force_probe until the
      usual requirements are met).
      
      The remaining DG2 IDs for add-in cards will come in a future patch once
      some additional required functionality has fully landed.
      
      Bspec: 44477
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Cc: Daniel Vetter <daniel@ffwll.ch>
      Cc: Dave Airlie <airlied@gmail.com>
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Jani Nikula <jani.nikula@intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220425211251.77154-3-matthew.d.roper@intel.com
      1bc4ae0c
    • Imre Deak's avatar
      drm/i915/dp: Add workaround for spurious AUX timeouts/hotplugs on LTTPR links · eddbb074
      Imre Deak authored
      To avoid AUX timeouts and subsequent spurious hotplug interrupts, make
      sure that the first DPCD access during detection is a read from an LTTPR
      register.
      
      Some ADLP DP link configuration at least with multiple LTTPRs expects
      the first DPCD access during the LTTPR/DPCD detection after hotplug to
      be a read from the LTTPR range starting with
      DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV. The side effect of
      this read is to put each LTTPR into the LTTPR transparent or LTTPR
      non-transparent mode.
      
      The lack of the above read may leave some of the LTTPRs in non-LTTPR
      mode, while other LTTPRs in LTTPR transparent or LTTPR non-transparent
      mode (for instance LTTPRs after system suspend/resume that kept their
      mode from before suspend). Due to the different AUX timeouts the
      different modes imply, the DPCD access from a non-LTTPR range will
      timeout and lead to an LTTPR generated hotplug towards the source (which
      the LTTPR firmware uses to account for buggy TypeC adapters with a long
      wake-up delay).
      
      SYSCROS: 72939
      
      v2: Keep DPCD read-out working on non-LTTPR platforms.
      v3: Summarize what and why the patch does at the beginning of the commit
          log. (Jani)
      Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
      Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220408224629.845887-1-imre.deak@intel.com
      eddbb074
  9. 26 Apr, 2022 3 commits
  10. 25 Apr, 2022 13 commits
  11. 22 Apr, 2022 1 commit
  12. 21 Apr, 2022 2 commits