The main pll controller used to drive theC66x CorePacs, the switch fabric,
and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
the NETCP modules) requires a PLL Controller to manage the various clock
divisions, gating, and synchronization.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
[santosh.shilimkar@ti.com: Fixed the subject line]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>