UART driver for Motorola CPM/CPM2 I/O core on 8xx/8xxx chips.

drivers/serial/Kconfig

@@ -616,5 +616,65 @@ config SERIAL_PMACZILOG_CONSOLE
 	  on your PowerMac as the console, you can do so by answering
 	  Y to this option.
 
+config SERIAL_CPM
+	tristate "CPM2 SCC/SMC serial port support"
+	depends on CPM2 || 8xx
+	select SERIAL_CORE
+	help
+	  This driver supports the SCC and SMC serial ports on Motorola 
+	  embedded PowerPC that contain a CPM2 (8xxx) or a CPM1 (8xx)
+
+config SERIAL_CPM_CONSOLE
+	bool "Support for console on CPM2 SCC/SMC serial port"
+	depends on SERIAL_CPM=y
+	select SERIAL_CORE_CONSOLE
+	help
+	  Say Y here if you wish to use a SCC or SMC CPM UART as the system
+	  console (the system console is the device which receives all kernel
+	  messages and warnings and which allows logins in single user mode).
+
+	  Even if you say Y here, the currently visible framebuffer console
+	  (/dev/tty0) will still be used as the system console by default, but
+	  you can alter that using a kernel command line option such as
+	  "console=ttyCPM0". (Try "man bootparam" or see the documentation of
+	  your boot loader (lilo or loadlin) about how to pass options to the
+	  kernel at boot time.)
+
+config SERIAL_CPM_SCC1
+	bool "Support for SCC1 serial port"
+	depends on SERIAL_CPM=y
+	help
+	  Select the is option to use SCC1 as a serial port
+
+config SERIAL_CPM_SCC2
+	bool "Support for SCC2 serial port"
+	depends on SERIAL_CPM=y
+	help
+	  Select the is option to use SCC2 as a serial port
+
+config SERIAL_CPM_SCC3
+	bool "Support for SCC3 serial port"
+	depends on SERIAL_CPM=y
+	help
+	  Select the is option to use SCC3 as a serial port
+
+config SERIAL_CPM_SCC4
+	bool "Support for SCC4 serial port"
+	depends on SERIAL_CPM=y
+	help
+	  Select the is option to use SCC4 as a serial port
+
+config SERIAL_CPM_SMC1
+	bool "Support for SMC1 serial port"
+	depends on SERIAL_CPM=y
+	help
+	  Select the is option to use SMC1 as a serial port
+
+config SERIAL_CPM_SMC2
+	bool "Support for SMC2 serial port"
+	depends on SERIAL_CPM=y
+	help
+	  Select the is option to use SMC2 as a serial port
+
 endmenu
 

drivers/serial/Makefile

@@ -39,3 +39,4 @@ obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o
 obj-$(CONFIG_SERIAL_DZ) += dz.o
 obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
 obj-$(CONFIG_SERIAL_BAST_SIO) += bast_sio.o
+obj-$(CONFIG_SERIAL_CPM) += cpm_uart/

drivers/serial/cpm_uart/Makefile

+#
+# Makefile for the Motorola 8xx FEC ethernet controller
+#
+
+obj-$(CONFIG_SERIAL_CPM) += cpm_uart.o
+
+# Select the correct platform objects.
+cpm_uart-objs-$(CONFIG_CPM2)	+= cpm_uart_cpm2.o
+cpm_uart-objs-$(CONFIG_8xx)	+= cpm_uart_cpm1.o
+
+cpm_uart-objs	:= cpm_uart_core.o $(cpm_uart-objs-y)

drivers/serial/cpm_uart/cpm_uart.h

+/*
+ *  linux/drivers/serial/cpm_uart.h
+ *
+ *  Driver for CPM (SCC/SMC) serial ports
+ *
+ *  Copyright (C) 2004 Motorola, Inc
+ *
+ */
+#ifndef CPM_UART_H
+#define CPM_UART_H
+
+#include <linux/config.h>
+
+#if defined(CONFIG_CPM2)
+#include "cpm_uart_cpm2.h"
+#elif defined(CONFIG_8xx)
+#include "cpm_uart_cpm1.h"
+#endif
+
+#ifndef CONFIG_SERIAL_8250
+#define SERIAL_CPM_MAJOR	TTY_MAJOR
+#define SERIAL_CPM_MINOR	64
+#else
+#define SERIAL_CPM_MAJOR	204
+#define SERIAL_CPM_MINOR	42
+#endif
+
+#define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC)
+#define FLAG_SMC	0x00000002
+#define FLAG_CONSOLE	0x00000001
+
+#define UART_SMC1	0
+#define UART_SMC2	1
+#define UART_SCC1	2
+#define UART_SCC2	3
+#define UART_SCC3	4
+#define UART_SCC4	5
+
+#define UART_NR	6
+
+#define RX_NUM_FIFO	4
+#define RX_BUF_SIZE	32
+#define TX_NUM_FIFO	4
+#define TX_BUF_SIZE	32
+
+struct uart_cpm_port {
+	struct uart_port port;
+	u16 rx_nrfifos;
+	u16 rx_fifosize;
+	u16 tx_nrfifos;
+	u16 tx_fifosize;
+	smc_t *smcp;
+	volatile smc_uart_t *smcup;
+	scc_t *sccp;
+	scc_uart_t *sccup;
+	volatile cbd_t *rx_bd_base;
+	volatile cbd_t *rx_cur;
+	volatile cbd_t *tx_bd_base;
+	volatile cbd_t *tx_cur;
+	unsigned char *tx_buf;
+	unsigned char *rx_buf;
+	u32 flags;
+	void (*set_lineif) (struct uart_cpm_port *);
+	u8 brg;
+	uint dp_addr;
+	void *mem_addr;
+	dma_addr_t dma_addr;
+	int baud;
+	int bits;
+};
+
+extern int cpm_uart_port_map[UART_NR];
+extern int cpm_uart_nr;
+extern struct uart_cpm_port cpm_uart_ports[UART_NR];
+
+/* these are located in their respective files */
+extern void cpm_line_cr_cmd(int line, int cmd);
+extern int cpm_uart_init_portdesc(void);
+extern int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
+extern void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
+
+extern void smc1_lineif(struct uart_cpm_port *pinfo);
+extern void smc2_lineif(struct uart_cpm_port *pinfo);
+extern void scc1_lineif(struct uart_cpm_port *pinfo);
+extern void scc2_lineif(struct uart_cpm_port *pinfo);
+extern void scc3_lineif(struct uart_cpm_port *pinfo);
+extern void scc4_lineif(struct uart_cpm_port *pinfo);
+
+#endif				/* CPM_UART_H */

drivers/serial/cpm_uart/cpm_uart_cpm1.c

+/*
+ *  linux/drivers/serial/cpm_uart.c
+ *
+ *  Driver for CPM (SCC/SMC) serial ports; CPM1 definitions
+ *
+ *  Maintainer: Kumar Gala (kumar.gala@motorola.com)  (CPM2)
+ *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
+ * 
+ *  Copyright (C) 2004 Motorola, Inc
+ *            (C) 2004 Intracom, S.A.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/tty.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/console.h>
+#include <linux/sysrq.h>
+#include <linux/device.h>
+#include <linux/bootmem.h>
+#include <linux/dma-mapping.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include <linux/serial_core.h>
+#include <linux/kernel.h>
+
+#include "cpm_uart.h"
+
+/**************************************************************/
+
+void cpm_line_cr_cmd(int line, int cmd)
+{
+	ushort val;
+	volatile cpm8xx_t *cp = cpmp;
+
+	switch (line) {
+	case UART_SMC1:
+		val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG;
+		break;
+	case UART_SMC2:
+		val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG;
+		break;
+	case UART_SCC1:
+		val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG;
+		break;
+	case UART_SCC2:
+		val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG;
+		break;
+	case UART_SCC3:
+		val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG;
+		break;
+	case UART_SCC4:
+		val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG;
+		break;
+	default:
+		return;
+
+	}
+	cp->cp_cpcr = val;
+	while (cp->cp_cpcr & CPM_CR_FLG) ;
+}
+
+void smc1_lineif(struct uart_cpm_port *pinfo)
+{
+	volatile cpm8xx_t *cp = cpmp;
+
+	cp->cp_pbpar |= 0x000000c0;
+	cp->cp_pbdir &= ~0x000000c0;
+	cp->cp_pbodr &= ~0x000000c0;
+
+	pinfo->brg = 1;
+}
+
+void smc2_lineif(struct uart_cpm_port *pinfo)
+{
+	/* XXX SMC2: insert port configuration here */
+	pinfo->brg = 2;
+}
+
+void scc1_lineif(struct uart_cpm_port *pinfo)
+{
+	/* XXX SCC1: insert port configuration here */
+	pinfo->brg = 1;
+}
+
+void scc2_lineif(struct uart_cpm_port *pinfo)
+{
+	/* XXX SCC2: insert port configuration here */
+	pinfo->brg = 2;
+}
+
+void scc3_lineif(struct uart_cpm_port *pinfo)
+{
+	/* XXX SCC3: insert port configuration here */
+	pinfo->brg = 3;
+}
+
+void scc4_lineif(struct uart_cpm_port *pinfo)
+{
+	/* XXX SCC4: insert port configuration here */
+	pinfo->brg = 4;
+}
+
+/*
+ * Allocate DP-Ram and memory buffers. We need to allocate a transmit and 
+ * receive buffer descriptors from dual port ram, and a character
+ * buffer area from host mem. If we are allocating for the console we need
+ * to do it from bootmem
+ */
+int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
+{
+	int dpmemsz, memsz;
+	uint dp_addr;
+	u8 *mem_addr;
+	dma_addr_t dma_addr;
+
+	pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line);
+
+	dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos);
+	dp_addr = m8xx_cpm_dpalloc(dpmemsz);
+	if (dp_addr == CPM_DP_NOSPACE) {
+		printk(KERN_ERR
+		       "cpm_uart_cpm1.c: could not allocate buffer descriptors\n");
+		return -ENOMEM;
+	}
+
+	memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
+	    L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
+	if (is_con) {
+		mem_addr = (u8 *) m8xx_cpm_hostalloc(memsz);
+		dma_addr = 0;
+	} else
+		mem_addr = dma_alloc_coherent(NULL, memsz, &dma_addr,
+					      GFP_KERNEL);
+
+	/* We cant really from memory allocated via cpm2_dpalloc,
+	 * fix this if in the future we can */
+	if (mem_addr == NULL) {
+		/* XXX cpm_dpalloc does not yet free */
+		printk(KERN_ERR
+		       "cpm_uart_cpm1.c: could not allocate coherent memory\n");
+		return -ENOMEM;
+	}
+
+	pinfo->dp_addr = dp_addr;
+	pinfo->mem_addr = mem_addr;
+	pinfo->dma_addr = dma_addr;
+
+	pinfo->rx_buf = mem_addr;
+	pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
+						       * pinfo->rx_fifosize);
+
+	pinfo->rx_bd_base = (volatile cbd_t *)(DPRAM_BASE + dp_addr);
+	pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
+
+	return 0;
+}
+
+void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
+{
+	dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos *
+					       pinfo->rx_fifosize) +
+			  L1_CACHE_ALIGN(pinfo->tx_nrfifos *
+					 pinfo->tx_fifosize), pinfo->mem_addr,
+			  pinfo->dma_addr);
+
+	/* XXX cannot free dpmem yet */
+}
+
+/* Setup any dynamic params in the uart desc */
+int cpm_uart_init_portdesc(void)
+{
+	pr_debug("CPM uart[-]:init portdesc\n");
+
+	cpm_uart_nr = 0;
+#ifdef CONFIG_SERIAL_CPM_SMC1
+	cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0];
+	cpm_uart_ports[UART_SMC1].smcup =
+	    (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1];
+	cpm_uart_ports[UART_SMC1].port.mapbase =
+	    (unsigned long)&cpmp->cp_smc[0];
+	cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
+	cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
+	cpm_uart_ports[UART_SMC1].port.uartclk = (((bd_t *) __res)->bi_intfreq);
+	cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SMC2
+	cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1];
+	cpm_uart_ports[UART_SMC2].smcup =
+	    (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2];
+	cpm_uart_ports[UART_SMC2].port.mapbase =
+	    (unsigned long)&cpmp->cp_smc[1];
+	cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
+	cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
+	cpm_uart_ports[UART_SMC2].port.uartclk = (((bd_t *) __res)->bi_intfreq);
+	cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC1
+	cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0];
+	cpm_uart_ports[UART_SCC1].sccup =
+	    (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1];
+	cpm_uart_ports[UART_SCC1].port.mapbase =
+	    (unsigned long)&cpmp->cp_scc[0];
+	cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
+	    ~(UART_SCCM_TX | UART_SCCM_RX);
+	cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
+	    ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+	cpm_uart_ports[UART_SCC1].port.uartclk = (((bd_t *) __res)->bi_intfreq);
+	cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC2
+	cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1];
+	cpm_uart_ports[UART_SCC2].sccup =
+	    (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2];
+	cpm_uart_ports[UART_SCC2].port.mapbase =
+	    (unsigned long)&cpmp->cp_scc[1];
+	cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
+	    ~(UART_SCCM_TX | UART_SCCM_RX);
+	cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
+	    ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+	cpm_uart_ports[UART_SCC2].port.uartclk = (((bd_t *) __res)->bi_intfreq);
+	cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC3
+	cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2];
+	cpm_uart_ports[UART_SCC3].sccup =
+	    (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3];
+	cpm_uart_ports[UART_SCC3].port.mapbase =
+	    (unsigned long)&cpmp->cp_scc[2];
+	cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
+	    ~(UART_SCCM_TX | UART_SCCM_RX);
+	cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
+	    ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+	cpm_uart_ports[UART_SCC3].port.uartclk = (((bd_t *) __res)->bi_intfreq);
+	cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+	cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3];
+	cpm_uart_ports[UART_SCC4].sccup =
+	    (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4];
+	cpm_uart_ports[UART_SCC4].port.mapbase =
+	    (unsigned long)&cpmp->cp_scc[3];
+	cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
+	    ~(UART_SCCM_TX | UART_SCCM_RX);
+	cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
+	    ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+	cpm_uart_ports[UART_SCC4].port.uartclk = (((bd_t *) __res)->bi_intfreq);
+	cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
+#endif
+	return 0;
+}

drivers/serial/cpm_uart/cpm_uart_cpm1.h

+/*
+ * linux/drivers/serial/cpm_uart_cpm1.h
+ *
+ * Driver for CPM (SCC/SMC) serial ports
+ * 
+ * definitions for cpm1
+ *
+ */
+
+#ifndef CPM_UART_CPM1_H
+#define CPM_UART_CPM1_H
+
+#include <asm/commproc.h>
+
+/* defines for IRQs */
+#define SMC1_IRQ	(CPM_IRQ_OFFSET + CPMVEC_SMC1)
+#define SMC2_IRQ	(CPM_IRQ_OFFSET + CPMVEC_SMC2)
+#define SCC1_IRQ	(CPM_IRQ_OFFSET + CPMVEC_SCC1)
+#define SCC2_IRQ	(CPM_IRQ_OFFSET + CPMVEC_SCC2)
+#define SCC3_IRQ	(CPM_IRQ_OFFSET + CPMVEC_SCC3)
+#define SCC4_IRQ	(CPM_IRQ_OFFSET + CPMVEC_SCC4)
+
+/* the CPM address */
+#define CPM_ADDR	IMAP_ADDR
+
+static inline void cpm_set_brg(int brg, int baud)
+{
+	m8xx_cpm_setbrg(brg, baud);
+}
+
+static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup)
+{
+	sup->scc_genscc.scc_rfcr = SMC_EB;
+	sup->scc_genscc.scc_tfcr = SMC_EB;
+}
+
+static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
+{
+	up->smc_rfcr = SMC_EB;
+	up->smc_tfcr = SMC_EB;
+}
+
+#define DPRAM_BASE	((unsigned char *)&cpmp->cp_dpmem[0])
+
+#endif

drivers/serial/cpm_uart/cpm_uart_cpm2.h

+/*
+ * linux/drivers/serial/cpm_uart_cpm2.h
+ *
+ * Driver for CPM (SCC/SMC) serial ports
+ * 
+ * definitions for cpm2
+ *
+ */
+
+#ifndef CPM_UART_CPM2_H
+#define CPM_UART_CPM2_H
+
+#include <asm/cpm2.h>
+
+/* defines for IRQs */
+#define SMC1_IRQ	SIU_INT_SMC1
+#define SMC2_IRQ	SIU_INT_SMC2
+#define SCC1_IRQ	SIU_INT_SCC1
+#define SCC2_IRQ	SIU_INT_SCC2
+#define SCC3_IRQ	SIU_INT_SCC3
+#define SCC4_IRQ	SIU_INT_SCC4
+
+/* the CPM address */
+#define CPM_ADDR	CPM_MAP_ADDR
+
+static inline void cpm_set_brg(int brg, int baud)
+{
+	cpm2_setbrg(brg, baud);
+}
+
+static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup)
+{
+	sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
+	sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
+}
+
+static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
+{
+	up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB;
+	up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
+}
+
+#define DPRAM_BASE	((unsigned char *)&cpm2_immr->im_dprambase[0])
+
+#endif

include/linux/serial_core.h

@@ -88,6 +88,9 @@
 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
 #define PORT_IP22ZILOG	56
 
+/* PPC CPM type number */
+#define PORT_CPM        57
+
 #ifdef __KERNEL__
 
 #include <linux/config.h>