Merge nuts.ninka.net:/home/davem/src/BK/sparc-sound-2.5

into nuts.ninka.net:/home/davem/src/BK/sparc-2.5

arch/sparc/config.in

@@ -70,7 +70,6 @@ source drivers/mtd/Config.in
 source drivers/serial/Config.in
 if [ "$CONFIG_SUN4" != "y" ]; then
    source drivers/sbus/char/Config.in
-   source drivers/sbus/audio/Config.in
 fi
 
 mainmenu_option next_comment
@@ -223,9 +222,15 @@ source drivers/input/Config.in
 
 source fs/Config.in
 
-if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
-   source net/bluetooth/Config.in
+tristate 'Sound card support' CONFIG_SOUND
+if [ "$CONFIG_SOUND" != "n" ]; then
+   source sound/Config.in
 fi
+endmenu
+
+source drivers/usb/Config.in
+
+source net/bluetooth/Config.in
 
 mainmenu_option next_comment
 comment 'Watchdog'

arch/sparc64/config.in

@@ -78,7 +78,6 @@ endmenu
 
 source drivers/serial/Config.in
 source drivers/sbus/char/Config.in
-source drivers/sbus/audio/Config.in
 source drivers/mtd/Config.in
 mainmenu_option next_comment
 comment 'Block devices'

arch/sparc64/defconfig

@@ -159,13 +159,6 @@ CONFIG_OBP_FLASH=m
 # CONFIG_SUN_VIDEOPIX is not set
 CONFIG_SUN_AURORA=m
 
-#
-# Linux/SPARC audio subsystem (EXPERIMENTAL)
-#
-CONFIG_SPARCAUDIO=m
-CONFIG_SPARCAUDIO_CS4231=m
-# CONFIG_SPARCAUDIO_DUMMY is not set
-
 #
 # Memory Technology Devices (MTD)
 #
@@ -497,6 +490,7 @@ CONFIG_8139TOO=m
 CONFIG_SIS900=m
 CONFIG_EPIC100=m
 CONFIG_SUNDANCE=m
+CONFIG_SUNDANCE_MMIO=y
 # CONFIG_TLAN is not set
 CONFIG_VIA_RHINE=m
 # CONFIG_VIA_RHINE_MMIO is not set
@@ -842,7 +836,64 @@ CONFIG_SOUND=m
 #
 # Advanced Linux Sound Architecture
 #
-# CONFIG_SND is not set
+CONFIG_SND=m
+CONFIG_SND_BIT32_EMUL=m
+CONFIG_SND_SEQUENCER=m
+CONFIG_SND_SEQ_DUMMY=m
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_RTCTIMER is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_DEBUG_MEMORY is not set
+# CONFIG_SND_DEBUG_DETECT is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_DUMMY=m
+CONFIG_SND_VIRMIDI=m
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+CONFIG_SND_ALI5451=m
+CONFIG_SND_CS46XX=m
+CONFIG_SND_CS46XX_ACCEPT_VALID=y
+CONFIG_SND_CS4281=m
+CONFIG_SND_EMU10K1=m
+CONFIG_SND_KORG1212=m
+CONFIG_SND_NM256=m
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_HDSP is not set
+CONFIG_SND_TRIDENT=m
+CONFIG_SND_YMFPCI=m
+CONFIG_SND_ALS4000=m
+CONFIG_SND_CMIPCI=m
+CONFIG_SND_ENS1370=m
+CONFIG_SND_ENS1371=m
+CONFIG_SND_ES1938=m
+CONFIG_SND_ES1968=m
+CONFIG_SND_MAESTRO3=m
+CONFIG_SND_FM801=m
+CONFIG_SND_ICE1712=m
+CONFIG_SND_INTEL8X0=m
+CONFIG_SND_SONICVIBES=m
+CONFIG_SND_VIA686=m
+CONFIG_SND_VIA8233=m
+
+#
+# ALSA Sparc devices
+#
+CONFIG_SND_SUN_AMD7930=m
+CONFIG_SND_SUN_CS4231=m
 
 #
 # USB support

drivers/sbus/audio/Config.help

-CONFIG_SPARCAUDIO
-  This driver provides support for the build-in sound devices on most
-  Sun machines. If you want to be able to use this, select this option
-  and one or more of the lowlevel drivers below. See
-  <http://www.dementia.org/~shadow/sparcaudio.html> for more
-  information.
-
-CONFIG_SPARCAUDIO_AMD7930
-  This driver supports the AMD 7930 chip found on sun4c, 4/6xx, and
-  SparcClassic systems.
-
-CONFIG_SPARCAUDIO_CS4231
-  This driver supports the Crystal Semiconductor CS4231 chip found on
-  the SS4, SS5, and Ultras.
-
-CONFIG_SPARCAUDIO_DBRI
-  This driver supports the DBRI audio interface found on the SS10,
-  SS20, Sparcbook 3, and Voyager systems.
-
-CONFIG_SPARCAUDIO_DUMMY
-  This is a pseudo-driver used for debugging and testing the
-  sparcaudio subsystem. Say N unless you want to work on this
-  subsystem.
-

drivers/sbus/audio/Config.in

-#
-# Configuration script for sparcaudio subsystem
-#
-
-if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
-
-   mainmenu_option next_comment
-   comment 'Linux/SPARC audio subsystem (EXPERIMENTAL)'
-
-   tristate 'Audio support (EXPERIMENTAL)' CONFIG_SPARCAUDIO
-   if [ "$CONFIG_SPARC64" != "y" ]; then
-     dep_tristate '  AMD7930 Lowlevel Driver' CONFIG_SPARCAUDIO_AMD7930 $CONFIG_SPARCAUDIO
-     dep_tristate '  DBRI Lowlevel Driver' CONFIG_SPARCAUDIO_DBRI $CONFIG_SPARCAUDIO
-   fi
-   dep_tristate '  CS4231 Lowlevel Driver' CONFIG_SPARCAUDIO_CS4231 $CONFIG_SPARCAUDIO
-   dep_tristate '  Dummy Lowlevel Driver' CONFIG_SPARCAUDIO_DUMMY $CONFIG_SPARCAUDIO
-   endmenu
-fi

drivers/sbus/audio/Makefile

-#
-# Makefile for the kernel SPARC audio drivers.
-#
-# 7 October 2000, Bartlomiej Zolnierkiewicz <bkz@linux-ide.org>
-# Rewritten to use lists instead of if-statements.
-#
-
-export-objs	:= audio.o amd7930.o dbri.o
-
-obj-$(CONFIG_SPARCAUDIO)		+= audio.o
-obj-$(CONFIG_SPARCAUDIO_AMD7930)	+= amd7930.o
-obj-$(CONFIG_SPARCAUDIO_DBRI)		+= dbri.o
-obj-$(CONFIG_SPARCAUDIO_CS4231)		+= cs4231.o
-obj-$(CONFIG_SPARCAUDIO_DUMMY)		+= dmy.o
-
-include $(TOPDIR)/Rules.make

drivers/sbus/audio/amd7930.h

-/* $Id: amd7930.h,v 1.8 1999/09/21 14:37:10 davem Exp $
- * drivers/sbus/audio/amd7930.h
- *
- * Copyright (C) 1996 Thomas K. Dyas (tdyas@noc.rutgers.edu)
- *
- * Definitions for the AMD79C30 Digital Subscriber Controller which is
- * used as an audio chip in sun4c architecture machines. The
- * information in this file is based on Advanced Micro Devices
- * Publication 09893, Rev G, Amendment /0, Final (a.k.a. the data
- * sheet).
- */
-
-#ifndef _AMD7930_H_
-#define _AMD7930_H_
-
-#include <linux/types.h>
-#include <linux/version.h>
-
-/* Register interface presented to the CPU by the amd7930. */
-#define CR	0x00UL		/* Command Register (W) */
-#define IR	CR		/* Interrupt Register (R) */
-#define DR	0x01UL		/* Data Register (R/W) */
-#define DSR1	0x02UL		/* D-channel Status Register 1 (R) */
-#define DER	0x03UL		/* D-channel Error Register (R) */
-#define DCTB	0x04UL		/* D-channel Transmit Buffer (W) */
-#define DCRB	DCTB		/* D-channel Receive Buffer (R) */
-#define BBTB	0x05UL		/* Bb-channel Transmit Buffer (W) */
-#define BBRB	BBTB		/* Bb-channel Receive Buffer (R) */
-#define BCTB	0x06UL		/* Bc-channel Transmit Buffer (W) */
-#define BCRB	BCTB		/* Bc-channel Receive Buffer (R) */
-#define DSR2	0x07UL		/* D-channel Status Register 2 (R) */
-
-/* Indirect registers in the Main Audio Processor. */
-struct amd7930_map {
-	__u16	x[8];
-	__u16	r[8];
-	__u16	gx;
-	__u16	gr;
-	__u16	ger;
-	__u16	stgr;
-	__u16	ftgr;
-	__u16	atgr;
-	__u8	mmr1;
-	__u8	mmr2;
-};
-
-
-/* After an amd7930 interrupt, reading the Interrupt Register (ir)
- * clears the interrupt and returns a bitmask indicated which
- * interrupt source(s) require service
- */
-
-#define AMR_IR_DTTHRSH			0x01 /* D-channel xmit threshold */
-#define AMR_IR_DRTHRSH			0x02 /* D-channel recv threshold */
-#define AMR_IR_DSRI			0x04 /* D-channel packet status */
-#define AMR_IR_DERI			0x08 /* D-channel error */
-#define AMR_IR_BBUF			0x10 /* B-channel data xfer */
-#define AMR_IR_LSRI			0x20 /* LIU status */
-#define AMR_IR_DSR2I			0x40 /* D-channel buffer status */
-#define AMR_IR_MLTFRMI			0x80 /* multiframe or PP */
-
-/* The amd7930 has "indirect registers" which are accessed by writing
- * the register number into the Command Register and then reading or
- * writing values from the Data Register as appropriate. We define the
- * AMR_* macros to be the indirect register numbers and AM_* macros to
- * be bits in whatever register is referred to.
- */
-
-/* Initialization */
-#define	AMR_INIT			0x21
-#define		AM_INIT_ACTIVE			0x01
-#define		AM_INIT_DATAONLY		0x02
-#define		AM_INIT_POWERDOWN		0x03
-#define		AM_INIT_DISABLE_INTS		0x04
-#define AMR_INIT2			0x20
-#define		AM_INIT2_ENABLE_POWERDOWN	0x20
-#define		AM_INIT2_ENABLE_MULTIFRAME	0x10
-
-/* Line Interface Unit */
-#define	AMR_LIU_LSR			0xA1
-#define		AM_LIU_LSR_STATE		0x07
-#define		AM_LIU_LSR_F3			0x08
-#define		AM_LIU_LSR_F7			0x10
-#define		AM_LIU_LSR_F8			0x20
-#define		AM_LIU_LSR_HSW			0x40
-#define		AM_LIU_LSR_HSW_CHG		0x80
-#define	AMR_LIU_LPR			0xA2
-#define	AMR_LIU_LMR1			0xA3
-#define		AM_LIU_LMR1_B1_ENABL		0x01
-#define		AM_LIU_LMR1_B2_ENABL		0x02
-#define		AM_LIU_LMR1_F_DISABL		0x04
-#define		AM_LIU_LMR1_FA_DISABL		0x08
-#define		AM_LIU_LMR1_REQ_ACTIV		0x10
-#define		AM_LIU_LMR1_F8_F3		0x20
-#define		AM_LIU_LMR1_LIU_ENABL		0x40
-#define	AMR_LIU_LMR2			0xA4
-#define		AM_LIU_LMR2_DECHO		0x01
-#define		AM_LIU_LMR2_DLOOP		0x02
-#define		AM_LIU_LMR2_DBACKOFF		0x04
-#define		AM_LIU_LMR2_EN_F3_INT		0x08
-#define		AM_LIU_LMR2_EN_F8_INT		0x10
-#define		AM_LIU_LMR2_EN_HSW_INT		0x20
-#define		AM_LIU_LMR2_EN_F7_INT		0x40
-#define	AMR_LIU_2_4			0xA5
-#define	AMR_LIU_MF			0xA6
-#define	AMR_LIU_MFSB			0xA7
-#define	AMR_LIU_MFQB			0xA8
-
-/* Multiplexor */
-#define	AMR_MUX_MCR1			0x41
-#define	AMR_MUX_MCR2			0x42
-#define	AMR_MUX_MCR3			0x43
-#define		AM_MUX_CHANNEL_B1		0x01
-#define		AM_MUX_CHANNEL_B2		0x02
-#define		AM_MUX_CHANNEL_Ba		0x03
-#define		AM_MUX_CHANNEL_Bb		0x04
-#define		AM_MUX_CHANNEL_Bc		0x05
-#define		AM_MUX_CHANNEL_Bd		0x06
-#define		AM_MUX_CHANNEL_Be		0x07
-#define		AM_MUX_CHANNEL_Bf		0x08
-#define	AMR_MUX_MCR4			0x44
-#define		AM_MUX_MCR4_ENABLE_INTS		0x08
-#define		AM_MUX_MCR4_REVERSE_Bb		0x10
-#define		AM_MUX_MCR4_REVERSE_Bc		0x20
-#define	AMR_MUX_1_4			0x45
-
-/* Main Audio Processor */
-#define	AMR_MAP_X			0x61
-#define	AMR_MAP_R			0x62
-#define	AMR_MAP_GX			0x63
-#define	AMR_MAP_GR			0x64
-#define	AMR_MAP_GER			0x65
-#define	AMR_MAP_STGR			0x66
-#define	AMR_MAP_FTGR_1_2		0x67
-#define	AMR_MAP_ATGR_1_2		0x68
-#define	AMR_MAP_MMR1			0x69
-#define		AM_MAP_MMR1_ALAW		0x01
-#define		AM_MAP_MMR1_GX			0x02
-#define		AM_MAP_MMR1_GR			0x04
-#define		AM_MAP_MMR1_GER			0x08
-#define		AM_MAP_MMR1_X			0x10
-#define		AM_MAP_MMR1_R			0x20
-#define		AM_MAP_MMR1_STG			0x40
-#define		AM_MAP_MMR1_LOOPBACK		0x80
-#define	AMR_MAP_MMR2			0x6A
-#define		AM_MAP_MMR2_AINB		0x01
-#define		AM_MAP_MMR2_LS			0x02
-#define		AM_MAP_MMR2_ENABLE_DTMF		0x04
-#define		AM_MAP_MMR2_ENABLE_TONEGEN	0x08
-#define		AM_MAP_MMR2_ENABLE_TONERING	0x10
-#define		AM_MAP_MMR2_DISABLE_HIGHPASS	0x20
-#define		AM_MAP_MMR2_DISABLE_AUTOZERO	0x40
-#define	AMR_MAP_1_10			0x6B
-#define	AMR_MAP_MMR3			0x6C
-#define	AMR_MAP_STRA			0x6D
-#define	AMR_MAP_STRF			0x6E
-#define	AMR_MAP_PEAKX			0x70
-#define	AMR_MAP_PEAKR			0x71
-#define	AMR_MAP_15_16			0x72
-
-/* Data Link Controller */
-#define	AMR_DLC_FRAR_1_2_3		0x81
-#define	AMR_DLC_SRAR_1_2_3		0x82
-#define	AMR_DLC_TAR			0x83
-#define	AMR_DLC_DRLR			0x84
-#define	AMR_DLC_DTCR			0x85
-#define	AMR_DLC_DMR1			0x86
-#define		AMR_DLC_DMR1_DTTHRSH_INT	0x01
-#define		AMR_DLC_DMR1_DRTHRSH_INT	0x02
-#define		AMR_DLC_DMR1_TAR_ENABL		0x04
-#define		AMR_DLC_DMR1_EORP_INT		0x08
-#define		AMR_DLC_DMR1_EN_ADDR1		0x10
-#define		AMR_DLC_DMR1_EN_ADDR2		0x20
-#define		AMR_DLC_DMR1_EN_ADDR3		0x40
-#define		AMR_DLC_DMR1_EN_ADDR4		0x80
-#define		AMR_DLC_DMR1_EN_ADDRS		0xf0
-#define	AMR_DLC_DMR2			0x87
-#define		AMR_DLC_DMR2_RABRT_INT		0x01
-#define		AMR_DLC_DMR2_RESID_INT		0x02
-#define		AMR_DLC_DMR2_COLL_INT		0x04
-#define		AMR_DLC_DMR2_FCS_INT		0x08
-#define		AMR_DLC_DMR2_OVFL_INT		0x10
-#define		AMR_DLC_DMR2_UNFL_INT		0x20
-#define		AMR_DLC_DMR2_OVRN_INT		0x40
-#define		AMR_DLC_DMR2_UNRN_INT		0x80
-#define	AMR_DLC_1_7			0x88
-#define	AMR_DLC_DRCR			0x89
-#define	AMR_DLC_RNGR1			0x8A
-#define	AMR_DLC_RNGR2			0x8B
-#define	AMR_DLC_FRAR4			0x8C
-#define	AMR_DLC_SRAR4			0x8D
-#define	AMR_DLC_DMR3			0x8E
-#define		AMR_DLC_DMR3_VA_INT		0x01
-#define		AMR_DLC_DMR3_EOTP_INT		0x02
-#define		AMR_DLC_DMR3_LBRP_INT		0x04
-#define		AMR_DLC_DMR3_RBA_INT		0x08
-#define		AMR_DLC_DMR3_LBT_INT		0x10
-#define		AMR_DLC_DMR3_TBE_INT		0x20
-#define		AMR_DLC_DMR3_RPLOST_INT		0x40
-#define		AMR_DLC_DMR3_KEEP_FCS		0x80
-#define	AMR_DLC_DMR4			0x8F
-#define		AMR_DLC_DMR4_RCV_1		0x00
-#define		AMR_DLC_DMR4_RCV_2		0x01
-#define		AMR_DLC_DMR4_RCV_4		0x02
-#define		AMR_DLC_DMR4_RCV_8		0x03
-#define		AMR_DLC_DMR4_RCV_16		0x01
-#define		AMR_DLC_DMR4_RCV_24		0x02
-#define		AMR_DLC_DMR4_RCV_30		0x03
-#define		AMR_DLC_DMR4_XMT_1		0x00
-#define		AMR_DLC_DMR4_XMT_2		0x04
-#define		AMR_DLC_DMR4_XMT_4		0x08
-#define		AMR_DLC_DMR4_XMT_8		0x0c
-#define		AMR_DLC_DMR4_XMT_10		0x08
-#define		AMR_DLC_DMR4_XMT_14		0x0c
-#define		AMR_DLC_DMR4_IDLE_MARK		0x00
-#define		AMR_DLC_DMR4_IDLE_FLAG		0x10
-#define		AMR_DLC_DMR4_ADDR_BOTH		0x00
-#define		AMR_DLC_DMR4_ADDR_1ST		0x20
-#define		AMR_DLC_DMR4_ADDR_2ND		0xa0
-#define		AMR_DLC_DMR4_CR_ENABLE		0x40
-#define	AMR_DLC_12_15			0x90
-#define	AMR_DLC_ASR			0x91
-#define	AMR_DLC_EFCR			0x92
-#define		AMR_DLC_EFCR_EXTEND_FIFO	0x01
-#define		AMR_DLC_EFCR_SEC_PKT_INT	0x02
-
-#define AMR_DSR1_VADDR			0x01
-#define AMR_DSR1_EORP			0x02
-#define AMR_DSR1_PKT_IP			0x04
-#define AMR_DSR1_DECHO_ON		0x08
-#define AMR_DSR1_DLOOP_ON		0x10
-#define AMR_DSR1_DBACK_OFF		0x20
-#define AMR_DSR1_EOTP			0x40
-#define AMR_DSR1_CXMT_ABRT		0x80
-
-#define AMR_DSR2_LBRP			0x01
-#define AMR_DSR2_RBA			0x02
-#define AMR_DSR2_RPLOST			0x04
-#define AMR_DSR2_LAST_BYTE		0x08
-#define AMR_DSR2_TBE			0x10
-#define AMR_DSR2_MARK_IDLE		0x20
-#define AMR_DSR2_FLAG_IDLE		0x40
-#define AMR_DSR2_SECOND_PKT		0x80
-
-#define AMR_DER_RABRT			0x01
-#define AMR_DER_RFRAME			0x02
-#define AMR_DER_COLLISION		0x04
-#define AMR_DER_FCS			0x08
-#define AMR_DER_OVFL			0x10
-#define AMR_DER_UNFL			0x20
-#define AMR_DER_OVRN			0x40
-#define AMR_DER_UNRN			0x80
-
-/* Peripheral Port */
-#define	AMR_PP_PPCR1			0xC0
-#define	AMR_PP_PPSR			0xC1
-#define	AMR_PP_PPIER			0xC2
-#define	AMR_PP_MTDR			0xC3
-#define	AMR_PP_MRDR			0xC3
-#define	AMR_PP_CITDR0			0xC4
-#define	AMR_PP_CIRDR0			0xC4
-#define	AMR_PP_CITDR1			0xC5
-#define	AMR_PP_CIRDR1			0xC5
-#define	AMR_PP_PPCR2			0xC8
-#define	AMR_PP_PPCR3			0xC9
-
-/* Give this chip a "default" sample rate */
-#define AMD7930_RATE                    (8000)
-
-#endif /* _AMD7930_H_ */

drivers/sbus/audio/cs4215.h

-/* $Id: cs4215.h,v 1.8 2000/10/27 07:01:38 uzi Exp $
- * drivers/sbus/audio/cs4215.h
- *
- * Copyright (C) 1997 Rudolf Koenig (rfkoenig@immd4.informatik.uni-erlangen.de)
- * Used with dbri.h
- */
-
-#ifndef _CS4215_H_
-#define _CS4215_H_
-
-struct cs4215 {
-	__u8	data[4];	/* Data mode: Time slots 5-8 */
-	__u8	ctrl[4];	/* Ctrl mode: Time slots 1-4 */
-	__u8	onboard;
-	__u8	offset;		/* Bit offset from frame sync to time slot 1 */
-	volatile __u32	status;
-	volatile __u32	version;
-};
-
-
-/*
- * Control mode first 
- */
-
-/* Time Slot 1, Status register */
-#define CS4215_CLB	(1<<2)	/* Control Latch Bit */
-#define CS4215_OLB	(1<<3)	/* 1: line: 2.0V, speaker 4V */
-				/* 0: line: 2.8V, speaker 8V */
-#define CS4215_MLB	(1<<4)	/* 1: Microphone: 20dB gain disabled */
-#define CS4215_RSRVD_1  (1<<5)
-
-
-/* Time Slot 2, Data Format Register */
-#define CS4215_DFR_LINEAR16	0
-#define CS4215_DFR_ULAW		1
-#define CS4215_DFR_ALAW		2
-#define CS4215_DFR_LINEAR8	3
-#define CS4215_DFR_STEREO	(1<<2)
-static struct {
-	unsigned short freq;
-	unsigned char  xtal;
-	unsigned char  csval;
-} CS4215_FREQ[] = {
-	{	 8000,	(1<<4),	(0<<3)	},
-	{	16000,	(1<<4),	(1<<3)	},
-	{	27429,	(1<<4),	(2<<3)	},	/* Actually 24428.57 */
-	{	32000,	(1<<4),	(3<<3)	},
-	/* {	 NA,	(1<<4),	(4<<3)	}, */
-	/* {	 NA,	(1<<4),	(5<<3)	}, */
-	{	48000,	(1<<4),	(6<<3)	},
-	{	 9600,	(1<<4),	(7<<3)	},
-	{	 5513,	(2<<4),	(0<<3)	},	/* Actually 5512.5 */
-	{	11025,	(2<<4),	(1<<3)	},
-	{	18900,	(2<<4),	(2<<3)	},
-	{	22050,	(2<<4),	(3<<3)	},
-	{	37800,	(2<<4),	(4<<3)	},
-	{	44100,	(2<<4),	(5<<3)	},
-	{	33075,	(2<<4),	(6<<3)	},
-	{	 6615,	(2<<4),	(7<<3)	},
-	{	    0,	0,	0	}
-};
-#define CS4215_HPF	(1<<7)	/* High Pass Filter, 1: Enabled */
-
-#define CS4215_12_MASK	0xfcbf	/* Mask off reserved bits in slot 1 & 2 */
-
-/* Time Slot 3, Serial Port Control register */
-#define CS4215_XEN	(1<<0)	/* 0: Enable serial output */
-#define CS4215_XCLK	(1<<1)	/* 1: Master mode: Generate SCLK */
-#define CS4215_BSEL_64	(0<<2)	/* Bitrate: 64 bits per frame */
-#define CS4215_BSEL_128	(1<<2)
-#define CS4215_BSEL_256	(2<<2)
-#define CS4215_MCK_MAST (0<<4)	/* Master clock */
-#define CS4215_MCK_XTL1 (1<<4)	/* 24.576 MHz clock source */
-#define CS4215_MCK_XTL2 (2<<4)	/* 16.9344 MHz clock source */
-#define CS4215_MCK_CLK1 (3<<4)	/* Clockin, 256 x Fs */
-#define CS4215_MCK_CLK2 (4<<4)	/* Clockin, see DFR */
-
-/* Time Slot 4, Test Register */
-#define CS4215_DAD	(1<<0)	/* 0:Digital-Dig loop, 1:Dig-Analog-Dig loop */
-#define CS4215_ENL	(1<<1)	/* Enable Loopback Testing */
-
-/* Time Slot 5, Parallel Port Register */
-/* Read only here and the same as the in data mode */
-
-/* Time Slot 6, Reserved  */
-
-/* Time Slot 7, Version Register  */
-#define CS4215_VERSION_MASK 0xf	/* Known versions 0/C, 1/D, 2/E */
-
-/* Time Slot 8, Reserved  */
-
-
-
-/*
- * Data mode
- */
-/* Time Slot 1-2: Left Channel Data, 2-3: Right Channel Data  */
-
-/* Time Slot 5, Output Setting  */
-#define CS4215_LO(v)	v	/* Left Output Attenuation 0x3f: -94.5 dB */
-#define CS4215_LE	(1<<6)	/* Line Out Enable */
-#define CS4215_HE	(1<<7)	/* Headphone Enable */
-
-/* Time Slot 6, Output Setting  */
-#define CS4215_RO(v)	v	/* Right Output Attenuation 0x3f: -94.5 dB */
-#define CS4215_SE	(1<<6)	/* Speaker Enable */
-#define CS4215_ADI	(1<<7)	/* A/D Data Invalid: Busy in calibration */
-
-/* Time Slot 7, Input Setting */
-#define CS4215_LG(v)	v	/* Left Gain Setting 0xf: 22.5 dB */
-#define CS4215_IS	(1<<4)	/* Input Select: 1=Microphone, 0=Line */
-#define CS4215_OVR	(1<<5)	/* 1: Overrange condition occurred */
-#define CS4215_PIO0	(1<<6)	/* Parallel I/O 0 */
-#define CS4215_PIO1	(1<<7)
-
-/* Time Slot 8, Input Setting */
-#define CS4215_RG(v)	v	/* Right Gain Setting 0xf: 22.5 dB */
-#define CS4215_MA(v)	(v<<4)	/* Monitor Path Attenuation 0xf: mute */
-
-#endif /* _CS4215_H_ */

drivers/sbus/audio/dummy.h

-/* $Id: dummy.h,v 1.3 1999/09/21 14:37:41 davem Exp $
- * drivers/sbus/audio/dummy.h
- *
- * Copyright (C) 1998 Derrick J. Brashear (shadow@dementia.org)
- */
-
-#ifndef _DUMMY_H_
-#define _DUMMY_H_
-
-#include <linux/types.h>
-#include <linux/tqueue.h>
-
-#define DUMMY_OUTFILE "/usr/tmp/dummy.au"
-
-/* Our structure for each chip */
-
-struct dummy_chip {
-	struct audio_info perchip_info;
-	unsigned int playlen;
-	struct tq_struct tqueue;
-};
-
-#define DUMMY_MIN_ATEN     (0)
-#define DUMMY_MAX_ATEN     (31)
-#define DUMMY_MAX_DEV_ATEN (63)
-
-#define DUMMY_MON_MIN_ATEN         (0)
-#define DUMMY_MON_MAX_ATEN         (63)
-
-#define DUMMY_DEFAULT_PLAYGAIN     (132)
-#define DUMMY_DEFAULT_RECGAIN      (126)
-
-#define DUMMY_MIN_GAIN     (0)
-#define DUMMY_MAX_GAIN     (15)
-
-#define DUMMY_PRECISION    (8)             /* # of bits/sample */
-#define DUMMY_CHANNELS     (1)             /* channels/sample */
-
-#define DUMMY_RATE   (8000)                /* default sample rate */
-
-#endif /* _DUMMY_H_ */

include/sound/core.h

@@ -22,9 +22,8 @@
  *
  */
 
-#ifdef CONFIG_PM
-#include <linux/sched.h>		/* wake_up() and struct semaphore */
-#endif
+#include <linux/sched.h>		/* wake_up() */
+#include <asm/semaphore.h>		/* struct semaphore */
 
 /* Typedef's */
 typedef struct timeval snd_timestamp_t;
@@ -38,6 +37,9 @@ typedef struct sndrv_xferv snd_xferv_t;
 #ifdef CONFIG_PCI
 struct pci_dev;
 #endif
+#ifdef CONFIG_SBUS
+struct sbus_dev;
+#endif
 
 /* device allocation stuff */
 
@@ -256,6 +258,11 @@ void *snd_malloc_pci_pages(struct pci_dev *pci, unsigned long size, dma_addr_t *
 void *snd_malloc_pci_pages_fallback(struct pci_dev *pci, unsigned long size, dma_addr_t *dma_addr, unsigned long *res_size);
 void snd_free_pci_pages(struct pci_dev *pci, unsigned long size, void *ptr, dma_addr_t dma_addr);
 #endif
+#ifdef CONFIG_SBUS
+void *snd_malloc_sbus_pages(struct sbus_dev *sdev, unsigned long size, dma_addr_t *dma_addr);
+void *snd_malloc_sbus_pages_fallback(struct sbus_dev *sdev, unsigned long size, dma_addr_t *dma_addr, unsigned long *res_size);
+void snd_free_sbus_pages(struct sbus_dev *sdev, unsigned long size, void *ptr, dma_addr_t dma_addr);
+#endif
 #ifdef CONFIG_ISA
 #ifdef CONFIG_PCI
 #define snd_malloc_isa_pages(size, dma_addr) snd_malloc_pci_pages(NULL, size, dma_addr)

include/sound/rawmidi.h

@@ -23,6 +23,9 @@
  */
 
 #include <sound/asound.h>
+#include <linux/spinlock.h>
+#include <linux/wait.h>
+#include <asm/semaphore.h>
 
 #if defined(CONFIG_SND_SEQUENCER) || defined(CONFIG_SND_SEQUENCER_MODULE)
 #include "seq_device.h"

sound/Makefile

@@ -5,7 +5,7 @@ export-objs     := sound_core.o
 
 obj-$(CONFIG_SOUND) += soundcore.o
 obj-$(CONFIG_SOUND_PRIME) += oss/
-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/
+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ sparc/
 
 ifeq ($(CONFIG_SND),y)
   obj-y += last.o