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Commit b91cba52 authored by Linus Torvalds's avatar Linus Torvalds
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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6 

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (68 commits)
  sh: sh-rtc support for SH7709.
  sh: Revert __xdiv64_32 size change.
  sh: Update r7785rp defconfig.
  sh: Export div symbols for GCC 4.2 and ST GCC.
  sh: fix race in parallel out-of-tree build
  sh: Kill off dead mach.c for hp6xx.
  sh: hd64461.h cleanup and added comments.
  sh: Update the alignment when 4K stacks are used.
  sh: Add a .bss.page_aligned section for 4K stacks.
  sh: Don't let SH-4A clobber SH-4 CFLAGS.
  sh: Add parport stub for SuperIO ports.
  sh: Drop -Wa,-dsp for DSP tuning.
  sh: Update dreamcast defconfig.
  fb: pvr2fb: A few more __devinit annotations for PCI.
  fb: pvr2fb: Fix up section mismatch warnings.
  sh: Select IPR-IRQ for SH7091.
  sh: Correct __xdiv64_32/div64_32 return value size.
  sh: Fix timer-tmu build for SH-3.
  sh: Add cpu and mach links to CLEAN_FILES.
  sh: Preliminary support for the SH-X3 CPU.
  ...
parents 98283bb4 e509ac4b
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Showing with 4887 additions and 2834 deletions
arch/sh/Kconfig
View file @ b91cba52
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arch/sh/Kconfig.debug
View file @ b91cba52
......@@ -52,6 +52,10 @@ config EARLY_PRINTK
select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
the kernel command line option to toggle back and forth.
config DEBUG_BOOTMEM
depends on DEBUG_KERNEL
bool "Debug BOOTMEM initialization"
config DEBUG_STACKOVERFLOW
bool "Check for stack overflows"
depends on DEBUG_KERNEL
......@@ -82,6 +86,7 @@ config SH_KGDB
bool "Include KGDB kernel debugger"
select FRAME_POINTER
select DEBUG_INFO
depends on CPU_SH3 || CPU_SH4
help
Include in-kernel hooks for kgdb, the Linux kernel source level
debugger. See <http://kgdb.sourceforge.net/> for more information.
......
arch/sh/Makefile
View file @ b91cba52
......@@ -34,20 +34,20 @@ isa-y := $(isa-y)-nofpu
endif
endif
cflags-$(CONFIG_CPU_SH2) := -m2
cflags-$(CONFIG_CPU_SH2A) := -m2a $(call cc-option,-m2a-nofpu,)
cflags-$(CONFIG_CPU_SH3) := -m3
cflags-$(CONFIG_CPU_SH4) := -m4 \
cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,)
cflags-$(CONFIG_CPU_SH2A) += $(call cc-option,-m2a,) \
$(call cc-option,-m2a-nofpu,)
cflags-$(CONFIG_CPU_SH3) := $(call cc-option,-m3,)
cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \
$(call cc-option,-mno-implicit-fp,-m4-nofpu)
cflags-$(CONFIG_CPU_SH4A) := $(call cc-option,-m4a,) $(call cc-option,-m4a-nofpu,)
cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \
$(call cc-option,-m4a-nofpu,)
cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) -ffreestanding
cflags-$(CONFIG_SH_DSP) += -Wa,-dsp
cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \
$(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
......@@ -87,39 +87,37 @@ core-y += arch/sh/kernel/ arch/sh/mm/
core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
# Boards
machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x
machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) := se/7722
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751
machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) := se/7780
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
machdir-$(CONFIG_SH_HP6XX) := hp6xx
machdir-$(CONFIG_SH_SATURN) := saturn
machdir-$(CONFIG_SH_DREAMCAST) := dreamcast
machdir-$(CONFIG_SH_MPC1211) := mpc1211
machdir-$(CONFIG_SH_SH03) := sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear
machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip
machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) := renesas/r7780rp
machdir-$(CONFIG_SH_7710VOIPGW) := renesas/sh7710voipgw
machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev
machdir-$(CONFIG_SH_LANDISK) := landisk
machdir-$(CONFIG_SH_TITAN) := titan
machdir-$(CONFIG_SH_SHMIN) := shmin
machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) := se/7206
machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) := se/7619
machdir-$(CONFIG_SH_LBOX_RE2) := lboxre2
machdir-$(CONFIG_SH_UNKNOWN) := unknown
incdir-y := $(notdir $(machdir-y))
incdir-$(CONFIG_SH_HP6XX) := hp6xx
machdir-$(CONFIG_SH_SOLUTION_ENGINE) += se/770x
machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) += se/7722
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) += se/7751
machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) += se/7780
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) += se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) += se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) += se/73180
machdir-$(CONFIG_SH_HP6XX) += hp6xx
machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
machdir-$(CONFIG_SH_MPC1211) += mpc1211
machdir-$(CONFIG_SH_SH03) += sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
machdir-$(CONFIG_SH_HS7751RVOIP) += renesas/hs7751rvoip
machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev
machdir-$(CONFIG_SH_LANDISK) += landisk
machdir-$(CONFIG_SH_TITAN) += titan
machdir-$(CONFIG_SH_SHMIN) += shmin
machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206
machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619
machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2
incdir-y := $(notdir $(machdir-y))
ifneq ($(machdir-y),)
core-y += arch/sh/boards/$(machdir-y)/
core-y += $(addprefix arch/sh/boards/, \
$(filter-out ., $(patsubst %,%/,$(machdir-y))))
endif
# Companion chips
......@@ -157,19 +155,31 @@ include/asm-sh/.cpu: $(wildcard include/config/cpu/*.h) \
# Most boards have their own mach directories. For the ones that
# don't, just reference the parent directory so the semantics are
# kept roughly the same.
#
# When multiple boards are compiled in at the same time, preference
# for the mach link is given to whichever has a directory for its
# headers. However, this is only a workaround until platforms that
# can live in the same kernel image back away from relying on the
# mach link.
include/asm-sh/.mach: $(wildcard include/config/sh/*.h) \
include/config/auto.conf FORCE
@echo -n ' SYMLINK include/asm-sh/mach -> '
$(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi
$(Q)if [ -d $(incdir-prefix)$(incdir-y) ]; then \
echo -e 'include/asm-sh/$(incdir-y)'; \
ln -fsn $(incdir-prefix)$(incdir-y) \
$(Q)rm -f include/asm-sh/mach
$(Q)for i in $(incdir-y); do \
if [ -d $(incdir-prefix)$$i ]; then \
echo -n ' SYMLINK include/asm-sh/mach -> '; \
echo -e "include/asm-sh/$$i"; \
ln -fsn $(incdir-prefix)$$i \
include/asm-sh/mach; \
else \
echo -e 'include/asm-sh'; \
ln -fsn $(incdir-prefix) include/asm-sh/mach; \
fi
if [ ! -d include/asm-sh/mach ]; then \
echo -n ' SYMLINK include/asm-sh/mach -> '; \
echo -e 'include/asm-sh'; \
ln -fsn $(incdir-prefix) include/asm-sh/mach; \
fi; \
fi; \
done
@touch $@
archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools
......@@ -188,7 +198,9 @@ compressed: zImage
archclean:
$(Q)$(MAKE) $(clean)=$(boot)
CLEAN_FILES += include/asm-sh/machtypes.h
CLEAN_FILES += include/asm-sh/machtypes.h \
include/asm-sh/cpu include/asm-sh/.cpu \
include/asm-sh/mach include/asm-sh/.mach
define archhelp
@echo '* zImage - Compressed kernel image'
......
arch/sh/boards/dreamcast/setup.c
View file @ b91cba52
......@@ -60,7 +60,7 @@ static void __init dreamcast_setup(char **cmdline_p)
#endif
}
struct sh_machine_vector mv_dreamcast __initmv = {
static struct sh_machine_vector mv_dreamcast __initmv = {
.mv_name = "Sega Dreamcast",
.mv_setup = dreamcast_setup,
.mv_irq_demux = systemasic_irq_demux,
......@@ -70,4 +70,3 @@ struct sh_machine_vector mv_dreamcast __initmv = {
.mv_consistent_free = dreamcast_consistent_free,
#endif
};
ALIAS_MV(dreamcast)
arch/sh/boards/hp6xx/mach.c deleted 100644 → 0
View file @ 98283bb4
/*
* linux/arch/sh/boards/hp6xx/mach.c
*
* Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Machine vector for the HP680
*/
#include <asm/machvec.h>
#include <asm/hd64461.h>
#include <asm/io.h>
#include <asm/irq.h>
struct sh_machine_vector mv_hp6xx __initmv = {
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
.mv_inb = hd64461_inb,
.mv_inw = hd64461_inw,
.mv_inl = hd64461_inl,
.mv_outb = hd64461_outb,
.mv_outw = hd64461_outw,
.mv_outl = hd64461_outl,
.mv_inb_p = hd64461_inb_p,
.mv_inw_p = hd64461_inw,
.mv_inl_p = hd64461_inl,
.mv_outb_p = hd64461_outb_p,
.mv_outw_p = hd64461_outw,
.mv_outl_p = hd64461_outl,
.mv_insb = hd64461_insb,
.mv_insw = hd64461_insw,
.mv_insl = hd64461_insl,
.mv_outsb = hd64461_outsb,
.mv_outsw = hd64461_outsw,
.mv_outsl = hd64461_outsl,
.mv_readw = hd64461_readw,
.mv_writew = hd64461_writew,
.mv_irq_demux = hd64461_irq_demux,
};
ALIAS_MV(hp6xx)
arch/sh/boards/hp6xx/setup.c
View file @ b91cba52
......@@ -98,10 +98,9 @@ static void __init hp6xx_setup(char **cmdline_p)
}
device_initcall(hp6xx_devices_setup);
struct sh_machine_vector mv_hp6xx __initmv = {
static struct sh_machine_vector mv_hp6xx __initmv = {
.mv_name = "hp6xx",
.mv_setup = hp6xx_setup,
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
.mv_irq_demux = hd64461_irq_demux,
};
ALIAS_MV(hp6xx)
arch/sh/boards/landisk/setup.c
View file @ b91cba52
......@@ -97,10 +97,9 @@ static void __init landisk_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_landisk __initmv = {
static struct sh_machine_vector mv_landisk __initmv = {
.mv_name = "LANDISK",
.mv_nr_irqs = 72,
.mv_setup = landisk_setup,
.mv_init_irq = init_landisk_IRQ,
};
ALIAS_MV(landisk)
arch/sh/boards/lboxre2/setup.c
View file @ b91cba52
......@@ -77,9 +77,8 @@ device_initcall(lboxre2_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_lboxre2 __initmv = {
static struct sh_machine_vector mv_lboxre2 __initmv = {
.mv_name = "L-BOX RE2",
.mv_nr_irqs = 72,
.mv_init_irq = init_lboxre2_IRQ,
};
ALIAS_MV(lboxre2)
arch/sh/boards/mpc1211/setup.c
View file @ b91cba52
......@@ -338,11 +338,10 @@ static void __init mpc1211_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_mpc1211 __initmv = {
static struct sh_machine_vector mv_mpc1211 __initmv = {
.mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
.mv_setup = mpc1211_setup,
.mv_nr_irqs = 48,
.mv_irq_demux = mpc1211_irq_demux,
.mv_init_irq = init_mpc1211_IRQ,
};
ALIAS_MV(mpc1211)
arch/sh/boards/renesas/edosk7705/setup.c
View file @ b91cba52
......@@ -21,7 +21,7 @@ static void __init sh_edosk7705_init_irq(void)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_edosk7705 __initmv = {
static struct sh_machine_vector mv_edosk7705 __initmv = {
.mv_name = "EDOSK7705",
.mv_nr_irqs = 80,
......@@ -41,4 +41,3 @@ struct sh_machine_vector mv_edosk7705 __initmv = {
.mv_isa_port2addr = sh_edosk7705_isa_port2addr,
.mv_init_irq = sh_edosk7705_init_irq,
};
ALIAS_MV(edosk7705)
arch/sh/boards/renesas/hs7751rvoip/setup.c
View file @ b91cba52
......@@ -89,7 +89,7 @@ static void __init hs7751rvoip_setup(char **cmdline_p)
printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
}
struct sh_machine_vector mv_hs7751rvoip __initmv = {
static struct sh_machine_vector mv_hs7751rvoip __initmv = {
.mv_name = "HS7751RVoIP",
.mv_setup = hs7751rvoip_setup,
.mv_nr_irqs = 72,
......@@ -118,4 +118,3 @@ struct sh_machine_vector mv_hs7751rvoip __initmv = {
.mv_init_irq = hs7751rvoip_init_irq,
.mv_ioport_map = hs7751rvoip_ioport_map,
};
ALIAS_MV(hs7751rvoip)
arch/sh/boards/renesas/r7780rp/Kconfig
View file @ b91cba52
......@@ -6,18 +6,18 @@ choice
config SH_R7780RP
bool "R7780RP-1 board support"
select CPU_SUBTYPE_SH7780
depends on CPU_SUBTYPE_SH7780
config SH_R7780MP
bool "R7780MP board support"
select CPU_SUBTYPE_SH7780
depends on CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the mass-production
version of the R7780RP. If in doubt, say Y.
config SH_R7785RP
bool "R7785RP board support"
select CPU_SUBTYPE_SH7785
depends on CPU_SUBTYPE_SH7785
endchoice
......
arch/sh/boards/renesas/r7780rp/setup.c
View file @ b91cba52
......@@ -166,10 +166,9 @@ static void __init highlander_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_highlander __initmv = {
static struct sh_machine_vector mv_highlander __initmv = {
.mv_name = "Highlander",
.mv_nr_irqs = 109,
.mv_setup = highlander_setup,
.mv_init_irq = highlander_init_irq,
};
ALIAS_MV(highlander)
arch/sh/boards/renesas/rts7751r2d/setup.c
View file @ b91cba52
......@@ -176,7 +176,7 @@ static void __init rts7751r2d_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_rts7751r2d __initmv = {
static struct sh_machine_vector mv_rts7751r2d __initmv = {
.mv_name = "RTS7751R2D",
.mv_setup = rts7751r2d_setup,
.mv_nr_irqs = 72,
......@@ -189,4 +189,3 @@ struct sh_machine_vector mv_rts7751r2d __initmv = {
.mv_consistent_free = voyagergx_consistent_free,
#endif
};
ALIAS_MV(rts7751r2d)
arch/sh/boards/renesas/sh7710voipgw/setup.c
View file @ b91cba52
......@@ -88,9 +88,8 @@ static void __init sh7710voipgw_init_irq(void)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_sh7710voipgw __initmv = {
static struct sh_machine_vector mv_sh7710voipgw __initmv = {
.mv_name = "SH7710 VoIP Gateway",
.mv_nr_irqs = 104,
.mv_init_irq = sh7710voipgw_init_irq,
};
ALIAS_MV(sh7710voipgw)
arch/sh/boards/renesas/systemh/setup.c
View file @ b91cba52
......@@ -28,7 +28,7 @@ static void __init sh7751systemh_init_irq(void)
make_systemh_irq(0xb); /* Ethernet interrupt */
}
struct sh_machine_vector mv_7751systemh __initmv = {
static struct sh_machine_vector mv_7751systemh __initmv = {
.mv_name = "7751 SystemH",
.mv_nr_irqs = 72,
......@@ -55,4 +55,3 @@ struct sh_machine_vector mv_7751systemh __initmv = {
.mv_init_irq = sh7751systemh_init_irq,
};
ALIAS_MV(7751systemh)
arch/sh/boards/saturn/Makefile deleted 100644 → 0
View file @ 98283bb4
#
# Makefile for the Sega Saturn specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_SMP) += smp.o
arch/sh/boards/saturn/io.c deleted 100644 → 0
View file @ 98283bb4
/*
* arch/sh/boards/saturn/io.c
*
* I/O routines for the Sega Saturn.
*
* Copyright (C) 2002 Paul Mundt
*
* Released under the terms of the GNU GPL v2.0.
*/
#include <asm/saturn/io.h>
#include <asm/machvec.h>
unsigned long saturn_isa_port2addr(unsigned long offset)
{
return offset;
}
void *saturn_ioremap(unsigned long offset, unsigned long size)
{
return (void *)offset;
}
void saturn_iounmap(void *addr)
{
}
arch/sh/boards/saturn/irq.c deleted 100644 → 0
View file @ 98283bb4
/*
* arch/sh/boards/saturn/irq.c
*
* Copyright (C) 2002 Paul Mundt
*
* Released under the terms of the GNU GPL v2.0.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/io.h>
/*
* Interrupts map out as follows:
*
* Vector Name Mask
*
* 64 VBLANKIN 0x0001
* 65 VBLANKOUT 0x0002
* 66 HBLANKIN 0x0004
* 67 TIMER0 0x0008
* 68 TIMER1 0x0010
* 69 DSPEND 0x0020
* 70 SOUNDREQUEST 0x0040
* 71 SYSTEMMANAGER 0x0080
* 72 PAD 0x0100
* 73 LEVEL2DMAEND 0x0200
* 74 LEVEL1DMAEND 0x0400
* 75 LEVEL0DMAEND 0x0800
* 76 DMAILLEGAL 0x1000
* 77 SRITEDRAWEND 0x2000
* 78 ABUS 0x8000
*
*/
#define SATURN_IRQ_MIN 64 /* VBLANKIN */
#define SATURN_IRQ_MAX 78 /* ABUS */
#define SATURN_IRQ_MASK 0xbfff
static inline u32 saturn_irq_mask(unsigned int irq_nr)
{
u32 mask;
mask = (1 << (irq_nr - SATURN_IRQ_MIN));
mask <<= (irq_nr == SATURN_IRQ_MAX);
mask &= SATURN_IRQ_MASK;
return mask;
}
static inline void mask_saturn_irq(unsigned int irq_nr)
{
u32 mask;
mask = ctrl_inl(SATURN_IMR);
mask |= saturn_irq_mask(irq_nr);
ctrl_outl(mask, SATURN_IMR);
}
static inline void unmask_saturn_irq(unsigned int irq_nr)
{
u32 mask;
mask = ctrl_inl(SATURN_IMR);
mask &= ~saturn_irq_mask(irq_nr);
ctrl_outl(mask, SATURN_IMR);
}
static void disable_saturn_irq(unsigned int irq_nr)
{
mask_saturn_irq(irq_nr);
}
static void enable_saturn_irq(unsigned int irq_nr)
{
unmask_saturn_irq(irq_nr);
}
static void mask_and_ack_saturn_irq(unsigned int irq_nr)
{
mask_saturn_irq(irq_nr);
}
static void end_saturn_irq(unsigned int irq_nr)
{
if (!(irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
unmask_saturn_irq(irq_nr);
}
static unsigned int startup_saturn_irq(unsigned int irq_nr)
{
unmask_saturn_irq(irq_nr);
return 0;
}
static void shutdown_saturn_irq(unsigned int irq_nr)
{
mask_saturn_irq(irq_nr);
}
static struct hw_interrupt_type saturn_int = {
.typename = "Saturn",
.enable = enable_saturn_irq,
.disable = disable_saturn_irq,
.ack = mask_and_ack_saturn_irq,
.end = end_saturn_irq,
.startup = startup_saturn_irq,
.shutdown = shutdown_saturn_irq,
};
int saturn_irq_demux(int irq_nr)
{
/* FIXME */
return irq_nr;
}
arch/sh/boards/saturn/setup.c deleted 100644 → 0
View file @ 98283bb4
/*
* arch/sh/boards/saturn/setup.c
*
* Hardware support for the Sega Saturn.
*
* Copyright (c) 2002 Paul Mundt
*
* Released under the terms of the GNU GPL v2.0.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
#include <asm/machvec.h>
#include <asm/mach/io.h>
extern int saturn_irq_demux(int irq_nr);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_saturn __initmv = {
.mv_name = "Sega Saturn",
.mv_nr_irqs = 80, /* Fix this later */
.mv_isa_port2addr = saturn_isa_port2addr,
.mv_irq_demux = saturn_irq_demux,
.mv_ioremap = saturn_ioremap,
.mv_iounmap = saturn_iounmap,
};
ALIAS_MV(saturn)
arch/sh/boards/saturn/smp.c deleted 100644 → 0
View file @ 98283bb4
/*
* arch/sh/boards/saturn/smp.c
*
* SMP support for the Sega Saturn.
*
* Copyright (c) 2002 Paul Mundt
*
* Released under the terms of the GNU GPL v2.0.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/saturn/smpc.h>
extern void start_secondary(void);
void __smp_send_ipi(unsigned int cpu, unsigned int action)
{
/* Nothing here yet .. */
}
unsigned int __smp_probe_cpus(void)
{
/*
* This is just a straightforward master/slave configuration,
* and probing isn't really supported..
*/
return 2;
}
/*
* We're only allowed to do byte-access to SMPC registers. In
* addition to which, we treat them as write-only, since
* reading from them will return undefined data.
*/
static inline void smpc_slave_stop(unsigned int cpu)
{
smpc_barrier();
ctrl_outb(1, SMPC_STATUS);
ctrl_outb(SMPC_CMD_SSHOFF, SMPC_COMMAND);
smpc_barrier();
}
static inline void smpc_slave_start(unsigned int cpu)
{
ctrl_outb(1, SMPC_STATUS);
ctrl_outb(SMPC_CMD_SSHON, SMPC_COMMAND);
smpc_barrier();
}
void __smp_slave_init(unsigned int cpu)
{
register unsigned long vbr;
void **entry;
__asm__ __volatile__ ("stc vbr, %0\n\t" : "=r" (vbr));
entry = (void **)(vbr + 0x310 + 0x94);
smpc_slave_stop(cpu);
*(void **)entry = (void *)start_secondary;
smpc_slave_start(cpu);
}
arch/sh/boards/se/7206/setup.c
View file @ b91cba52
......@@ -70,7 +70,7 @@ __initcall(se7206_devices_setup);
* The Machine Vector
*/
struct sh_machine_vector mv_se __initmv = {
static struct sh_machine_vector mv_se __initmv = {
.mv_name = "SolutionEngine",
.mv_nr_irqs = 256,
.mv_inb = se7206_inb,
......@@ -96,4 +96,3 @@ struct sh_machine_vector mv_se __initmv = {
.mv_init_irq = init_se7206_IRQ,
};
ALIAS_MV(se)
arch/sh/boards/se/7300/setup.c
View file @ b91cba52
......@@ -46,7 +46,7 @@ __initcall(se7300_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_7300se __initmv = {
static struct sh_machine_vector mv_7300se __initmv = {
.mv_name = "SolutionEngine 7300",
.mv_nr_irqs = 109,
.mv_inb = sh7300se_inb,
......@@ -72,4 +72,3 @@ struct sh_machine_vector mv_7300se __initmv = {
.mv_init_irq = init_7300se_IRQ,
};
ALIAS_MV(7300se)
arch/sh/boards/se/73180/setup.c
View file @ b91cba52
......@@ -46,7 +46,7 @@ __initcall(se73180_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_73180se __initmv = {
static struct sh_machine_vector mv_73180se __initmv = {
.mv_name = "SolutionEngine 73180",
.mv_nr_irqs = 108,
.mv_inb = sh73180se_inb,
......@@ -73,4 +73,3 @@ struct sh_machine_vector mv_73180se __initmv = {
.mv_init_irq = init_73180se_IRQ,
.mv_irq_demux = shmse_irq_demux,
};
ALIAS_MV(73180se)
arch/sh/boards/se/7343/setup.c
View file @ b91cba52
......@@ -64,7 +64,7 @@ static void __init sh7343se_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_7343se __initmv = {
static struct sh_machine_vector mv_7343se __initmv = {
.mv_name = "SolutionEngine 7343",
.mv_setup = sh7343se_setup,
.mv_nr_irqs = 108,
......@@ -92,4 +92,3 @@ struct sh_machine_vector mv_7343se __initmv = {
.mv_init_irq = init_7343se_IRQ,
.mv_irq_demux = shmse_irq_demux,
};
ALIAS_MV(7343se)
arch/sh/boards/se/7619/setup.c
View file @ b91cba52
......@@ -15,8 +15,7 @@
* The Machine Vector
*/
struct sh_machine_vector mv_se __initmv = {
static struct sh_machine_vector mv_se __initmv = {
.mv_name = "SolutionEngine",
.mv_nr_irqs = 108,
};
ALIAS_MV(se)
arch/sh/boards/se/770x/irq.c
View file @ b91cba52
......@@ -15,46 +15,7 @@
#include <asm/io.h>
#include <asm/se.h>
/*
* If the problem of make_ipr_irq is solved,
* this code will become unnecessary. :-)
*/
static void se770x_disable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
}
static void se770x_enable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
}
static struct irq_chip se770x_irq_chip = {
.name = "MS770xSE-FPGA",
.mask = se770x_disable_ipr_irq,
.unmask = se770x_enable_ipr_irq,
.mask_ack = se770x_disable_ipr_irq,
};
void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
{
int i;
for (i = 0; i < nr_irqs; i++) {
unsigned int irq = table[i].irq;
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
handle_level_irq, "level");
set_irq_chip_data(irq, &table[i]);
se770x_enable_ipr_irq(irq);
}
}
static struct ipr_data se770x_ipr_map[] = {
static struct ipr_data ipr_irq_table[] = {
/*
* Super I/O (Just mimic PC):
* 1: keyboard
......@@ -68,46 +29,67 @@ static struct ipr_data se770x_ipr_map[] = {
*/
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
/* This is default value */
{ 13, 0, 8, 0x0f-13 ,BCR_ILCRA},
{ 5 , 0, 4, 0x0f- 5 ,BCR_ILCRA},
{ 10, 0, 0, 0x0f-10, BCR_ILCRB},
{ 7 , 0, 4, 0x0f- 7, BCR_ILCRC},
{ 3 , 0, 0, 0x0f- 3, BCR_ILCRC},
{ 1 , 0, 12, 0x0f- 1, BCR_ILCRD},
{ 12, 0, 4, 0x0f-12, BCR_ILCRD}, /* LAN */
{ 2 , 0, 8, 0x0f- 2, BCR_ILCRE}, /* PCIRQ2 */
{ 6 , 0, 4, 0x0f- 6, BCR_ILCRE}, /* PCIRQ1 */
{ 14, 0, 0, 0x0f-14, BCR_ILCRE}, /* PCIRQ0 */
{ 0 , 0, 12, 0x0f , BCR_ILCRF},
{ 4 , 0, 4, 0x0f- 4, BCR_ILCRF},
{ 8 , 0, 12, 0x0f- 8, BCR_ILCRG},
{ 9 , 0, 8, 0x0f- 9, BCR_ILCRG},
{ 11, 0, 4, 0x0f-11, BCR_ILCRG},
{ 13, 0, 8, 0x0f-13, },
{ 5 , 0, 4, 0x0f- 5, },
{ 10, 1, 0, 0x0f-10, },
{ 7 , 2, 4, 0x0f- 7, },
{ 3 , 2, 0, 0x0f- 3, },
{ 1 , 3, 12, 0x0f- 1, },
{ 12, 3, 4, 0x0f-12, }, /* LAN */
{ 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
{ 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
{ 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
{ 0 , 5, 12, 0x0f , },
{ 4 , 5, 4, 0x0f- 4, },
{ 8 , 6, 12, 0x0f- 8, },
{ 9 , 6, 8, 0x0f- 9, },
{ 11, 6, 4, 0x0f-11, },
#else
{ 14, 0, 8, 0x0f-14 ,BCR_ILCRA},
{ 12, 0, 4, 0x0f-12 ,BCR_ILCRA},
{ 8, 0, 4, 0x0f- 8 ,BCR_ILCRB},
{ 6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
{ 5, 0, 8, 0x0f- 5 ,BCR_ILCRC},
{ 4, 0, 4, 0x0f- 4 ,BCR_ILCRC},
{ 3, 0, 0, 0x0f- 3 ,BCR_ILCRC},
{ 1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
{ 14, 0, 8, 0x0f-14, },
{ 12, 0, 4, 0x0f-12, },
{ 8, 1, 4, 0x0f- 8, },
{ 6, 2, 12, 0x0f- 6, },
{ 5, 2, 8, 0x0f- 5, },
{ 4, 2, 4, 0x0f- 4, },
{ 3, 2, 0, 0x0f- 3, },
{ 1, 3, 12, 0x0f- 1, },
#if defined(CONFIG_STNIC)
/* ST NIC */
{ 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */
{ 10, 3, 4, 0x0f-10, }, /* LAN */
#endif
/* MRSHPC IRQs setting */
{ 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */
{ 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */
{ 9, 0, 4, 0x0f- 9 ,BCR_ILCRE}, /* PCIRQ1 */
{ 7, 0, 0, 0x0f- 7 ,BCR_ILCRE}, /* PCIRQ0 */
{ 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
{ 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
{ 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
{ 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
/* NOTE: #2 and #13 are not used on PC */
{ 13, 0, 4, 0x0f-13 ,BCR_ILCRG}, /* SLOTIRQ2 */
{ 2, 0, 0, 0x0f- 2 ,BCR_ILCRG}, /* SLOTIRQ1 */
{ 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
{ 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
#endif
};
static unsigned long ipr_offsets[] = {
BCR_ILCRA,
BCR_ILCRB,
BCR_ILCRC,
BCR_ILCRD,
BCR_ILCRE,
BCR_ILCRF,
BCR_ILCRG,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-se770x",
},
};
/*
* Initialize IRQ setting
*/
......@@ -122,5 +104,5 @@ void __init init_se_IRQ(void)
ctrl_outw(0, BCR_ILCRF);
ctrl_outw(0, BCR_ILCRG);
make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
arch/sh/boards/se/770x/setup.c
View file @ b91cba52
......@@ -122,7 +122,7 @@ device_initcall(se_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_se __initmv = {
static struct sh_machine_vector mv_se __initmv = {
.mv_name = "SolutionEngine",
.mv_setup = smsc_setup,
#if defined(CONFIG_CPU_SH4)
......@@ -160,4 +160,3 @@ struct sh_machine_vector mv_se __initmv = {
.mv_init_irq = init_se_IRQ,
};
ALIAS_MV(se)
arch/sh/boards/se/7722/irq.c
View file @ b91cba52
......@@ -19,15 +19,24 @@
#define INTC_INTMSK0 0xFFD00044
#define INTC_INTMSKCLR0 0xFFD00064
struct se7722_data {
unsigned char irq;
unsigned char ipr_idx;
unsigned char shift;
unsigned short priority;
unsigned long addr;
};
static void disable_se7722_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
struct se7722_data *p = get_irq_chip_data(irq);
ctrl_outw( ctrl_inw( p->addr ) | p->priority , p->addr );
}
static void enable_se7722_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
struct se7722_data *p = get_irq_chip_data(irq);
ctrl_outw( ctrl_inw( p->addr ) & ~p->priority , p->addr );
}
......@@ -38,7 +47,7 @@ static struct irq_chip se7722_irq_chip __read_mostly = {
.mask_ack = disable_se7722_irq,
};
static struct ipr_data ipr_irq_table[] = {
static struct se7722_data ipr_irq_table[] = {
/* irq ,idx,sft, priority , addr */
{ MRSHPC_IRQ0 , 0 , 0 , MRSHPC_BIT0 , IRQ01_MASK } ,
{ MRSHPC_IRQ1 , 0 , 0 , MRSHPC_BIT1 , IRQ01_MASK } ,
......
arch/sh/boards/se/7722/setup.c
View file @ b91cba52
......@@ -137,7 +137,7 @@ static void __init se7722_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_se7722 __initmv = {
static struct sh_machine_vector mv_se7722 __initmv = {
.mv_name = "Solution Engine 7722" ,
.mv_setup = se7722_setup ,
.mv_nr_irqs = 109 ,
......@@ -145,4 +145,3 @@ struct sh_machine_vector mv_se7722 __initmv = {
.mv_irq_demux = se7722_irq_demux,
};
ALIAS_MV(se7722)
arch/sh/boards/se/7751/irq.c
View file @ b91cba52
......@@ -14,44 +14,31 @@
#include <asm/irq.h>
#include <asm/se7751.h>
static struct ipr_data se7751_ipr_map[] = {
/* Leave old Solution Engine code in for reference. */
#if defined(CONFIG_SH_SOLUTION_ENGINE)
/*
* Super I/O (Just mimic PC):
* 1: keyboard
* 3: serial 0
* 4: serial 1
* 5: printer
* 6: floppy
* 8: rtc
* 12: mouse
* 14: ide0
*/
{ 14, BCR_ILCRA, 2, 0x0f-14 },
{ 12, BCR_ILCRA, 1, 0x0f-12 },
{ 8, BCR_ILCRB, 1, 0x0f- 8 },
{ 6, BCR_ILCRC, 3, 0x0f- 6 },
{ 5, BCR_ILCRC, 2, 0x0f- 5 },
{ 4, BCR_ILCRC, 1, 0x0f- 4 },
{ 3, BCR_ILCRC, 0, 0x0f- 3 },
{ 1, BCR_ILCRD, 3, 0x0f- 1 },
static struct ipr_data ipr_irq_table[] = {
{ 13, 3, 3, 2 },
/* Add additional entries here as drivers are added and tested. */
};
{ 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */
static unsigned long ipr_offsets[] = {
BCR_ILCRA,
BCR_ILCRB,
BCR_ILCRC,
BCR_ILCRD,
BCR_ILCRE,
BCR_ILCRF,
BCR_ILCRG,
};
{ 0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */
{ 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */
{ 9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */
{ 7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
/* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
/* NOTE: #2 and #13 are not used on PC */
{ 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */
{ 2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */
#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE)
{ 13, BCR_ILCRD, 3, 2 },
/* Add additional entries here as drivers are added and tested. */
#endif
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-se7751",
},
};
/*
......@@ -59,5 +46,5 @@ static struct ipr_data se7751_ipr_map[] = {
*/
void __init init_7751se_IRQ(void)
{
make_ipr_irq(se7751_ipr_map, ARRAY_SIZE(se7751_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
arch/sh/boards/se/7751/setup.c
View file @ b91cba52
......@@ -48,7 +48,7 @@ __initcall(se7751_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_7751se __initmv = {
static struct sh_machine_vector mv_7751se __initmv = {
.mv_name = "7751 SolutionEngine",
.mv_nr_irqs = 72,
......@@ -71,4 +71,3 @@ struct sh_machine_vector mv_7751se __initmv = {
.mv_init_irq = init_7751se_IRQ,
};
ALIAS_MV(7751se)
arch/sh/boards/se/7780/irq.c
View file @ b91cba52
......@@ -16,28 +16,6 @@
#include <asm/io.h>
#include <asm/se7780.h>
#define INTC_INTMSK0 0xFFD00044
#define INTC_INTMSKCLR0 0xFFD00064
static void disable_se7780_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
ctrl_outl(1 << p->msk_shift, INTC_INTMSK0 + p->msk_offset);
}
static void enable_se7780_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
ctrl_outl(1 << p->msk_shift, INTC_INTMSKCLR0 + p->msk_offset);
}
static struct irq_chip se7780_irq_chip __read_mostly = {
.name = "SE7780",
.mask = disable_se7780_irq,
.unmask = enable_se7780_irq,
.mask_ack = disable_se7780_irq,
};
static struct intc2_data intc2_irq_table[] = {
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
......@@ -51,13 +29,24 @@ static struct intc2_data intc2_irq_table[] = {
{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */
};
static struct intc2_desc intc2_irq_desc __read_mostly = {
.prio_base = 0, /* N/A */
.msk_base = 0xffd00044,
.mskclr_base = 0xffd00064,
.intc2_data = intc2_irq_table,
.nr_irqs = ARRAY_SIZE(intc2_irq_table),
.chip = {
.name = "INTC2-se7780",
},
};
/*
* Initialize IRQ setting
*/
void __init init_se7780_IRQ(void)
{
int i ;
/* enable all interrupt at FPGA */
ctrl_outw(0, FPGA_INTMSK1);
/* mask SM501 interrupt */
......@@ -79,11 +68,5 @@ void __init init_se7780_IRQ(void)
/* FPGA + 0x0A */
ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++) {
disable_irq_nosync(intc2_irq_table[i].irq);
set_irq_chip_and_handler_name( intc2_irq_table[i].irq, &se7780_irq_chip,
handle_level_irq, "level");
set_irq_chip_data( intc2_irq_table[i].irq, &intc2_irq_table[i] );
disable_se7780_irq(intc2_irq_table[i].irq);
}
register_intc2_controller(&intc2_irq_desc);
}
arch/sh/boards/se/7780/setup.c
View file @ b91cba52
......@@ -113,10 +113,9 @@ static void __init se7780_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_se7780 __initmv = {
static struct sh_machine_vector mv_se7780 __initmv = {
.mv_name = "Solution Engine 7780" ,
.mv_setup = se7780_setup ,
.mv_nr_irqs = 111 ,
.mv_init_irq = init_se7780_IRQ,
};
ALIAS_MV(se7780)
arch/sh/boards/sh03/setup.c
View file @ b91cba52
......@@ -15,17 +15,33 @@
#include <asm/sh03/sh03.h>
#include <asm/addrspace.h>
static struct ipr_data sh03_ipr_map[] = {
{ IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY },
{ IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY },
{ IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY },
{ IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY },
static struct ipr_data ipr_irq_table[] = {
{ IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
{ IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
{ IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
{ IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
};
static unsigned long ipr_offsets[] = {
INTC_IPRD,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-sh03",
},
};
static void __init init_sh03_IRQ(void)
{
ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
make_ipr_irq(sh03_ipr_map, ARRAY_SIZE(sh03_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
extern void *cf_io_base;
......@@ -74,11 +90,10 @@ static int __init sh03_devices_setup(void)
}
__initcall(sh03_devices_setup);
struct sh_machine_vector mv_sh03 __initmv = {
static struct sh_machine_vector mv_sh03 __initmv = {
.mv_name = "Interface (CTP/PCI-SH03)",
.mv_setup = sh03_setup,
.mv_nr_irqs = 48,
.mv_ioport_map = sh03_ioport_map,
.mv_init_irq = init_sh03_IRQ,
};
ALIAS_MV(sh03)
arch/sh/boards/shmin/setup.c
View file @ b91cba52
......@@ -6,28 +6,44 @@
* SHMIN Support.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/machvec.h>
#include <asm/shmin.h>
#include <asm/clock.h>
#include <asm/irq.h>
#include <asm/io.h>
#define PFC_PHCR 0xa400010eUL
#define INTC_ICR1 0xa4000010UL
#define INTC_IPRC 0xa4000016UL
static struct ipr_data shmin_ipr_map[] = {
{ .irq=32, .addr=INTC_IPRC, .shift= 0, .priority=0 },
{ .irq=33, .addr=INTC_IPRC, .shift= 4, .priority=0 },
{ .irq=34, .addr=INTC_IPRC, .shift= 8, .priority=8 },
{ .irq=35, .addr=INTC_IPRC, .shift=12, .priority=0 },
static struct ipr_data ipr_irq_table[] = {
{ 32, 0, 0, 0 },
{ 33, 0, 4, 0 },
{ 34, 0, 8, 8 },
{ 35, 0, 12, 0 },
};
static unsigned long ipr_offsets[] = {
INTC_IPRC,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-shmin",
},
};
static void __init init_shmin_irq(void)
{
ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
make_ipr_irq(shmin_ipr_map, ARRAY_SIZE(shmin_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
......@@ -43,9 +59,8 @@ static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
}
struct sh_machine_vector mv_shmin __initmv = {
static struct sh_machine_vector mv_shmin __initmv = {
.mv_name = "SHMIN",
.mv_init_irq = init_shmin_irq,
.mv_ioport_map = shmin_ioport_map,
};
ALIAS_MV(shmin)
arch/sh/boards/snapgear/setup.c
View file @ b91cba52
......@@ -68,11 +68,27 @@ module_init(eraseconfig_init);
* IRL3 = crypto
*/
static struct ipr_data snapgear_ipr_map[] = {
make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
static struct ipr_data ipr_irq_table[] = {
{ IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
{ IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
{ IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
{ IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
};
static unsigned long ipr_offsets[] = {
INTC_IPRD,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-snapgear",
},
};
static void __init init_snapgear_IRQ(void)
......@@ -82,7 +98,7 @@ static void __init init_snapgear_IRQ(void)
printk("Setup SnapGear IRQ/IPR ...\n");
make_ipr_irq(snapgear_ipr_map, ARRAY_SIZE(snapgear_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
/*
......@@ -96,7 +112,7 @@ static void __init snapgear_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_snapgear __initmv = {
static struct sh_machine_vector mv_snapgear __initmv = {
.mv_name = "SnapGear SecureEdge5410",
.mv_setup = snapgear_setup,
.mv_nr_irqs = 72,
......@@ -117,4 +133,3 @@ struct sh_machine_vector mv_snapgear __initmv = {
.mv_init_irq = init_snapgear_IRQ,
};
ALIAS_MV(snapgear)
arch/sh/boards/superh/microdev/setup.c
View file @ b91cba52
......@@ -371,7 +371,7 @@ static void __init microdev_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_sh4202_microdev __initmv = {
static struct sh_machine_vector mv_sh4202_microdev __initmv = {
.mv_name = "SH4-202 MicroDev",
.mv_setup = microdev_setup,
.mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
......@@ -403,4 +403,3 @@ struct sh_machine_vector mv_sh4202_microdev __initmv = {
.mv_heartbeat = microdev_heartbeat,
#endif
};
ALIAS_MV(sh4202_microdev)
arch/sh/boards/titan/setup.c
View file @ b91cba52
......@@ -12,7 +12,7 @@
#include <asm/titan.h>
#include <asm/io.h>
static struct ipr_data titan_ipr_map[] = {
static struct ipr_data ipr_irq_table[] = {
/* IRQ, IPR idx, shift, prio */
{ TITAN_IRQ_WAN, 3, 12, 8 }, /* eth0 (WAN) */
{ TITAN_IRQ_LAN, 3, 8, 8 }, /* eth1 (LAN) */
......@@ -20,15 +20,33 @@ static struct ipr_data titan_ipr_map[] = {
{ TITAN_IRQ_USB, 3, 0, 8 }, /* mPCI B (bottom), USB */
};
static unsigned long ipr_offsets[] = { /* stolen from setup-sh7750.c */
0xffd00004UL, /* 0: IPRA */
0xffd00008UL, /* 1: IPRB */
0xffd0000cUL, /* 2: IPRC */
0xffd00010UL, /* 3: IPRD */
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-titan",
},
};
static void __init init_titan_irq(void)
{
/* enable individual interrupt mode for externals */
ipr_irq_enable_irlm();
/* register ipr irqs */
make_ipr_irq(titan_ipr_map, ARRAY_SIZE(titan_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
struct sh_machine_vector mv_titan __initmv = {
static struct sh_machine_vector mv_titan __initmv = {
.mv_name = "Titan",
.mv_inb = titan_inb,
......@@ -52,4 +70,3 @@ struct sh_machine_vector mv_titan __initmv = {
.mv_init_irq = init_titan_irq,
};
ALIAS_MV(titan)
arch/sh/boards/unknown/Makefile deleted 100644 → 0
View file @ 98283bb4
#
# Makefile for unknown SH boards
#
obj-y := setup.o
arch/sh/boards/unknown/setup.c deleted 100644 → 0
View file @ 98283bb4
/*
* linux/arch/sh/boards/unknown/setup.c
*
* Copyright (C) 2002 Paul Mundt
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Setup code for an unknown machine (internal peripherals only)
*
* This is the simplest of all boards, and serves only as a quick and dirty
* method to start debugging a new board during bring-up until proper board
* setup code is written.
*/
#include <linux/init.h>
#include <asm/machvec.h>
struct sh_machine_vector mv_unknown __initmv = {
.mv_name = "Unknown",
};
ALIAS_MV(unknown)
arch/sh/cchips/Kconfig
View file @ b91cba52
......@@ -13,10 +13,8 @@ config VOYAGERGX
are additional GPIO bits that can be used to interface to
external as well.
# A board must have defined HD6446X_SERIES in order to see these
config HD6446X_SERIES
bool "HD6446x support"
default n
bool
choice
prompt "HD6446x options"
......@@ -25,7 +23,6 @@ choice
config HD64461
bool "Hitachi HD64461 companion chip support"
depends on CPU_SUBTYPE_SH7709
---help---
The Hitachi HD64461 provides an interface for
the SH7709 CPU, supporting a LCD controller,
......@@ -40,7 +37,6 @@ config HD64461
config HD64465
bool "Hitachi HD64465 companion chip support"
depends on CPU_SUBTYPE_SH7750
---help---
The Hitachi HD64465 provides an interface for
the SH7750 CPU, supporting a LCD controller,
......
arch/sh/configs/dreamcast_defconfig
View file @ b91cba52
This diff is collapsed.
arch/sh/configs/r7780mp_defconfig 0 → 100644
View file @ b91cba52
This diff is collapsed.
arch/sh/configs/r7785rp_defconfig
View file @ b91cba52
This diff is collapsed.
arch/sh/configs/se7206_defconfig
View file @ b91cba52
This diff is collapsed.
arch/sh/configs/se7619_defconfig
View file @ b91cba52
This diff is collapsed.
arch/sh/configs/se7722_defconfig
View file @ b91cba52
This diff is collapsed.
arch/sh/configs/shx3_defconfig 0 → 100644
View file @ b91cba52
This diff is collapsed.
arch/sh/drivers/dma/Kconfig
View file @ b91cba52
......@@ -36,23 +36,6 @@ config NR_DMA_CHANNELS
support. Setting this to a higher value allows for cascading DMACs
with additional channels.
config DMA_PAGE_OPS
bool "Use DMAC for page copy/clear"
depends on SH_DMA && BROKEN
help
Selecting this option will use a dual-address mode configured channel
in the SH DMAC for copy_page()/clear_page(). Primarily a performance
hack.
config DMA_PAGE_OPS_CHANNEL
depends on DMA_PAGE_OPS
int "DMA channel for sh memory-manager page copy/clear"
default "3"
help
This allows the specification of the dual address dma channel,
in case channel 3 is unavailable. On the SH4, channels 1,2, and 3
are dual-address capable.
config SH_DMABRG
bool "SH7760 DMABRG support"
depends on CPU_SUBTYPE_SH7760
......
arch/sh/drivers/pci/Kconfig
View file @ b91cba52
config PCI
bool "PCI support"
depends on SYS_SUPPORTS_PCI
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
......
arch/sh/kernel/Makefile
View file @ b91cba52
......@@ -4,10 +4,9 @@
extra-y := head.o init_task.o vmlinux.lds
obj-y := process.o signal.o traps.o irq.o \
ptrace.o setup.o time.o sys_sh.o semaphore.o \
io.o io_generic.o sh_ksyms.o syscalls.o \
debugtraps.o
obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process.o ptrace.o \
semaphore.o setup.o signal.o sys_sh.o syscalls.o \
time.o topology.o traps.o
obj-y += cpu/ timers/
obj-$(CONFIG_VSYSCALL) += vsyscall/
......@@ -17,7 +16,7 @@ obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_MODULES) += sh_ksyms.o module.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
......
arch/sh/kernel/cf-enabler.c
View file @ b91cba52
......@@ -75,11 +75,7 @@ static int __init cf_init_default(void)
#if defined(CONFIG_CPU_SH4)
allocate_cf_area();
#endif
#if defined(CONFIG_SH_UNKNOWN)
/* This should be done in each board's init_xxx_irq. */
make_imask_irq(14);
disable_irq(14);
#endif
return 0;
}
......
arch/sh/kernel/cpu/init.c
View file @ b91cba52
......@@ -21,8 +21,7 @@
#include <asm/cacheflush.h>
#include <asm/cache.h>
#include <asm/io.h>
extern void detect_cpu_and_cache_system(void);
#include <asm/ubc.h>
/*
* Generic wrapper for command line arguments to disable on-chip
......@@ -152,15 +151,6 @@ static void __init cache_init(void)
flags |= CCR_CACHE_CB;
#endif
#ifdef CONFIG_SH_OCRAM
/* Turn on OCRAM -- halve the OC */
flags |= CCR_CACHE_ORA;
current_cpu_data.dcache.sets >>= 1;
current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
current_cpu_data.dcache.linesz;
#endif
ctrl_outl(flags, CCR);
back_to_P1();
}
......@@ -269,7 +259,6 @@ asmlinkage void __init sh_cpu_init(void)
}
#endif
#ifdef CONFIG_UBC_WAKEUP
/*
* Some brain-damaged loaders decided it would be a good idea to put
* the UBC to sleep. This causes some issues when it comes to things
......@@ -277,7 +266,5 @@ asmlinkage void __init sh_cpu_init(void)
* we wake it up and hope that all is well.
*/
ubc_wakeup();
#endif
speculative_execution_init();
}
arch/sh/kernel/cpu/irq/intc2.c
View file @ b91cba52
......@@ -13,36 +13,31 @@
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/smp.h>
#if defined(CONFIG_CPU_SUBTYPE_SH7760)
#define INTC2_BASE 0xfe080000
#define INTC2_INTMSK (INTC2_BASE + 0x40)
#define INTC2_INTMSKCLR (INTC2_BASE + 0x60)
#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
#define INTC2_BASE 0xffd40000
#define INTC2_INTMSK (INTC2_BASE + 0x38)
#define INTC2_INTMSKCLR (INTC2_BASE + 0x3c)
#endif
static inline struct intc2_desc *get_intc2_desc(unsigned int irq)
{
struct irq_chip *chip = get_irq_chip(irq);
return (void *)((char *)chip - offsetof(struct intc2_desc, chip));
}
static void disable_intc2_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
ctrl_outl(1 << p->msk_shift, INTC2_INTMSK + p->msk_offset);
struct intc2_desc *d = get_intc2_desc(irq);
ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset +
(hard_smp_processor_id() * 4));
}
static void enable_intc2_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
ctrl_outl(1 << p->msk_shift, INTC2_INTMSKCLR + p->msk_offset);
}
struct intc2_desc *d = get_intc2_desc(irq);
static struct irq_chip intc2_irq_chip = {
.name = "INTC2",
.mask = disable_intc2_irq,
.unmask = enable_intc2_irq,
.mask_ack = disable_intc2_irq,
};
ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset +
(hard_smp_processor_id() * 4));
}
/*
* Setup an INTC2 style interrupt.
......@@ -56,30 +51,36 @@ static struct irq_chip intc2_irq_chip = {
*
* in the intc2_data table.
*/
void make_intc2_irq(struct intc2_data *table, unsigned int nr_irqs)
void register_intc2_controller(struct intc2_desc *desc)
{
int i;
for (i = 0; i < nr_irqs; i++) {
desc->chip.mask = disable_intc2_irq;
desc->chip.unmask = enable_intc2_irq;
desc->chip.mask_ack = disable_intc2_irq;
for (i = 0; i < desc->nr_irqs; i++) {
unsigned long ipr, flags;
struct intc2_data *p = table + i;
struct intc2_data *p = desc->intc2_data + i;
disable_irq_nosync(p->irq);
/* Set the priority level */
local_irq_save(flags);
if (desc->prio_base) {
/* Set the priority level */
local_irq_save(flags);
ipr = ctrl_inl(INTC2_BASE + p->ipr_offset);
ipr &= ~(0xf << p->ipr_shift);
ipr |= p->priority << p->ipr_shift;
ctrl_outl(ipr, INTC2_BASE + p->ipr_offset);
ipr = ctrl_inl(desc->prio_base + p->ipr_offset);
ipr &= ~(0xf << p->ipr_shift);
ipr |= p->priority << p->ipr_shift;
ctrl_outl(ipr, desc->prio_base + p->ipr_offset);
local_irq_restore(flags);
local_irq_restore(flags);
}
set_irq_chip_and_handler_name(p->irq, &intc2_irq_chip,
set_irq_chip_and_handler_name(p->irq, &desc->chip,
handle_level_irq, "level");
set_irq_chip_data(p->irq, p);
enable_intc2_irq(p->irq);
disable_intc2_irq(p->irq);
}
}
arch/sh/kernel/cpu/irq/ipr.c
View file @ b91cba52
......@@ -22,58 +22,57 @@
#include <linux/io.h>
#include <linux/interrupt.h>
static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
{
struct irq_chip *chip = get_irq_chip(irq);
return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
}
static void disable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
/* Set the priority in IPR to 0 */
ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
ctrl_outw(ctrl_inw(addr) & (0xffff ^ (0xf << p->shift)), addr);
}
static void enable_ipr_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
/* Set priority in IPR back to original value */
ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
ctrl_outw(ctrl_inw(addr) | (p->priority << p->shift), addr);
}
static struct irq_chip ipr_irq_chip = {
.name = "IPR",
.mask = disable_ipr_irq,
.unmask = enable_ipr_irq,
.mask_ack = disable_ipr_irq,
};
unsigned int map_ipridx_to_addr(int idx) __attribute__ ((weak));
unsigned int map_ipridx_to_addr(int idx)
{
return 0;
}
/*
* The shift value is now the number of bits to shift, not the number of
* bits/4. This is to make it easier to read the value directly from the
* datasheets. The IPR address is calculated using the ipr_offset table.
*/
void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs)
void register_ipr_controller(struct ipr_desc *desc)
{
int i;
for (i = 0; i < nr_irqs; i++) {
unsigned int irq = table[i].irq;
desc->chip.mask = disable_ipr_irq;
desc->chip.unmask = enable_ipr_irq;
desc->chip.mask_ack = disable_ipr_irq;
if (!irq)
irq = table[i].irq = i;
for (i = 0; i < desc->nr_irqs; i++) {
struct ipr_data *p = desc->ipr_data + i;
/* could the IPR index be mapped, if not we ignore this */
if (!table[i].addr) {
table[i].addr = map_ipridx_to_addr(table[i].ipr_idx);
if (!table[i].addr)
continue;
}
BUG_ON(p->ipr_idx >= desc->nr_offsets);
BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &ipr_irq_chip,
disable_irq_nosync(p->irq);
set_irq_chip_and_handler_name(p->irq, &desc->chip,
handle_level_irq, "level");
set_irq_chip_data(irq, &table[i]);
enable_ipr_irq(irq);
set_irq_chip_data(p->irq, p);
disable_ipr_irq(p->irq);
}
}
EXPORT_SYMBOL(make_ipr_irq);
EXPORT_SYMBOL(register_ipr_controller);
#if !defined(CONFIG_CPU_HAS_PINT_IRQ)
int ipr_irq_demux(int irq)
......
arch/sh/kernel/cpu/sh2/entry.S
View file @ b91cba52
......@@ -311,6 +311,7 @@ restore_all:
rte
nop
.align 2
#ifdef CONFIG_TRACE_IRQFLAGS
1: .long trace_hardirqs_off
#endif
......
arch/sh/kernel/cpu/sh2/probe.c
View file @ b91cba52
......@@ -9,23 +9,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/processor.h>
#include <asm/cache.h>
int __init detect_cpu_and_cache_system(void)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7604)
current_cpu_data.type = CPU_SH7604;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1<<10);
current_cpu_data.dcache.sets = 64;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
#if defined(CONFIG_CPU_SUBTYPE_SH7619)
current_cpu_data.type = CPU_SH7619;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1<<12);
......
arch/sh/kernel/cpu/sh2/setup-sh7619.c
View file @ b91cba52
......@@ -52,7 +52,7 @@ static int __init sh7619_devices_setup(void)
}
__initcall(sh7619_devices_setup);
static struct ipr_data sh7619_ipr_map[] = {
static struct ipr_data ipr_irq_table[] = {
{ 86, 0, 4, 2 }, /* CMI0 */
{ 88, 1, 12, 3 }, /* SCIF0_ERI */
{ 89, 1, 12, 3 }, /* SCIF0_RXI */
......@@ -68,7 +68,7 @@ static struct ipr_data sh7619_ipr_map[] = {
{ 99, 1, 4, 3 }, /* SCIF2_TXI */
};
static unsigned int ipr_offsets[] = {
static unsigned long ipr_offsets[] = {
0xf8080000, /* IPRC */
0xf8080002, /* IPRD */
0xf8080004, /* IPRE */
......@@ -76,15 +76,19 @@ static unsigned int ipr_offsets[] = {
0xf8080008, /* IPRG */
};
/* given the IPR index return the address of the IPR register */
unsigned int map_ipridx_to_addr(int idx)
{
if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
return 0;
return ipr_offsets[idx];
}
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-sh7619",
},
};
void __init init_IRQ_ipr(void)
{
make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
View file @ b91cba52
......@@ -57,7 +57,7 @@ static int __init sh7206_devices_setup(void)
}
__initcall(sh7206_devices_setup);
static struct ipr_data sh7206_ipr_map[] = {
static struct ipr_data ipr_irq_table[] = {
{ 140, 7, 12, 2 }, /* CMI0 */
{ 164, 8, 4, 2 }, /* MTU2_TGI1A */
{ 240, 13, 12, 3 }, /* SCIF0_BRI */
......@@ -78,7 +78,7 @@ static struct ipr_data sh7206_ipr_map[] = {
{ 255, 13, 0, 3 }, /* SCIF3_TXI */
};
static unsigned int ipr_offsets[] = {
static unsigned long ipr_offsets[] = {
0xfffe0818, /* IPR01 */
0xfffe081a, /* IPR02 */
0, /* unused */
......@@ -95,15 +95,19 @@ static unsigned int ipr_offsets[] = {
0xfffe0c10, /* IPR14 */
};
/* given the IPR index return the address of the IPR register */
unsigned int map_ipridx_to_addr(int idx)
{
if (unlikely(idx >= ARRAY_SIZE(ipr_offsets)))
return 0;
return ipr_offsets[idx];
}
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-sh7206",
},
};
void __init init_IRQ_ipr(void)
{
make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map));
register_ipr_controller(&ipr_irq_desc);
}
arch/sh/kernel/cpu/sh3/entry.S
View file @ b91cba52
......@@ -340,8 +340,27 @@ ENTRY(vbr_base)
general_exception:
mov.l 1f, k2
mov.l 2f, k3
#ifdef CONFIG_CPU_SUBTYPE_SHX3
mov.l @k2, k2
! Is EXPEVT larger than 0x800?
mov #0x8, k0
shll8 k0
cmp/hs k0, k2
bf 0f
! then add 0x580 (k2 is 0xd80 or 0xda0)
mov #0x58, k0
shll2 k0
shll2 k0
add k0, k2
0:
bra handle_exception
nop
#else
bra handle_exception
mov.l @k2, k2
#endif
.align 2
1: .long EXPEVT
2: .long ret_from_exception
......
arch/sh/kernel/cpu/sh3/setup-sh7705.c
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arch/sh/kernel/cpu/sh3/setup-sh7709.c
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arch/sh/kernel/cpu/sh3/setup-sh7710.c
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arch/sh/kernel/cpu/sh4/Makefile
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......@@ -10,7 +10,11 @@ obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750S) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7091) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7760) += setup-sh7760.o
obj-$(CONFIG_CPU_SUBTYPE_SH4_202) += setup-sh4-202.o
......
arch/sh/kernel/cpu/sh4/probe.c
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......@@ -141,6 +141,14 @@ int __init detect_cpu_and_cache_system(void)
current_cpu_data.flags |= CPU_HAS_LLSC;
}
break;
case 0x4000: /* 1st cut */
case 0x4001: /* 2nd cut */
current_cpu_data.type = CPU_SHX3;
current_cpu_data.icache.ways = 4;
current_cpu_data.dcache.ways = 4;
current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
CPU_HAS_LLSC;
break;
case 0x8000:
current_cpu_data.type = CPU_ST40RA;
current_cpu_data.flags |= CPU_HAS_FPU;
......
arch/sh/kernel/cpu/sh4/setup-sh7750.c
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arch/sh/kernel/cpu/sh4/setup-sh7760.c
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arch/sh/kernel/cpu/sh4a/Makefile
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......@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o
obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
# Primary on-chip clocks (common)
clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o
......@@ -17,5 +18,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
obj-y += $(clock-y)
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