Commit e9d59922 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Staging: remove sxg driver

Unfortunatly, the upstream company has abandonded development of this
driver.  So it's best to just remove the driver from the tree.

Cc: Christopher Harrer <charrer@alacritech.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent 0b33559a
......@@ -45,8 +45,6 @@ source "drivers/staging/et131x/Kconfig"
source "drivers/staging/slicoss/Kconfig"
source "drivers/staging/sxg/Kconfig"
source "drivers/staging/go7007/Kconfig"
source "drivers/staging/usbip/Kconfig"
......
......@@ -5,7 +5,6 @@ obj-$(CONFIG_STAGING) += staging.o
obj-$(CONFIG_ET131X) += et131x/
obj-$(CONFIG_SLICOSS) += slicoss/
obj-$(CONFIG_SXG) += sxg/
obj-$(CONFIG_VIDEO_GO7007) += go7007/
obj-$(CONFIG_USB_IP_COMMON) += usbip/
obj-$(CONFIG_W35UND) += winbond/
......
config SXG
tristate "Alacritech SLIC Technology Non-Accelerated 10Gbe support"
depends on PCI && NETDEV_10000
depends on X86
default n
help
This driver supports the Alacritech SLIC Technology Non-Accelerated
10Gbe network cards.
To compile this driver as a module, choose
M here: the module will be called sxg_nic.
obj-$(CONFIG_SXG) += sxg_nic.o
sxg_nic-y := sxg.o sxg_ethtool.o
This is the rough cut at a driver for the Alacritech SLIC Technology
Non-Accelerated 10Gbe network driver.
TODO:
- remove wrappers
- checkpatch.pl cleanups
- new functionality that the card needs
- remove reliance on x86
Please send patches to:
Greg Kroah-Hartman <gregkh@suse.de>
for any cleanups that you do to this driver.
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/**************************************************************************
*
* Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: sxg_os.h
*
* These are the Linux-specific definitions required for the SLICOSS
* driver, which should allow for greater portability to other OSes.
*/
#ifndef _SLIC_OS_SPECIFIC_H_
#define _SLIC_OS_SPECIFIC_H_
#define FALSE (0)
#define TRUE (1)
struct list_entry {
struct list_entry *nle_flink;
struct list_entry *nle_blink;
};
#define InitializeListHead(l) \
(l)->nle_flink = (l)->nle_blink = (l)
#define IsListEmpty(h) \
((h)->nle_flink == (h))
#define RemoveEntryList(e) \
do { \
list_entry *b; \
list_entry *f; \
\
f = (e)->nle_flink; \
b = (e)->nle_blink; \
b->nle_flink = f; \
f->nle_blink = b; \
} while (0)
/* These two have to be inlined since they return things. */
static inline struct list_entry *RemoveHeadList(struct list_entry *l)
{
struct list_entry *f;
struct list_entry *e;
e = l->nle_flink;
f = e->nle_flink;
l->nle_flink = f;
f->nle_blink = l;
return (e);
}
static inline struct list_entry *RemoveTailList(struct list_entry *l)
{
struct list_entry *b;
struct list_entry *e;
e = l->nle_blink;
b = e->nle_blink;
l->nle_blink = b;
b->nle_flink = l;
return (e);
}
#define InsertTailList(l, e) \
do { \
struct list_entry *b; \
\
b = (l)->nle_blink; \
(e)->nle_flink = (l); \
(e)->nle_blink = b; \
b->nle_flink = (e); \
(l)->nle_blink = (e); \
} while (0)
#define InsertHeadList(l, e) \
do { \
struct list_entry *f; \
\
f = (l)->nle_flink; \
(e)->nle_flink = f; \
(e)->nle_blink = l; \
f->nle_blink = (e); \
(l)->nle_flink = (e); \
} while (0)
#define ATK_DEBUG 1
#if ATK_DEBUG
#define SLIC_TIMESTAMP(value) { \
struct timeval timev; \
do_gettimeofday(&timev); \
value = timev.tv_sec*1000000 + timev.tv_usec; \
}
#else
#define SLIC_TIMESTAMP(value)
#endif
/* SXG DEFINES */
#ifdef ATKDBG
#define SXG_TIMESTAMP(value) { \
struct timeval timev; \
do_gettimeofday(&timev); \
value = timev.tv_sec*1000000 + timev.tv_usec; \
}
#else
#define SXG_TIMESTAMP(value)
#endif
#define WRITE_REG(reg,value,flush) \
sxg_reg32_write((&reg), (value), (flush))
#define WRITE_REG64(a,reg,value,cpu) \
sxg_reg64_write((a),(&reg),(value),(cpu))
#define READ_REG(reg,value) (value) = readl((void __iomem *)(&reg))
#endif /* _SLIC_OS_SPECIFIC_H_ */
/**************************************************************************
*
* Copyright © 2000-2008 Alacritech, Inc. All rights reserved.
*
* $Id: sxgdbg.h,v 1.1 2008/06/27 12:49:28 mook Exp $
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* The views and conclusions contained in the software and documentation
* are those of the authors and should not be interpreted as representing
* official policies, either expressed or implied, of Alacritech, Inc.
*
**************************************************************************/
/*
* FILENAME: sxgdbg.h
*
* All debug and assertion-based definitions and macros are included
* in this file for the SXGOSS driver.
*/
#ifndef _SXG_DEBUG_H_
#define _SXG_DEBUG_H_
#define ATKDBG 1
#define ATK_TRACE_ENABLED 0
#define DBG_ERROR(n, args...) printk(KERN_WARNING n, ##args)
#ifdef ASSERT
#undef ASSERT
#endif
#define SXG_ASSERT_ENABLED
#ifdef SXG_ASSERT_ENABLED
#ifndef ASSERT
#define ASSERT(a) \
{ \
if (!(a)) { \
DBG_ERROR("ASSERT() Failure: file %s, function %s line %d\n", \
__FILE__, __func__, __LINE__); \
} \
}
#endif
#else
#ifndef ASSERT
#define ASSERT(a)
#endif
#endif /* SXG_ASSERT_ENABLED */
#ifdef ATKDBG
/*
* Global for timer granularity; every driver must have an instance
* of this initialized to 0
*/
extern ulong ATKTimerDiv;
/*
* trace_entry -
*
* This structure defines an entry in the trace buffer. The
* first few fields mean the same from entry to entry, while
* the meaning of last several fields change to suit the
* needs of the trace entry. Typically they are function call
* parameters.
*/
struct trace_entry {
char name[8];/* 8 character name - like 's'i'm'b'a'r'c'v' */
u32 time; /* Current clock tic */
unsigned char cpu; /* Current CPU */
unsigned char irql; /* Current IRQL */
unsigned char driver;/* The driver which added the trace call */
/* pad to 4 byte boundary - will probably get used */
unsigned char pad2;
u32 arg1; /* Caller arg1 */
u32 arg2; /* Caller arg2 */
u32 arg3; /* Caller arg3 */
u32 arg4; /* Caller arg4 */
};
/* Driver types for driver field in struct trace_entry */
#define TRACE_SXG 1
#define TRACE_VPCI 2
#define TRACE_SLIC 3
#define TRACE_ENTRIES 1024
struct sxg_trace_buffer {
/* aid for windbg extension */
unsigned int size;
unsigned int in; /* Where to add */
unsigned int level; /* Current Trace level */
spinlock_t lock; /* For MP tracing */
struct trace_entry entries[TRACE_ENTRIES];/* The circular buffer */
};
/*
* The trace levels
*
* XXX At the moment I am only defining critical, important, and noisy.
* I am leaving room for more if anyone wants them.
*/
#define TRACE_NONE 0 /* For trace level - if no tracing wanted */
#define TRACE_CRITICAL 1 /* minimal tracing - only critical stuff */
#define TRACE_IMPORTANT 5 /* more tracing - anything important */
#define TRACE_NOISY 10 /* Everything in the world */
/* The macros themselves */
#if ATK_TRACE_ENABLED
#define SXG_TRACE_INIT(buffer, tlevel) \
{ \
memset((buffer), 0, sizeof(struct sxg_trace_buffer)); \
(buffer)->level = (tlevel); \
(buffer)->size = TRACE_ENTRIES; \
spin_lock_init(&(buffer)->lock); \
}
#else
#define SXG_TRACE_INIT(buffer, tlevel)
#endif
/*The trace macro. This is active only if ATK_TRACE_ENABLED is set. */
#if ATK_TRACE_ENABLED
#define SXG_TRACE(tdriver, buffer, tlevel, tname, a1, a2, a3, a4) { \
if ((buffer) && ((buffer)->level >= (tlevel))) { \
unsigned int trace_irql = 0;/* ?????? FIX THIS */\
unsigned int trace_len; \
struct trace_entry *trace_entry; \
struct timeval timev; \
if(spin_trylock(&(buffer)->lock)) { \
trace_entry = &(buffer)->entries[(buffer)->in]; \
do_gettimeofday(&timev); \
\
memset(trace_entry->name, 0, 8); \
trace_len = strlen(tname); \
trace_len = trace_len > 8 ? 8 : trace_len; \
memcpy(trace_entry->name, (tname), trace_len); \
trace_entry->time = timev.tv_usec; \
trace_entry->cpu = (unsigned char)(smp_processor_id() & 0xFF);\
trace_entry->driver = (tdriver); \
trace_entry->irql = trace_irql; \
trace_entry->arg1 = (ulong)(a1); \
trace_entry->arg2 = (ulong)(a2); \
trace_entry->arg3 = (ulong)(a3); \
trace_entry->arg4 = (ulong)(a4); \
\
(buffer)->in++; \
if ((buffer)->in == TRACE_ENTRIES) \
(buffer)->in = 0; \
\
spin_unlock(&(buffer)->lock); \
} \
} \
}
#else
#define SXG_TRACE(tdriver, buffer, tlevel, tname, a1, a2, a3, a4)
#endif
#endif
#endif /* _SXG_DEBUG_H_ */
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/*
* Copyright ? 1997-2008 Alacritech, Inc. All rights reserved
*
* $Id: sxgphycode.h,v 1.2 2008/10/02 01:44:07 Exp $
*
* sxgphycode.h:
*
* This file PHY microcode and register initialization data.
*/
/**********************************************************************
* PHY Microcode
**********************************************************************/
//
// The following contains both PHY microcode and PHY register
// initialization data. It is specific to both the PHY and the
// type of transceiver.
//
// Download for AEL2005C PHY with SR/LR transceiver (10GBASE-SR or 10GBASE-LR)
// AEL2005 SR firmware rev 18 (microInit_mdio_SR_AEL2005C_18.tx).
static struct phy_ucode PhyUcode[] = {
// NOTE: An address of 0 is a special case. When the download routine
// sees an address of 0, it does not write to the PHY. Instead, it delays
// the download. The length of the delay (in ms) is given in the data field.
// Delays are required at certain points.
// Platform-specific MDIO Patches:
// (include patches for 10G RX polarity flip, 50Mhz Synth, etc)
// Addr Data
{0xc017, 0xfeb0}, // flip RX_LOS polarity (mandatory patch for SFP+ applications)
{0xC001, 0x0428}, // flip RX serial polarity
{0xc013, 0xf341}, // invert lxmit clock (mandatory patch)
{0xc210, 0x8000}, // reset datapath (mandatory patch)
{0xc210, 0x8100}, // reset datapath (mandatory patch)
{0xc210, 0x8000}, // reset datapath (mandatory patch)
{0xc210, 0x0000}, // reset datapath (mandatory patch)
{0x0000, 0x0032}, // wait for 50ms for datapath reset to complete. (mandatory patch)
// Transceiver-specific MDIO Patches:
{0xc003, 0x0181}, // (bit 7) enable the CDR inc setting in 1.C005 (mandatory patch for SR code)
{0xc010, 0x448a}, // (bit 14) mask out high BER input from the LOS signal in 1.000A (mandatory patch for SR code)
// Transceiver-specific Microcontroller Initialization:
{0xc04a, 0x5200}, // activate microcontroller and pause
{0x0000, 0x0032}, // wait 50ms for microcontroller before writing in code.
// code block starts here:
{0xcc00, 0x2ff4}, {0xcc01, 0x3cd4}, {0xcc02, 0x2015}, {0xcc03, 0x3125},
{0xcc04, 0x6524}, {0xcc05, 0x27ff}, {0xcc06, 0x300f}, {0xcc07, 0x2c8b},
{0xcc08, 0x300b}, {0xcc09, 0x4009}, {0xcc0a, 0x400e}, {0xcc0b, 0x2f12},
{0xcc0c, 0x3002}, {0xcc0d, 0x1002}, {0xcc0e, 0x2112}, {0xcc0f, 0x3012},
{0xcc10, 0x1002}, {0xcc11, 0x2572}, {0xcc12, 0x3012}, {0xcc13, 0x1002},
{0xcc14, 0xd01e}, {0xcc15, 0x2772}, {0xcc16, 0x3012}, {0xcc17, 0x1002},
{0xcc18, 0x2004}, {0xcc19, 0x3c84}, {0xcc1a, 0x6436}, {0xcc1b, 0x2007},
{0xcc1c, 0x3f87}, {0xcc1d, 0x8676}, {0xcc1e, 0x40b7}, {0xcc1f, 0xa746},
{0xcc20, 0x4047}, {0xcc21, 0x5673}, {0xcc22, 0x2982}, {0xcc23, 0x3002},
{0xcc24, 0x13d2}, {0xcc25, 0x8bbd}, {0xcc26, 0x2802}, {0xcc27, 0x3012},
{0xcc28, 0x1002}, {0xcc29, 0x2032}, {0xcc2a, 0x3012}, {0xcc2b, 0x1002},
{0xcc2c, 0x5cc3}, {0xcc2d, 0x0314}, {0xcc2e, 0x2942}, {0xcc2f, 0x3002},
{0xcc30, 0x1002}, {0xcc31, 0xd019}, {0xcc32, 0x2fd2}, {0xcc33, 0x3002},
{0xcc34, 0x1002}, {0xcc35, 0x2a04}, {0xcc36, 0x3c74}, {0xcc37, 0x6435},
{0xcc38, 0x2fa4}, {0xcc39, 0x3cd4}, {0xcc3a, 0x6624}, {0xcc3b, 0x5563},
{0xcc3c, 0x2d42}, {0xcc3d, 0x3002}, {0xcc3e, 0x13d2}, {0xcc3f, 0x464d},
{0xcc40, 0x2802}, {0xcc41, 0x3012}, {0xcc42, 0x1002}, {0xcc43, 0x2fd2},
{0xcc44, 0x3002}, {0xcc45, 0x1002}, {0xcc46, 0x2fb4}, {0xcc47, 0x3cd4},
{0xcc48, 0x6624}, {0xcc49, 0x5563}, {0xcc4a, 0x2d42}, {0xcc4b, 0x3002},
{0xcc4c, 0x13d2}, {0xcc4d, 0x2e72}, {0xcc4e, 0x3002}, {0xcc4f, 0x1002},
{0xcc50, 0x2f72}, {0xcc51, 0x3002}, {0xcc52, 0x1002}, {0xcc53, 0x0004},
{0xcc54, 0x2942}, {0xcc55, 0x3002}, {0xcc56, 0x1002}, {0xcc57, 0x2032},
{0xcc58, 0x3012}, {0xcc59, 0x1002}, {0xcc5a, 0x5cc3}, {0xcc5b, 0x0317},
{0xcc5c, 0x2f12}, {0xcc5d, 0x3002}, {0xcc5e, 0x1002}, {0xcc5f, 0x2942},
{0xcc60, 0x3002}, {0xcc61, 0x1002}, {0xcc62, 0x22cd}, {0xcc63, 0x301d},
{0xcc64, 0x2802}, {0xcc65, 0x3012}, {0xcc66, 0x1002}, {0xcc67, 0x20b2},
{0xcc68, 0x3012}, {0xcc69, 0x1002}, {0xcc6a, 0x5aa3}, {0xcc6b, 0x2dc2},
{0xcc6c, 0x3002}, {0xcc6d, 0x1312}, {0xcc6e, 0x2d02}, {0xcc6f, 0x3002},
{0xcc70, 0x1002}, {0xcc71, 0x2807}, {0xcc72, 0x31a7}, {0xcc73, 0x20c4},
{0xcc74, 0x3c24}, {0xcc75, 0x6724}, {0xcc76, 0x1002}, {0xcc77, 0x2807},
{0xcc78, 0x3187}, {0xcc79, 0x20c4}, {0xcc7a, 0x3c24}, {0xcc7b, 0x6724},
{0xcc7c, 0x1002}, {0xcc7d, 0x2514}, {0xcc7e, 0x3c64}, {0xcc7f, 0x6436},
{0xcc80, 0xdff4}, {0xcc81, 0x6436}, {0xcc82, 0x1002}, {0xcc83, 0x40a4},
{0xcc84, 0x643c}, {0xcc85, 0x4016}, {0xcc86, 0x8c6c}, {0xcc87, 0x2b24},
{0xcc88, 0x3c24}, {0xcc89, 0x6435}, {0xcc8a, 0x1002}, {0xcc8b, 0x2b24},
{0xcc8c, 0x3c24}, {0xcc8d, 0x643a}, {0xcc8e, 0x4025}, {0xcc8f, 0x8a5a},
{0xcc90, 0x1002}, {0xcc91, 0x26d1}, {0xcc92, 0x3011}, {0xcc93, 0x1001},
{0xcc94, 0xc7a0}, {0xcc95, 0x0100}, {0xcc96, 0xc502}, {0xcc97, 0x53ac},
{0xcc98, 0xc503}, {0xcc99, 0xd5d5}, {0xcc9a, 0xc600}, {0xcc9b, 0x2a6d},
{0xcc9c, 0xc601}, {0xcc9d, 0x2a4c}, {0xcc9e, 0xc602}, {0xcc9f, 0x0111},
{0xcca0, 0xc60c}, {0xcca1, 0x5900}, {0xcca2, 0xc710}, {0xcca3, 0x0700},
{0xcca4, 0xc718}, {0xcca5, 0x0700}, {0xcca6, 0xc720}, {0xcca7, 0x4700},
{0xcca8, 0xc801}, {0xcca9, 0x7f50}, {0xccaa, 0xc802}, {0xccab, 0x7760},
{0xccac, 0xc803}, {0xccad, 0x7fce}, {0xccae, 0xc804}, {0xccaf, 0x5700},
{0xccb0, 0xc805}, {0xccb1, 0x5f11}, {0xccb2, 0xc806}, {0xccb3, 0x4751},
{0xccb4, 0xc807}, {0xccb5, 0x57e1}, {0xccb6, 0xc808}, {0xccb7, 0x2700},
{0xccb8, 0xc809}, {0xccb9, 0x0000}, {0xccba, 0xc821}, {0xccbb, 0x0002},
{0xccbc, 0xc822}, {0xccbd, 0x0014}, {0xccbe, 0xc832}, {0xccbf, 0x1186},
{0xccc0, 0xc847}, {0xccc1, 0x1e02}, {0xccc2, 0xc013}, {0xccc3, 0xf341},
{0xccc4, 0xc01a}, {0xccc5, 0x0446}, {0xccc6, 0xc024}, {0xccc7, 0x1000},
{0xccc8, 0xc025}, {0xccc9, 0x0a00}, {0xccca, 0xc026}, {0xcccb, 0x0c0c},
{0xcccc, 0xc027}, {0xcccd, 0x0c0c}, {0xccce, 0xc029}, {0xcccf, 0x00a0},
{0xccd0, 0xc030}, {0xccd1, 0x0a00}, {0xccd2, 0xc03c}, {0xccd3, 0x001c},
{0xccd4, 0xc005}, {0xccd5, 0x7a06}, {0xccd6, 0x0000}, {0xccd7, 0x26d1},
{0xccd8, 0x3011}, {0xccd9, 0x1001}, {0xccda, 0xc620}, {0xccdb, 0x0000},
{0xccdc, 0xc621}, {0xccdd, 0x003f}, {0xccde, 0xc622}, {0xccdf, 0x0000},
{0xcce0, 0xc623}, {0xcce1, 0x0000}, {0xcce2, 0xc624}, {0xcce3, 0x0000},
{0xcce4, 0xc625}, {0xcce5, 0x0000}, {0xcce6, 0xc627}, {0xcce7, 0x0000},
{0xcce8, 0xc628}, {0xcce9, 0x0000}, {0xccea, 0xc62c}, {0xcceb, 0x0000},
{0xccec, 0x0000}, {0xcced, 0x2806}, {0xccee, 0x3cb6}, {0xccef, 0xc161},
{0xccf0, 0x6134}, {0xccf1, 0x6135}, {0xccf2, 0x5443}, {0xccf3, 0x0303},
{0xccf4, 0x6524}, {0xccf5, 0x000b}, {0xccf6, 0x1002}, {0xccf7, 0x2104},
{0xccf8, 0x3c24}, {0xccf9, 0x2105}, {0xccfa, 0x3805}, {0xccfb, 0x6524},
{0xccfc, 0xdff4}, {0xccfd, 0x4005}, {0xccfe, 0x6524}, {0xccff, 0x1002},
{0xcd00, 0x5dd3}, {0xcd01, 0x0306}, {0xcd02, 0x2ff7}, {0xcd03, 0x38f7},
{0xcd04, 0x60b7}, {0xcd05, 0xdffd}, {0xcd06, 0x000a}, {0xcd07, 0x1002},
{0xcd08, 0x0000},
// end of code block
// Unpause the microcontroller to start program
{0xca00, 0x0080},
{0xca12, 0x0000},
{0x0000, 0x000A}, // wait 10ms just to be safe
// Configure the LED's
{0xc214, 0x0099}, // configure the LED drivers (for Sahara rev B)
{0xc216, 0x0400}, // configure the one LED
{0xc217, 0x0000}, // don't drive the 2nd LED (if it exists)
{0xffff, 0xffff} // table terminator
};
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