- 04 Nov, 2019 6 commits
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Fabio Estevam authored
The following build warning is seen with W=1: arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:531.20-581.5: Warning (simple_bus_reg): /soc/tmu@1f00000: simple-bus unit address format error, expected "1f80000" Fix it by adjusting the tmu unit address to match its reg entry. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Move thermal-zone node from the soc node to the root node. thermal-zone node does not have any register properties and thus shouldn't be placed on the bus. This fixes the following build warnings with W=1: arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi:583.17-612.5: Warning (simple_bus_reg): /soc/thermal-zones: missing or empty reg/ranges property Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
The following build warning is seen with W=1: arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts:196.10-208.4: Warning (avoid_unnecessary_addr_size): /soc/i2c@2000000/fpga@66: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Fix it by removing the unnecessary #address-cells/#size-cells. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Machine compatible string normally is located in board DT, remove the duplicated one from SoC dtsi. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Rogerio Pimentel da Silva authored
Add remote control to i.MX8M EVK device tree. The rc protocol must be selected by writing to: /sys/devices/platform/ir-receiver/rc/rc0/protocols On my tests, I used "nec" rc protocol: echo nec > protocols Tested using evetest: evtest /dev/input/event0 Output log for each key pressed: Event: time 1568122608.267845, -------------- SYN_REPORT ------------ Event: time 1568122610.503835, type 4 (EV_MSC), code 4 (MSC_SCAN), value 440 Signed-off-by: Rogerio Pimentel da Silva <rpimentel.silva@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 28 Oct, 2019 13 commits
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Anson Huang authored
i.MX8MN LPDDR4 EVK board shares most of the device as DDR4 EVK board, the ONLY difference are the DDR type and PMIC, add support for it and make it default i.MX8MN EVK board as usual. The PMIC driver is NOT ready, so cpu-freq needs to be disabled as it depends on regulator provided by PMIC. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
i.MX8MN has different EVK boards to support different DDR types, the ONLY differences are DDR chips and PMIC, so most of the devices can be shared between these EVK boards, create a EVK dtsi file for common use. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stoica Cosmin-Stefan authored
Add initial version of device tree for S32V234-EVB, including nodes for the 4 Cortex-A53 cores, AIPS bus with UART modules, ARM architected timer and Generic Interrupt Controller (GIC). Keep SoC level separate from board level to let future boards with this SoC share common properties, while the dts files will keep board-dependent properties. Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com> Signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com> Signed-off-by: Dan Nica <dan.nica@nxp.com> Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com> Signed-off-by: Phu Luu An <phu.luuan@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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S.j. Wang authored
Assign clocks and clock-rates for audio plls, that audio drivers can utilize them. Add dai-tdm-slot-num and dai-tdm-slot-width for sound-wm8524, that sai driver can generate correct bit clock. Fixes: 13f3b9fd ("arm64: dts: imx8mm-evk: Enable audio codec wm8524") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
Add I2C node for switch watchdog present on both Zest and RMB3 boards. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
Add I2C node for accelerometer present on both Zest and RMB3 boards. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
It's 3V3_MAIN, not 3V3V_MAIN on schematic. Fix it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Andrey Smirnov authored
Regulator-vsd-3v3 is supplied via GEN_3V3 rail which is an output of an "always on" load switch supplied by 3V3_MAIN. GEN_3V3 is also used as vin-supply by a number of peripherals, so adding it also allows us to follow the schematic more closely. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Wen He authored
Update the property #clock-cells = <1> to #clock-cells = <0> of the dpclk, since the Display output pixel clock driver provides single clock output. Signed-off-by: Wen He <wen.he_1@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 25 Oct, 2019 3 commits
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Anson Huang authored
On i.MX8MQ EVK board, VDD_ARM is from a DC-DC converter which is always ON, the GPIO1_IO13 is ONLY to switch VDD_ARM's voltage between 0.9V and 1V for CPU DVFS, so VDD_ARM's GPIO regulator should be always ON to avoid below confusion after kernel boot up: imx8mqevk login: [ 31.776619] vdd_arm: disabling Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Enable scu key for i.MX8QXP MEK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Add scu key node for i.MX8QXP, disabled by default as it depends on board design. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 14 Oct, 2019 7 commits
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Anson Huang authored
All nodes are better to follow alphabetical sort except iomuxc which has huge pinctrl data, better to put it at the end of file. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Adjust some nodes to make them follow alphabetical sort except iomuxc node which is put at the end of file because of its huge pinctrl data. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Yinbo Zhu authored
layerscape otg function should be supported HNP SRP and ADP protocol accroing to rm doc, but dwc3 code not realize it and use id pin to detect who is host or device(0 is host 1 is device) this patch is to enable OTG mode on ls1028ardb ls1088ardb and ls1046ardb in dts Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Enable pca6416 on i.MX8MM EVK board's i2c3 bus. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Enable i2c3 for i.MX8MM EVK board. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
The iomuxc node is being put at end of file because of its huge pinctrl data. I2C devices should be placed in alphabetical sort. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Wen He authored
In order to maximise performance of the LCD Controller's 64-bit AXI bus, for any give speed bin of the device, the AXI master interface clock(ACLK) clock can be up to CPU_frequency/2, which is already capable of optimal performance. In general, ACLK is always expected to be equal to CPU_frequency/2. APB slave interface clock(PCLK) and Main processing clock(PCLK) both are tied to the same clock as ACLK. This change followed the LS1028A Architecture Specification Manual. Signed-off-by: Wen He <wen.he_1@nxp.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 07 Oct, 2019 1 commit
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Russell King authored
The LX2160A esdhc controllers are setup by the driver to be DMA coherent, but without marking them as such in DT, Linux thinks they are not. This can lead to random sporadic DMA errors, even to the extent of preventing boot, such as: mmc0: ADMA error mmc0: sdhci: ============ SDHCI REGISTER DUMP =========== mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202 mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001 mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013 mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038 mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000 mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000040d8 mmc0: sdhci: Timeout: 0x00000003 | Int stat: 0x00000001 mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202 mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00 mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000 mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33 mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00 mmc0: sdhci: Host ctl2: 0x00000000 mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c mmc0: sdhci: ============================================ mmc0: error -5 whilst initialising SD card These are caused by the device's descriptor fetch hitting speculatively loaded CPU cache lines that the CPU does not see through the normal, non-cacheable DMA coherent mapping that it uses for non-coherent devices. DT and the device must agree wrt whether the device is DMA coherent or not. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 06 Oct, 2019 8 commits
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Joakim Zhang authored
Add ddr pmu node for i.MX8MN EVK board. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
Temperature and hysteresis were picked after the CPU. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Use "fsl,imx8mm-ocotp" as i.MX8MN ocotp's fallback compatible instead of "fsl,imx7d-ocotp" to support SoC UID read, as i.MX8MN reuses i.MX8MM's SoC ID driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Compared to i.MX7D, i.MX8MM has different ocotp layout, so it should NOT use "fsl,imx7d-ocotp" as ocotp's fallback compatible, remove it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Enable i.MX8MN cpu-idle using generic ARM cpu-idle driver, 2 states are supported, details as below: root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/name WFI root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state0/usage 3098 root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/name cpu-pd-wait root@imx8mnevk:~# cat /sys/devices/system/cpu/cpu0/cpuidle/state1/usage 3078 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
Add i.MX8MN system counter node to enable timer-imx-sysctr broadcast timer driver. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
i.MX8MN can reuse i.MX8MQ's src driver, add "fsl,imx8mq-src" as src's fallback compatible to enable it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Anson Huang authored
i.MX8MN DDR4 EVK board has a GPIO LED to indicate status, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 30 Sep, 2019 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linuxLinus Torvalds authored
Pull btrfs fixes from David Sterba: "A bunch of fixes that accumulated in recent weeks, mostly material for stable. Summary: - fix for regression from 5.3 that prevents to use balance convert with single profile - qgroup fixes: rescan race, accounting leak with multiple writers, potential leak after io failure recovery - fix for use after free in relocation (reported by KASAN) - other error handling fixups" * tag 'for-5.4-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: btrfs: qgroup: Fix reserved data space leak if we have multiple reserve calls btrfs: qgroup: Fix the wrong target io_tree when freeing reserved data space btrfs: Fix a regression which we can't convert to SINGLE profile btrfs: relocation: fix use-after-free on dead relocation roots Btrfs: fix race setting up and completing qgroup rescan workers Btrfs: fix missing error return if writeback for extent buffer never started btrfs: adjust dirty_metadata_bytes after writeback failure of extent buffer Btrfs: fix selftests failure due to uninitialized i_mode in test inodes
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