- 20 Jun, 2013 7 commits
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Arnd Bergmann authored
Merge tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt From Linus Walleij: Nomadik DT and clock work: - Lee Jones' pinctrl compat ontology patches - A real clock driver for the Nomadik, 100% DT-based - Device tree changes for the Nomadik clocks * tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: add the new clocks to the device tree clk: nomadik: implement the Nomadik clocks properly pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS Conflicts: arch/arm/boot/dts/ste-nomadik-s8815.dts Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://github.com/mripard/linuxArnd Bergmann authored
From Maxime Ripard: Allwinner SoCs DT additions for 3.11, part 2 Mostly adds support for the i2c controllers and the Allwinner A10S SoC. * tag 'sunxi-dt-for-3.11-2' of git://github.com/mripard/linux: ARM: sunxi: Add Olimex A10s-Olinuxino-micro device tree ARM: sunxi: dt: Add Allwinner A10s DTSI ARM: sun4i: cubieboard: Enable the i2c controllers ARM: sun5i: olinuxino: Enable the i2c controllers ARM: sun5i: dt: Add i2c muxing options ARM: sun4i: dt: Add i2c muxing options ARM: sunxi: dt: Add i2c controller nodes to the DTSI Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Linus Walleij authored
This revamps the device tree to fit with the new clock implementation and brings it quite a bit closer to how the hardware actually works. After this the clock implementation knows about all clock gates and will gate off all unused clocks at boot time and save a bit of power. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The Nomadik clock implementation was a stub just using fixed clocks. This implements the clocks properly instead of relying on them all being on at boot and leaving them all on. The PLLs are on the top locking to the main chrystal oscillator, then the HCLK for the peripherals are below PLL2. The gated clocks are implemented with zero cells and given the clock ID as a property of each node, so every gate need to have its own node in the device tree. This is because the gate registers contain both HCLK gates and PCLK gates, where the latter has HCLK as parent. As can be seen from the register layout, this is a complete mixup, which means all these gates need their own node to properly model parent/child relations for PCLKs apart from the HCLKs. This driver also adds a helpful debugfs file to inspect the hardware state of the clock gates. This is the end result in <debugfs>/clk/clk_summary after applying a proper device tree: ulpiclk 0 0 60000000 mxtal 3 3 19200000 pll2 1 1 864000000 clk48 3 3 48000000 rngcclk 1 1 48000000 usbmclk 0 0 48000000 mshcclk 0 0 48000000 mspclk3 0 0 48000000 x3dclk 0 0 48000000 skeclk 0 0 48000000 owmclk 0 0 48000000 mspclk2 0 0 48000000 mspclk1 0 0 48000000 uart2clk 0 0 48000000 ipbmcclk 0 0 48000000 ipi2cclk 0 0 48000000 usbclk 0 0 48000000 mspclk0 0 0 48000000 uart1clk 1 2 48000000 i2c1clk 0 0 48000000 i2c0clk 0 0 48000000 sdiclk 1 1 48000000 uart0clk 0 0 48000000 sspiclk 0 0 48000000 irdaclk 0 0 48000000 clk72 0 0 72000000 difclk 0 0 72000000 clcdclk 0 0 72000000 clk216 0 0 216000000 hsiclkrx 0 0 216000000 clk108 0 0 108000000 hsiclktx 0 0 108000000 clk27 0 0 27000000 pll1 1 1 264000000 hclk 3 3 264000000 hclkrng 1 1 264000000 hclkusbm 0 0 264000000 hclkcryp 0 0 264000000 hclkhash 0 0 264000000 hclk3d 0 0 264000000 hclkhpi 0 0 264000000 hclksva 0 0 264000000 hclksaa 0 0 264000000 hclkdif 0 0 264000000 hclkusb 0 0 264000000 hclkclcd 0 0 264000000 hclkdma1 0 0 264000000 hclksdram 0 0 264000000 hclksmc 1 1 264000000 hclkdma0 0 0 264000000 pclk 7 9 264000000 pclkmsp3 0 0 264000000 pclkmshc 0 0 264000000 pclkhsem 0 0 264000000 pclkske 0 0 264000000 pclkowm 0 0 264000000 pclkmsp2 0 0 264000000 pclkmsp1 0 0 264000000 pclkuart2 0 0 264000000 pclkxti 0 0 264000000 pclkhsi 0 0 264000000 pclkmsp0 0 0 264000000 pclkuart1 1 1 264000000 pclki2c1 0 0 264000000 pclki2c0 0 0 264000000 pclksdi 1 1 264000000 pclkuart0 1 1 264000000 pclkssp 0 0 264000000 pclkirda 0 0 264000000 timclk 1 1 2400000 Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.linaro.org/people/shawnguo/linux-2.6Arnd Bergmann authored
From Shawn Guo: imx device tree changes for 3.11: * A bunch of new board additions, imx6sl-evk, vf610-twr, imx53-tx53, imx53-m53evk and imx27-phytec-phycore * Various pinctrl setting updates and additions * Enable various on board peripherals, usb, audio, nor, display etc. * Configure L2 cache data and tag latency from device tree * Add imx-weim bus driver * tag 'imx-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (82 commits) ARM: dts: imx27: Add VPU devicetree node ARM: mxc: fix gpio-ranges for VF610 ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962 ARM: dtsi: imx6dl: Add a pinctrl for AUDMUX ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1 ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration ARM: dts: Phytec imx6q pfla02 and pbab01 support ARM: dts: imx6q: Add pinctrl for usdhc2 and enet ARM: dts: imx27-phytec-phycore-rdk: Add MTD name for NOR flash ARM: dts: imx27-phytec-phycore-rdk: Add SDHC support ARM: dts: i.MX27: Add SDHC devicetree nodes ARM: dts: i.MX27: Add DMA devicetree node ARM: dts: imx6qdl-sabreauto: enable the WEIM NOR ARM: dts: imx6dl: add pinctrls for WEIM NOR ARM: dts: imx6q: add pinctrls for WEIM NOR ARM: dts: imx6qdl: add more information for WEIM ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.linaro.org/people/shawnguo/linux-2.6Arnd Bergmann authored
This is a dependency for imx/dt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.linaro.org/people/shawnguo/linux-2.6Arnd Bergmann authored
From Shawn Guo: mxs device tree changes for 3.11: * A couple of new board support, cfa10055 and cfa10057 * A few updates on cfa10036 device tree source * Some auart pinctrl data addition * Adopt soc bus infrastructure for mach-mxs * tag 'mxs-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs: dt: Add Crystalfontz CFA-10057 device tree ARM: mxs: dt: Add the Crystalfontz CFA-10055 device tree ARM: cfa10049: Switch the chip select pin of the LCD controller ARM: cfa10036: Add USB0 OTG port ARM: dts: apf28dev: Add touchscreen support for APF28dev ARM: mxs: Fix UARTs on M28EVK ARM: cfa10036: dt: Change i2c0 clock frequency ARM: dts: cfa10036: Change the OLED display to SSD1306 ARM: mx28: add auart4 2 pins pinmux to imx28.dtsi ARM: mx28: add auart3 2 pins pinmux to imx28.dtsi ARM: mx28: add auart2 2 pins pinmux to imx28.dtsi ARM: mxs: Use soc bus infrastructure ARM: dts: mx28: Adjust the digctl compatible string ARM: mxs: Remove init_irq declaration in machine description Includes an update to 3.10-rc6 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 19 Jun, 2013 2 commits
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git://git.xilinx.com/linux-xlnxArnd Bergmann authored
From Michal Simek: arm: Xilinx Zynq dt changes for v3.11 The branch contains: - DT uart handling cleanup - Support for zc706 and zed board - Removal of board compatible string * tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx: arm: dt: zynq: Add support for the zed platform arm: dt: zynq: Add support for the zc706 platform arm: dt: zynq: Use 'status' property for UART nodes arm: zynq: Remove board specific compatibility string clk: zynq: Remove deprecated clock code arm: zynq: Migrate platform to clock controller clk: zynq: Add clock controller driver clk: zynq: Factor out PLL driver Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Maxime Ripard authored
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Acked-by: Emilio López <emilio@elopez.com.ar>
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- 17 Jun, 2013 31 commits
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Soren Brinkmann authored
Add a DT fragment for the Zed Zynq platform and a corresponding target to the Makefile Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Soren Brinkmann authored
Add a DT fragment for the zc706 Zynq platform and a corresponding target to the Makefile. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Soren Brinkmann authored
Set the default status for UARTs to disabled in the zynq-7000.dtsi file and let board dts files enable the UARTs on demand. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Soren Brinkmann authored
It is not necessary to have board specific compatibility strings in the platform code. The board dts files can use the more generic 'xlnx,zynq-7000' string. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Alexander Shiyan authored
This patch adds the missing VPU devicetree node for i.MX27 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Stephen Warren authored
The gpio-ranges properties in vf610.dtsi were written according to an older version of the GPIO bindings. Unfortunately, these were changed incompatibly in commit 86853c83 "gpio: add gpio offset in gpio range cells property". This patch adds the missing required extra cell in each gpio-ranges property. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Enable WM8962 ALSA machine driver via devicetree. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Enable SSI2 and its pin configuration in AUDMUX. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Add WM8962 CODEC support and enable its parent I2C bus. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10, so add a regulator controled by GPIO_4_10 for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Add a pinctrl for AUDMUX used on imx6dl-sabresd. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Add a pinctrl for I2C1 used on imx6q/dl-sabresd. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Nicolin Chen authored
Setting GPIO_0 pad as clko1 clock output to provide MCLK for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Christian Hemp authored
Add support for imx6q Phytec phyFLEX-i.MX6 Quad (aka pfla02 and pbab01). - Module pfla02 - Carrier-Board pbab01 Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Christian Hemp authored
Add a group to the usdhc2 and enet pinctrl. Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Alexander Shiyan authored
This patch adds name for NOR flash. This keeps compatibility for commandline partitions parsing from old bootloaders and make name of device same for DT and non-DT boot. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutonix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Alexander Shiyan authored
This patch adds the SHDC devicetree node for PCM970 board. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutonix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Alexander Shiyan authored
This patch adds the missing SDHC devicetree nodes for i.MX27 SoCs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutonix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Alexander Shiyan authored
This patch adds the missing DMA devicetree node for i.MX27 SoCs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Sascha Hauer <s.hauer@pengutonix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Enable the WEIM NOR for imx6q{dl}-sabreauto boards. For the pin conflict with SPI NOR, its status is set to "disabled". Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Add two pinctrls for WEIM: one for the weim nor, another for the chipselect. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Add two pinctrls for WEIM: one for the weim nor, another for the chipselect. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
Add the clock and compatible information for the weim. Also adds the weim label. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
In the imx6q-sabreauto and imx6dl-sabreauto boards, the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but it is used as a data pin for the WEIM NOR. In order to fix the conflict, this patch removes the pin from the hog, and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto. The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Huang Shijie authored
The WEIM(Wireless External Interface Module) works like a bus. You can attach many different devices on it, such as NOR, onenand. In the case of i.MX6q-sabreauto, the NOR is connected to WEIM. This patch also adds the devicetree binding document. The driver only works when the devicetree is enabled. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Markus Niebel authored
Add missing pin config Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Steffen Trumtrar authored
use NO_PAD_CTL / 0x80000000 instead of 0x10000 to prevent misconfigured pads Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> [Steffen: split up patch into tqma53+mba53 part] Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Markus Niebel authored
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Markus Niebel authored
Add properties to make use of pca9554 gpio expander. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Markus Niebel authored
Enable the sgtl5000 found on MBa53 mainboard. Also enable audio muxer and ssi, which are needed for sound to work. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Philipp Zabel authored
Enable tve on MBa53. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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