- 02 Jul, 2016 2 commits
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git://git.infradead.org/users/jcooper/linuxThomas Gleixner authored
Pull irqchip core changes for v4.8 (second set) from Jason Cooper: - Add Aspeed VIC driver
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Jason Cooper authored
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- 23 Jun, 2016 5 commits
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git://git.infradead.org/users/jcooper/linuxThomas Gleixner authored
Pull irqchip core changes from Jason Cooper: - bcm283x avoid handle_IRQ - Fix sparse warnings on __iomem - Fix static functions - Fix missing includes - Replace __raw IO accessors to support big endian
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Jason Cooper authored
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Ben Dooks authored
Instead of using the __raw accessors, use the _relaxed versions to deal with any issues due to endian-ness of the CPU. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> [jac: reformat subject line, fix commit message typo] Link: https://lkml.kernel.org/r/1466504432-24187-10-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
Fix the use of __raw IO accessors when the readl/writel_relaxed are better. This should fix issues if the kernel is running as big endian. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> [jac: reformat subject line, fix commit message typo] Link: https://lkml.kernel.org/r/1466504432-24187-9-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Jon Hunter authored
The function irq_create_of_mapping() is used to create an interrupt mapping. However, depending on whether the irqdomain, to which the interrupt belongs, is part of a hierarchy, determines whether the mapping is created via calling irq_domain_alloc_irqs() or irq_create_mapping(). To dispose of the interrupt mapping, drivers call irq_dispose_mapping(). However, this function does not check to see if the irqdomain is part of a hierarchy or not and simply assumes that it was mapped via calling irq_create_mapping() so calls irq_domain_disassociate() to unmap the interrupt. Fix this by checking to see if the irqdomain is part of a hierarchy and if so call irq_domain_free_irqs() to free/unmap the interrupt. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Link: http://lkml.kernel.org/r/1466501002-16368-1-git-send-email-jonathanh@nvidia.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 22 Jun, 2016 2 commits
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Benjamin Herrenschmidt authored
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lkml.kernel.org/r/1463064193-2178-3-git-send-email-joel@jms.id.auSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Joel Stanley authored
Signed-off-by: Joel Stanley <joel@jms.id.au> Link: https://lkml.kernel.org/r/1463064193-2178-2-git-send-email-joel@jms.id.auSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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- 18 Jun, 2016 2 commits
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Keith Busch authored
There is no way to know which device in a VMD triggered an interrupt without invoking every registered driver's actions. This uses the untracked irq handler so that a less used device does not trigger spurious interrupt. We have been previously recommending users to enable "noirqdebug", but do not want to force a system setting just to keep this domain functional. Signed-off-by: Keith Busch <keith.busch@intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: Jon Derrick <jonathan.derrick@intel.com> Link: http://lkml.kernel.org/r/1466200821-29159-2-git-send-email-keith.busch@intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Keith Busch authored
This adds a software irq handler for controllers that multiplex interrupts from multiple devices, but don't know which device generated the interrupt. For these devices, the irq handler that demuxes must check every action for every software irq using the same h/w irq in order to find out which device generated the interrupt. This will inevitably trigger spurious interrupt detection if we are noting the irq. The new irq handler does not track the handling for spurious interrupt detection. An irq that uses this also won't get stats tracked since it didn't generate the interrupt, nor added to randomness since they are not random. Signed-off-by: Keith Busch <keith.busch@intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: Jon Derrick <jonathan.derrick@intel.com> Link: http://lkml.kernel.org/r/1466200821-29159-1-git-send-email-keith.busch@intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 14 Jun, 2016 1 commit
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Harvey Hunt authored
Set the irq_domain names so that they don't default to an unhelpful value. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Reviewed-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Qais Yousef <qsyousef@gmail.com> Cc: jason@lakedaemon.net Cc: marc.zyngier@arm.com Link: http://lkml.kernel.org/r/1464001657-31348-1-git-send-email-harvey.hunt@imgtec.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 13 Jun, 2016 25 commits
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Thomas Gleixner authored
Merge tag 'irqchip-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core First drop of irqchip updates for 4.8 from Marc Zyngier: - Fix a few bugs in configuring the default trigger from the irqdomain layer - Make the genirq layer PM aware - Add PM capability to the ARM GIC driver - Add support for 2-level translation tables to the GICv3 ITS driver
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Shanker Donthineni authored
Since device IDs are extremely sparse, the single, a.k.a flat table is not sufficient for the following two reasons. 1) According to ARM-GIC spec, ITS hw can access maximum of 256(pages)* 64K(pageszie) bytes. In the best case, it supports upto DEVid=21 sparse with minimum device table entry size 8bytes. 2) The maximum memory size that is possible without memblock depends on MAX_ORDER. 4MB on 4K page size kernel with default MAX_ORDER, so it supports DEVid range 19bits. The two-level device table feature brings us two advantages, the first is a very high possibility of supporting upto 32bit sparse, and the second one is the best utilization of memory allocation. The feature is enabled automatically during driver probe if the memory requirement is more than 2*ITS-pages and the hardware is capable of two-level table walk. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Shanker Donthineni authored
No references to argument 'node_name' after modifying pr_xxx() messages to include ITS base address instead of 'node_name'. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Shanker Donthineni authored
The function is getting out of control, it has too many goto statements and would be too complicated for adding a feature two-level device table. So, it is time for us to cleanup and move some of the logic to a separate function without affecting the existing functionality. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Shanker Donthineni authored
Only the device table BASERn needs to be handled differently as compared to all other tables. So, adding a separate function for easy code maintenance and improved code readability. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Shanker Donthineni authored
This patch adds the two handy helper functions for reading and writing ITS BASERn register. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> [Marc: Folded its_write_baser_cache into its_write_baser] Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
Add a platform driver to support non-root GICs that require runtime power-management. Currently, only non-root GICs are supported because the functions, smp_cross_call() and set_handle_irq(), that need to be called for a root controller are located in the __init section and so cannot be called by the platform driver. The GIC platform driver re-uses many functions from the existing GIC driver including some functions to save and restore the GIC context during power transitions. The functions for saving and restoring the GIC context are currently only defined if CONFIG_CPU_PM is enabled and to ensure that these functions are always defined when the platform driver is enabled, a dependency on CONFIG_ARM_GIC_PM (which selects the platform driver) has been added. In order to re-use the private GIC initialisation code, a new public function, gic_of_init_child(), has been added which calls various private functions to initialise the GIC. This is different from the existing gic_of_init() because it only supports non-root GICs (ie. does not call smp_cross_call() is set_handle_irq()) and is not located in the __init section (so can be used by platform drivers). Furthermore, gic_of_init_child() dynamically allocates memory for the GIC chip data which is also different from gic_of_init(). There is no specific suspend handling for GICs registered as platform devices. Non-wakeup interrupts will be disabled by the kernel during late suspend, however, this alone will not power down the GIC if interrupts have been requested and not freed. Therefore, requestors of non-wakeup interrupts will need to free them on entering suspend in order to power-down the GIC. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
The Tegra AGIC interrupt controller is compatible with the ARM GIC-400 interrupt controller. Add the compatible string and clock information for the AGIC to the GIC device-tree binding documentation. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
To support GICs that require runtime power management, it is necessary to add a platform driver, so that the probing of the chip can be deferred if resources, such as a power-domain, is not yet available. To prepare for adding a platform driver: 1. Drop the __init section from the gic_dist_config() so this can be re-used by the platform driver. 2. Add prototypes for functions required by the platform driver to the GIC header file so they can be re-used. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
For GICs that require runtime power-management it is necessary to populate the 'parent_device' member of the irqchip structure. In preparation for supporting such GICs, move the code that initialises the irqchip structure for a GIC into its own function called gic_init_chip() where the parent device pointer is also set. Instead of calling gic_init_chip() from within gic_init_bases(), move the calls to outside of this function, so that in the future we can avoid having to pass additional parameters to gic_init_bases() in order set the parent device pointer or set the name to a specific string. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
To re-use the code that initialises the GIC (found in __gic_init_bases()), from within a platform driver, it is necessary to move the code from the __init section so that it is always present and not removed. Unfortunately, it is not possible to simply drop the __init from the function declaration for __gic_init_bases() because it contains calls to set_smp_cross_call() and set_handle_irq() which are both located in the __init section. Fortunately, these calls are only required for the root controller and because the initial platform driver will only support non-root controllers that can be initialised later in the boot process, we can move these calls to another function. Move the bulk of the code from __gic_init_bases() to a new function called gic_init_bases() which is not located in the __init section and can be used by the platform driver. Update __gic_init_bases() to call gic_init_bases() and if necessary, set_smp_cross_call() and set_handle_irq(). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
Some IRQ chips may be located in a power domain outside of the CPU subsystem and hence will require device specific runtime power management. In order to support such IRQ chips, add a pointer for a device structure to the irq_chip structure, and if this pointer is populated by the IRQ chip driver and CONFIG_PM is selected in the kernel configuration, then the pm_runtime_get/put APIs for this chip will be called when an IRQ is requested/freed, respectively. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
Some IRQ chips, such as GPIO controllers or secondary level interrupt controllers, may require require additional runtime power management control to ensure they are accessible. For such IRQ chips, it makes sense to enable the IRQ chip when interrupts are requested and disabled them again once all interrupts have been freed. When mapping an IRQ, the IRQ type settings are read and then programmed. The mapping of the IRQ happens before the IRQ is requested and so the programming of the type settings occurs before the IRQ is requested. This is a problem for IRQ chips that require additional power management control because they may not be accessible yet. Therefore, when mapping the IRQ, don't program the type settings, just save them and then program these saved settings when the IRQ is requested (so long as if they are not overridden via the call to request the IRQ). Add a stub function for irq_domain_free_irqs() to avoid any compilation errors when CONFIG_IRQ_DOMAIN_HIERARCHY is not selected. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
As we now do for non-percpu interrupt, perform a lookup of the interrupt trigger if the user doesn't supply one. The difference here is that we can only do it at enable time (trigger configuration can be per-cpu as well). Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
For some devices the IRQ trigger type for a device is read from firmware, such as device-tree. The IRQ trigger type is typically read when the mapping for IRQ is created, which is before the IRQ is requested. Hence, the IRQ trigger type is programmed when mapping the IRQ and not when requesting the IRQ. Although this works for most cases, in order to support IRQ chips which require runtime power management, which may not be accessible prior to requesting the IRQ, it is desirable to look-up the IRQ trigger type when it is requested. Therefore, if the IRQ trigger type is not specified when __setup_irq() is called, look-up the saved IRQ trigger type. This will allow us to defer the programming of the trigger type from when the IRQ is mapped to when it is actually requested. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jon Hunter authored
When mapping an IRQ, it is possible that a mapping for the IRQ already exists. If mapping does exist then there are the following issues with regard to the handling of the IRQ type settings ... 1. If the domain is part of a hierarchy, then: a. We do not check that the type settings for the existing mapping match those of the new mapping. b. We do not check to see if the type settings have been programmed yet (and they might not have been) and so we may never set the type. 2. If the domain is NOT part of a hierarchy, we will overwrite the current type settings programmed if they are different from the previous mapping. Please note that irq_create_mapping() calls irq_find_mapping() to check if a mapping already exists. Although, it may be unlikely that the type settings for a shared interrupt would not match, nonetheless we should check for this. Therefore, to fix this check if a mapping exists (regardless of whether the domain is part of a hierarchy or not) and if it does then: 1. Return the IRQ number if the type settings match or are not specified. 2. Program the type settings and return the IRQ number if the type settings have not been programmed yet. 3. Otherwise if the type setting do not match, then print a warning and don't return the IRQ number. Furthermore, add a warning if the type return by irq_domain_translate() has bits outside the sense mask set and then clear these bits. If these bits are not cleared then this will cause the comparision of the type settings for an existing mapping to fail with that of the new mapping even if the sense bit themselves match. The reason being is that the existing type settings are read by calling irq_get_trigger_type() which will clear any bits outside the sense mask. This will allow us to detect irqchips that are not correctly clearing these bits and fix them. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Ben Dooks authored
The vic_syscore_ops and vic_of_init functions are not exported outside the driver, so make them static to remove the following warnings: drivers/irqchip/irq-vic.c:170:20: warning: symbol 'vic_syscore_ops' was not declared. Should it be static? drivers/irqchip/irq-vic.c:520:12: warning: symbol 'vic_of_init' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465468212-2937-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
Fix the missing include of <linux/irqchip/irq-omap-intc.h> which declares all the missing functions from the following warnings: drivers/irqchip/irq-omap-intc.c:84:6: warning: symbol 'omap_intc_save_context' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:105:6: warning: symbol 'omap_intc_restore_context' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:124:6: warning: symbol 'omap3_intc_prepare_idle' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:134:6: warning: symbol 'omap3_intc_resume_idle' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:173:5: warning: symbol 'omap_irq_pending' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:183:6: warning: symbol 'omap3_intc_suspend' was not declared. Should it be static? drivers/irqchip/irq-omap-intc.c:365:13: warning: symbol 'omap3_init_irq' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465407872-10299-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
Fix the missing declaration of gicv2m_init() by including the file <linux/irqchip/arm-gic.h> which defines it. Fixes the warning: drivers/irqchip/irq-gic-v2m.c:517:12: warning: symbol 'gicv2m_init' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465408414-13698-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
The probe functions in this driver is not exported or declared so make it static to fix the following warning: drivers/irqchip/irq-brcmstb-l2.c:115:12: warning: symbol 'brcmstb_l2_intc_of_init' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465408940-16414-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
The probe functions in this driver are not exported or declared for use elsewhere, so make them static to fix the warnings: drivers/irqchip/irq-bcm7120-l2.c:218:12: warning: symbol 'bcm7120_l2_intc_probe' was not declared. Should it be static? drivers/irqchip/irq-bcm7120-l2.c:342:12: warning: symbol 'bcm7120_l2_intc_probe_7120' was not declared. Should it be static? drivers/irqchip/irq-bcm7120-l2.c:349:12: warning: symbol 'bcm7120_l2_intc_probe_3380' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465408798-16201-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
The bcm2836_smp_boot_secondary() is not declared or used elsewhere so make it static to fix the following warning: drivers/irqchip/irq-bcm2836.c:227:12: warning: symbol 'bcm2836_smp_boot_secondary' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465407697-8116-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
The armada_370_xp_mpic_syscore_ops structure is not exported or declared anywhere. Fix the following warning by making it static: drivers/irqchip/irq-armada-370-xp.c:544:20: warning: symbol 'armada_370_xp_mpic_syscore_ops' was not declared. Should it be static? Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465408533-13906-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
Fix the following warnings from sparse due to casting to/from __iomem annotated variables: drivers/irqchip/irq-tegra.c:93:31: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-tegra.c:93:31: expected void [noderef] <asn:2>*base drivers/irqchip/irq-tegra.c:93:31: got void *chip_data drivers/irqchip/irq-tegra.c:93:31: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-tegra.c:93:31: expected void [noderef] <asn:2>*base drivers/irqchip/irq-tegra.c:93:31: got void *chip_data drivers/irqchip/irq-tegra.c:93:31: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-tegra.c:93:31: expected void [noderef] <asn:2>*base drivers/irqchip/irq-tegra.c:93:31: got void *chip_data drivers/irqchip/irq-tegra.c:93:31: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-tegra.c:93:31: expected void [noderef] <asn:2>*base drivers/irqchip/irq-tegra.c:93:31: got void *chip_data drivers/irqchip/irq-tegra.c:269:57: warning: incorrect type in argument 5 (different address spaces) drivers/irqchip/irq-tegra.c:269:57: expected void *chip_data drivers/irqchip/irq-tegra.c:269:57: got void [noderef] <asn:2>*<noident> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lkml.kernel.org/r/1465302292-4840-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Ben Dooks authored
Fix warnings from sparse about casting to __iomem from non anotated variable: drivers/irqchip/irq-sirfsoc.c:56:47: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-sirfsoc.c:56:47: expected void [noderef] <asn:2>*base drivers/irqchip/irq-sirfsoc.c:56:47: got void *host_data drivers/irqchip/irq-sirfsoc.c:97:47: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-sirfsoc.c:97:47: expected void [noderef] <asn:2>*base drivers/irqchip/irq-sirfsoc.c:97:47: got void *host_data drivers/irqchip/irq-sirfsoc.c:109:47: warning: incorrect type in initializer (different address spaces) drivers/irqchip/irq-sirfsoc.c:109:47: expected void [noderef] <asn:2>*base drivers/irqchip/irq-sirfsoc.c:109:47: got void *host_data Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Link: https://lkml.kernel.org/r/1465301910-2308-1-git-send-email-ben.dooks@codethink.co.ukSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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- 10 Jun, 2016 2 commits
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Weongyo Jeong authored
sprintf() and snprintf() implementation of kernel guarantees that its result is terminated with null byte if size is larger than 0. So we don't need to call memset() at all. Signed-off-by: Weongyo Jeong <weongyo.linux@gmail.com> Link: http://lkml.kernel.org/r/1459451703-5744-1-git-send-email-weongyo.linux@gmail.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Jianyu Zhan authored
for_each_irq_desc() macro has already skipped NULL irq_desc, don't bother to check it again. Signed-off-by: Jianyu Zhan <nasa4836@gmail.com> Cc: mingo@kernel.org Cc: yhlu.kernel@gmail.com Link: http://lkml.kernel.org/r/1458395959-7046-1-git-send-email-nasa4836@gmail.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 05 Jun, 2016 1 commit
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Linus Torvalds authored
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