1. 24 Jan, 2018 17 commits
    • Jakub Kicinski's avatar
      selftests/bpf: validate replace of TC filters is working · 6d2d58f1
      Jakub Kicinski authored
      Daniel discovered recently I broke TC filter replace (and fixed
      it in commit ad9294db ("bpf: fix cls_bpf on filter replace")).
      Add a test to make sure it never happens again.
      Signed-off-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6d2d58f1
    • Quentin Monnet's avatar
      selftests/bpf: check bpf verifier log buffer usage works for HW offload · 9045bdc8
      Quentin Monnet authored
      Make netdevsim print a message to the BPF verifier log buffer when a
      program is offloaded.
      
      Then use this message in hardware offload selftests to make sure that
      using this buffer actually prints the message to the console for
      eBPF hardware offload.
      
      The message is appended after the last instruction is processed with the
      verifying function from netdevsim. Output looks like the following:
      
          $ tc filter add dev foo ingress bpf obj sample_ret0.o \
              sec .text verbose skip_sw
      
          Prog section '.text' loaded (5)!
           - Type:         3
           - Instructions: 2 (0 over limit)
           - License:
      
          Verifier analysis:
      
          0: (b7) r0 = 0
          1: (95) exit
          [netdevsim] Hello from netdevsim!
          processed 2 insns, stack depth 0
      
      "verbose" flag is required to see it in the console since netdevsim does
      not throw an error after printing the message.
      Signed-off-by: default avatarQuentin Monnet <quentin.monnet@netronome.com>
      Reviewed-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      9045bdc8
    • Jakub Kicinski's avatar
      netdevsim: don't compile BPF code if syscall not enabled · 7c5db7e7
      Jakub Kicinski authored
      We should not compile netdevsim/bpf.c if BPF syscall is not
      enabled.  Otherwise bpf core would have to provide wrappers
      for all functions offload drivers may call, even though
      system will never see a BPF object.
      Signed-off-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
      Reviewed-by: default avatarQuentin Monnet <quentin.monnet@netronome.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7c5db7e7
    • Quentin Monnet's avatar
      selftests/bpf: add checks on extack messages for eBPF hw offload tests · caf95228
      Quentin Monnet authored
      Add checks to test that netlink extack messages are correctly displayed
      in some expected error cases for eBPF offload to netdevsim with TC and
      XDP.
      
      iproute2 may be built without libmnl support, in which case the extack
      messages will not be reported.  Try to detect this condition, and when
      enountered print a mild warning to the user and skip the extack validation.
      Signed-off-by: default avatarQuentin Monnet <quentin.monnet@netronome.com>
      Reviewed-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
      Signed-off-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      caf95228
    • Quentin Monnet's avatar
      netdevsim: add extack support for TC eBPF offload · 728461f2
      Quentin Monnet authored
      Use the recently added extack support for TC eBPF filters in netdevsim.
      Signed-off-by: default avatarQuentin Monnet <quentin.monnet@netronome.com>
      Reviewed-by: default avatarJakub Kicinski <jakub.kicinski@netronome.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      728461f2
    • David S. Miller's avatar
      Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue · 52150464
      David S. Miller authored
      Jeff Kirsher says:
      
      ====================
      40GbE Intel Wired LAN Driver Updates 2018-01-23
      
      This series contains updates to i40e and i40evf only.
      
      Pawel enables FlatNVM support on x722 devices by allowing nvmupdate tool
      to configure the preservation flags in the AdminQ command.
      
      Mitch fixes a potential divide by zero error when DCB is enabled and
      the firmware fails to configure the VSI, so check for this state.
      Fixed a bug where the driver could fail to adhere to ETS bandwidth
      allocations if 8 traffic classes were configured on the switch.
      
      Sudheer fixes a potential deadlock by avoiding to call
      flush_schedule_work() in i40evf_remove(), since cancel_work_sync()
      and cancel_delayed_work_sync() already cleans up necessary work items.
      Fixed an issue with the problematic detection and recovery from
      hung queues in the PF which was causing lost interrupts.  This is done
      by triggering a software interrupt so that interrupts are forced on
      and if we are already in napi_poll and an interrupt fires, napi_poll
      will not be rescheduled and the interrupt is lost.
      
      Avinash fixes an issue in the VF where is was possible to issue a
      reset_task while the device is currently being removed.
      
      Michal fixes an issue occurring while calling i40e_led_set() with
      the blink parameter set to true, which was causing the activity LED
      instead of the link LED to blink for port identification.
      
      Shiraz changes the client interface to not call client close/open on
      netdev down/up events, since this causes a lot of thrash that is
      not needed.  Instead, disable the PE TCP-ENA flag during a netdev
      down event and re-enable on a netdev up event, since this blocks all
      TCP traffic to the RDMA protocol engine.
      
      Alan fixes an issue which was causing a potential transmit hang by
      ignoring the PF link up message if the VF state is not yet in the
      RUNNING state.
      
      Amritha fixes the channel VSI recreation during the reset flow to
      reconfigure the transmit rings and the queue context associated with
      the channel VSI.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      52150464
    • David S. Miller's avatar
      Merge branch 'act_csum-spinlock-remove' · 6b44d0f9
      David S. Miller authored
      Davide Caratti says:
      
      ====================
      net/sched: remove spinlock from 'csum' action
      
      Similarly to what has been done earlier with other actions [1][2], this
      series tries to improve the performance of 'csum' tc action, removing a
      spinlock in the data path. Patch 1 lets act_csum use per-CPU counters;
      patch 2 removes spin_{,un}lock_bh() calls from the act() method.
      
      test procedure (using pktgen from https://github.com/netoptimizer):
      
       # ip link add name eth1 type dummy
       # ip link set dev eth1 up
       # tc qdisc add dev eth1 root handle 1: prio
       # for a in pass drop; do
       > tc filter del dev eth1 parent 1: pref 10 matchall action csum udp
       > tc filter add dev eth1 parent 1: pref 10 matchall action csum udp $a
       > for n in 2 4; do
       > ./pktgen_bench_xmit_mode_queue_xmit.sh -v -s 64 -t $n -n 1000000 -i eth1
       > done
       > done
      
      test results:
      
            |    |  before patch   |   after patch
        $a  | $n | avg. pps/thread | avg. pps/thread
       -----+----+-----------------+----------------
       pass |  2 |    1671463 ± 4% |    1920789 ± 3%
       pass |  4 |     648797 ± 1% |     738190 ± 1%
       drop |  2 |    3212692 ± 2% |    3719811 ± 2%
       drop |  4 |    1078824 ± 1% |    1328099 ± 1%
      
      references:
      
      [1] https://www.spinics.net/lists/netdev/msg334760.html
      [2] https://www.spinics.net/lists/netdev/msg465862.html
      
      v3 changes:
       - use rtnl_dereference() in place of rcu_dereference() in tcf_csum_dump()
      
      v2 changes:
       - add 'drop' test, it produces more contentions
       - use RCU-protected struct to store 'action' and 'update_flags', to avoid
         reading the values from subsequent configurations
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6b44d0f9
    • Davide Caratti's avatar
      net/sched: act_csum: don't use spinlock in the fast path · 9c5f69bb
      Davide Caratti authored
      use RCU instead of spin_{,unlock}_bh() to protect concurrent read/write on
      act_csum configuration, to reduce the effects of contention in the data
      path when multiple readers are present.
      Signed-off-by: default avatarDavide Caratti <dcaratti@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      9c5f69bb
    • Davide Caratti's avatar
      net/sched: act_csum: use per-core statistics · f6052cf2
      Davide Caratti authored
      use per-CPU counters, like other TC actions do, instead of maintaining one
      set of stats across all cores. This allows updating act_csum stats without
      the need of protecting them using spin_{,un}lock_bh() invocations.
      Signed-off-by: default avatarDavide Caratti <dcaratti@redhat.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f6052cf2
    • Roopa Prabhu's avatar
      net: link_watch: mark bonding link events urgent · b76f4189
      Roopa Prabhu authored
      It takes 1sec for bond link down notification to hit user-space
      when all slaves of the bond go down. 1sec is too long for
      protocol daemons in user-space relying on bond notification
      to recover (eg: multichassis lag implementations in user-space).
      Since the link event code already marks team device port link events
       as urgent, this patch moves the code to cover all lag ports and master.
      Signed-off-by: default avatarRoopa Prabhu <roopa@cumulusnetworks.com>
      Acked-by: default avatarJiri Pirko <jiri@mellanox.com>
      Reviewed-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b76f4189
    • David S. Miller's avatar
      Merge branch '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue · 0542e13b
      David S. Miller authored
      Jeff Kirsher says:
      
      ====================
      10GbE Intel Wired LAN Driver Updates 2018-01-23
      
      This series contains updates to ixgbe only.
      
      Shannon Nelson provides an implementation of the ipsec hardware offload
      feature for the ixgbe driver for these devices: x540, x550, 82599.
      
      The ixgbe NICs support ipsec offload for 1024 Rx and 1024 Tx Security
      Associations (SAs), using up to 128 inbound IP addresses, and using the
      rfc4106(gcm(aes)) encryption.  This code does not yet support checksum
      offload, or TSO in conjunction with the ipsec offload - those will be
      added in the future.
      
      This code shows improvements in both packet throughput and CPU utilization.
      For example, here are some quicky numbers that show the magnitude of the
      performance gain on a single run of "iperf -c <dest>" with the ipsec
      offload on both ends of a point-to-point connection:
      
      	9.4 Gbps - normal case
      	7.6 Gbps - ipsec with offload
      	343 Mbps - ipsec no offload
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0542e13b
    • David S. Miller's avatar
      Merge branch 'GEHC-Bx50-Switch-Support' · c89b517d
      David S. Miller authored
      Sebastian Reichel says:
      
      ====================
      GEHC Bx50 Switch Support
      
      This adds support for the internal switch found in GE Healthcare
      B450v3, B650v3 and B850v3. All devices use a GPIO bitbanged MDIO
      bus to communicate with the switch and a PCIe based network card
      for exchanging network data. The cpu network data link requires,
      that the switch's internal phy interface is enabled, so support
      for that is added by the first patch in this series.
      
      The patch series is based on v4.15-rc8.
      
      Changes since PATCHv4:
       * Introduce dsa_port_link_(un)register_of and mark the fixed
         variant static.
       * Update patch description to describe the phy<->phy connection
         from i210 to the Marvell switch
      Changes since PATCHv3:
       * Enable the phy in dsa_port_setup() instead of abusing the
         fixed link setup function
      Changes since PATCHv2:
       * Add phy nodes to switch in bx50.dtsi and reference them
         from switch ports
       * Enable cpu-port's phy based on 'phy-handle' instead of 'phy-mode'
      Changes since PATCHv1:
       * Use 'marvell,mv88e6085' instead of introducing compatible
         string for mv88e6240.
       * Fix indention of DT nodes
       * Only enable 'cpu' phy, if explicitly set to "internal".
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c89b517d
    • Sebastian Reichel's avatar
      ARM: dts: imx6q-b450v3: Add switch port configuration · 658d063d
      Sebastian Reichel authored
      This adds support for the Marvell switch and names the network
      ports according to the labels, that can be found next to the
      connectors. The switch is connected to the host system using a
      PCI based network card.
      
      The PCI bus configuration has been written using the following
      information:
      
      root@b450v3# lspci -tv
      -[0000:00]---00.0-[01]----00.0  Intel Corporation I210 Gigabit Network Connection
      root@b450v3# lspci -nn
      00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01)
      01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)
      Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.co.uk>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      658d063d
    • Sebastian Reichel's avatar
      ARM: dts: imx6q-b650v3: Add switch port configuration · b2ea7f83
      Sebastian Reichel authored
      This adds support for the Marvell switch and names the network
      ports according to the labels, that can be found next to the
      connectors. The switch is connected to the host system using a
      PCI based network card.
      
      The PCI bus configuration has been written using the following
      information:
      
      root@b650v3# lspci -tv
      -[0000:00]---00.0-[01]----00.0  Intel Corporation I210 Gigabit Network Connection
      root@b650v3# lspci -nn
      00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01)
      01:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)
      Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.co.uk>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      b2ea7f83
    • Sebastian Reichel's avatar
      ARM: dts: imx6q-b850v3: Add switch port configuration · e6b22e41
      Sebastian Reichel authored
      This adds support for the Marvell switch and names the network
      ports according to the labels, that can be found next to the
      connectors ("ID", "IX", "ePort 1", "ePort 2"). The switch is
      connected to the host system using a PCI based network card.
      
      The PCI bus configuration has been written using the following
      information:
      
      root@b850v3# lspci -tv
      -[0000:00]---00.0-[01]----00.0-[02-05]--+-01.0-[03]----00.0  Intel Corporation I210 Gigabit Network Connection
                                              +-02.0-[04]----00.0  Intel Corporation I210 Gigabit Network Connection
                                              \-03.0-[05]--
      root@b850v3# lspci -nn
      00:00.0 PCI bridge [0604]: Synopsys, Inc. Device [16c3:abcd] (rev 01)
      01:00.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab)
      02:01.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab)
      02:02.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab)
      02:03.0 PCI bridge [0604]: PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch [10b5:8605] (rev ab)
      03:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)
      04:00.0 Ethernet controller [0200]: Intel Corporation I210 Gigabit Network Connection [8086:1533] (rev 03)
      Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.co.uk>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e6b22e41
    • Sebastian Reichel's avatar
      ARM: dts: imx6q-bx50v3: Add internal switch · e26dead4
      Sebastian Reichel authored
      B850v3, B650v3 and B450v3 all have a GPIO bit banged MDIO bus to
      communicate with a Marvell switch. On all devices the switch is
      connected to a PCI based network card, which needs to be referenced
      by DT, so this also adds the common PCI root node.
      Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.co.uk>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      e26dead4
    • Sebastian Reichel's avatar
      net: dsa: Support internal phy on 'cpu' port · 33615367
      Sebastian Reichel authored
      This adds support for enabling the internal PHY for a 'cpu' port.
      It has been tested on GE B850v3,  B650v3 and B450v3, which have a
      built-in MV88E6240 switch hardwired to a PCIe based network card.
      On these machines the internal PHY of the i210 network card and
      the Marvell switch are connected to each other and must be enabled
      for properly using the switch. While the i210 PHY will be enabled
      when the network interface is enabled, the switch's port is not
      exposed as network interface. Additionally the mv88e6xxx driver
      resets the chip during probe, so the PHY is disabled without this
      patch.
      Signed-off-by: default avatarSebastian Reichel <sebastian.reichel@collabora.co.uk>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      33615367
  2. 23 Jan, 2018 23 commits