1. 15 May, 2020 1 commit
    • Serge Semin's avatar
      spi: dw: Fix native CS being unset · 9aea644c
      Serge Semin authored
      Commit 6e0a32d6 ("spi: dw: Fix default polarity of native
      chipselect") attempted to fix the problem when GPIO active-high
      chip-select is utilized to communicate with some SPI slave. It fixed
      the problem, but broke the normal native CS support. At the same time
      the reversion commit ada9e3fc ("spi: dw: Correct handling of native
      chipselect") didn't solve the problem either, since it just inverted
      the set_cs() polarity perception without taking into account that
      CS-high might be applicable. Here is what is done to finally fix the
      problem.
      
      DW SPI controller demands any native CS being set in order to proceed
      with data transfer. So in order to activate the SPI communications we
      must set any bit in the Slave Select DW SPI controller register no
      matter whether the platform requests the GPIO- or native CS. Preferably
      it should be the bit corresponding to the SPI slave CS number. But
      currently the dw_spi_set_cs() method activates the chip-select
      only if the second argument is false. Since the second argument of the
      set_cs callback is expected to be a boolean with "is-high" semantics
      (actual chip-select pin state value), the bit in the DW SPI Slave
      Select register will be set only if SPI core requests the driver
      to set the CS in the low state. So this will work for active-low
      GPIO-based CS case, and won't work for active-high CS setting
      the bit when SPI core actually needs to deactivate the CS.
      
      This commit fixes the problem for all described cases. So no matter
      whether an SPI slave needs GPIO- or native-based CS with active-high
      or low signal the corresponding bit will be set in SER.
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Fixes: ada9e3fc ("spi: dw: Correct handling of native chipselect")
      Fixes: 6e0a32d6 ("spi: dw: Fix default polarity of native chipselect")
      Reviewed-by: default avatarCharles Keepax <ckeepax@opensource.cirrus.com>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      
      Link: https://lore.kernel.org/r/20200515104758.6934-5-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      9aea644c
  2. 12 May, 2020 2 commits
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