- 21 May, 2020 13 commits
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Arnd Bergmann authored
Merge tag 'stm32-dt-for-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.8, round 1 Highlights: ---------- MCU part: -fix a typo for DAC io-channel-cells on f429 and h743 MPU part: -Generic: -Bump tp PSCI 1.0 -Fix a typo for DAC io-channel-cells -Add M4 pdds for deep sleep mode -Add I2C fatmode plus support -Add new Octavio lxa-mc1 board based on OSDMP15x SiP -Add new Stinger96 board support. It is a 96Boards IoT Extended board based on stm32mp157a SoC. Some figures: 256MB DDR, 125MB and flash, Onboard BG96 modem... -Add IoT Box board support based on stinger96 board + Wifi/BT, CCS811 VOC sensor, 2 digitals microphones ... -DH: -Adapt dhcom-som and dhcom-pdk2 dts(i) files to STM32MP15 SoC diversity -Add GPIO led and GPIO keys support on PDK2 board -AV96: -Major rework to support official avenger96 board based on DHCOR SOM. -Prototype board is no more supported * tag 'stm32-dt-for-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (58 commits) ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board ARM: dts: stm32: Split SoC-independent parts of DHCOM SOM and PDK2 ARM: dts: stm32: Add GPIO LEDs for STM32MP1 DHCOM PDK2 ARM: dts: stm32: Add GPIO keys for STM32MP1 DHCOM PDK2 ARM: dts: stm32: Add IoT Box board support dt-bindings: arm: stm32: Document IoT Box compatible ARM: dts: stm32: Add Stinger96 board support dt-bindings: arm: stm32: Document Stinger96 compatible ARM: dts: stm32: Add missing pinctrl entries for STM32MP15 dt-bindings: Add vendor prefix for Shiratech Solutions ARM: dts: stm32: Add bindings for SPI2 on AV96 ARM: dts: stm32: Add alternate pinmux for SPI2 pins ARM: dts: stm32: Add bindings for ADC on AV96 ARM: dts: stm32: Add alternate pinmux for ADC pins ARM: dts: stm32: Add bindings for FDCAN2 on AV96 ARM: dts: stm32: Add alternate pinmux for FDCAN2 pins ARM: dts: stm32: Add bindings for FDCAN1 on AV96 ARM: dts: stm32: Add alternate pinmux for FDCAN1 pins ARM: dts: stm32: Repair I2C2 operation on AV96 ARM: dts: stm32: Add alternate pinmux for I2C2 pins ... Link: https://lore.kernel.org/r/19160355-364d-170c-7ae2-5ba7f714103f@st.comSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linuxArnd Bergmann authored
Samsung DTS ARM changes for v5.8 1. Add DTS for Exynos4210-based Samsung Galaxy S2 (GT-I9100) mobile phone, 2. Enable WiFi and Bluetooth in multiple boards, 3. Add new features to S5Pv210-based Aries family of mobile phones (e.g. Samsung Galaxy S): necessary configuration for suspend, audio support, USB mux, touch keys, panel, i2c-gpio adapters, FM radio, ADC, 4. Many minor fixes (e.g. GPIO polarity, interrupts). * tag 'samsung-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (29 commits) ARM: dts: s5pv210: Set MAX8998 GPIO pulls on Aries boards ARM: dts: s5pv210: Correct FIMC definitions ARM: dts: s5pv210: Assign clocks to MMC devices on Aries boards ARM: dts: s5pv210: Enable ADC on Aries boards ARM: dts: s5pv210: Add an ADC node ARM: dts: s5pv210: Disable pull for vibrator enable GPIO on Aries boards ARM: dts: s5pv210: Add si470x FM radio to Galaxy S ARM: dts: s5pv210: Add remaining i2c-gpio adapters to Aries boards ARM: dts: s5pv210: Add panel support to Aries boards ARM: dts: s5pv210: Add touchkey support to Aries boards ARM: dts: s5pv210: Add FSA9480 support to Aries boards ARM: dts: s5pv210: Add WM8994 support to Aries boards ARM: dts: s5pv210: Disable pulls on GPIO I2C adapters for Aries ARM: dts: s5pv210: Set keep-power-in-suspend for SDHCI1 on Aries ARM: dts: s5pv210: Correct gpi pinctrl node name ARM: dts: s5pv210: Add sleep GPIO configuration for Galaxy S ARM: dts: s5pv210: Add sleep GPIO configuration for Fascinate4G ARM: dts: s5pv210: Add helper define for sleep gpio config ARM: dts: exynos: Enable WLAN support for the UniversalC210 board ARM: dts: exynos: Enable WLAN support for the Rinato board ... Link: https://lore.kernel.org/r/20200512122922.5700-2-krzk@kernel.orgSigned-off-by:
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https://github.com/Broadcom/stblinuxArnd Bergmann authored
This pull request contains Broadcom ARM-based SoCs Device Tree changes for v5.8, please pull the following: - Nicolas updates the Raspberry Pi 4 board DTS to include the GPIO controlling power to the SD card, adds support for the vmmc regulator for the emmc2 controller and finally updates the power management provider for V3D to use the firmware to solve instabilities. * tag 'arm-soc/for-5.8/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: bcm283x: Use firmware PM driver for V3D ARM: dts: bcm2711: Add vmmc regulator in emmc2 ARM: dts: bcm2711: Update expgpio's GPIO labels Link: https://lore.kernel.org/r/20200511210522.28243-2-f.fainelli@gmail.comSigned-off-by:
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
ARM64: DT: Hisilicon SoCs DT updates for 5.8 - Add pinconf for spi2 and spi3 nodes and increase the drive strength to achieve the max speed for the Hikey960 board - Add CTI nodes for the Hikey620 board * tag 'hisi-arm64-dt-for-5.8' of git://github.com/hisilicon/linux-hisi: arm64: dts: hi6220: Add CTI options arm64: dts: hikey960: pinctrl: Fix spi2/spi3 pinconf Link: https://lore.kernel.org/r/5EBE430E.6090508@hisilicon.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'realtek-dt-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/dt Realtek Arm based SoC DT for v5.8 Add RTD1195, RTD1395 and RTD1619 SoCs as well as Xnano X5 TV box. Clean up memory nodes and /soc ranges. Factor out r-bus and partition it into CRT, Iso, Misc, SB2 and SCPU Wrapper blocks. * tag 'realtek-dt-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: (35 commits) dt-bindings: reset: rtd1295: Add SB2 reset arm64: dts: realtek: rtd16xx: Add SB2 and SCPU Wrapper syscon nodes arm64: dts: realtek: rtd139x: Add SB2 and SCPU Wrapper syscon nodes arm64: dts: realtek: rtd129x: Add SB2 and SCPU Wrapper syscon nodes ARM: dts: rtd1195: Add SB2 and SCPU Wrapper syscon nodes arm64: dts: realtek: rtd16xx: Add CRT syscon node ARM: dts: rtd1195: Add UART resets ARM: dts: rtd1195: Add reset nodes dt-bindings: reset: Add Realtek RTD1195 ARM: dts: rtd1195: Add CRT syscon node arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon arm64: dts: realtek: rtd139x: Introduce CRT, iso and misc syscon arm64: dts: realtek: rtd129x: Introduce CRT, iso and misc syscon ARM: dts: rtd1195: Introduce iso and misc syscon arm64: dts: realtek: rtd1295: Add Xnano X5 dt-bindings: arm: realtek: Add Xnano X5 dt-bindings: vendor-prefixes: Add Xnano arm64: dts: realtek: rtd16xx: Add memory reservations arm64: dts: realtek: rtd16xx: Carve out boot ROM from memory arm64: dts: realtek: Add RTD1619 SoC and Realtek Mjolnir EVB ... Link: https://lore.kernel.org/r/20200510232158.18477-2-afaerber@suse.deSigned-off-by:
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Arnd Bergmann authored
Merge tag 'aspeed-5.8-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.8 New machines: - YADRO's ast2500 OpenPower P9 Nicole BMC - Facebook's ast2500 x86 Yosemite V2 BMC The AST2600 machines Rainier and Tacoma were fleshed out. Machines have started describing the GPIO names as userspace attempts to use the GPIO chardev API. * tag 'aspeed-5.8-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (32 commits) ARM: dts: aspeed: Change KCS nodes to v2 binding ARM: dts: Aspeed: AST2600: Add XDMA PCI-E root control reset ARM: dts: aspeed: ast2600: Add XDMA Engine ARM: dts: aspeed: ast2500: Add XDMA Engine ARM: dts: aspeed: Adding Facebook Yosemite V2 BMC ARM: dts: aspeed: Add YADRO Nicole BMC ARM: dts: aspeed: mihawk: add aliases for i2c ARM: dts: aspeed: tacoma: Add TPM ARM: dts: aspeed: tacoma: Enable the second VUART ARM: dts: aspeed: tacoma: Add iio-hwmon nodes for IIO devices ARM: dts: aspeed: rainier: Add VGA reserved memory region ARM: dts: aspeed: rainier: Add gpio line names ARM: dts: aspeed: tacoma: Add gpio line names ARM: dts: aspeed: zaius: Add gpio line names ARM: dts: aspeed: romulus: Add gpio line names ARM: dts: aspeed: witherspoon: Add gpio line names ARM: dts: aspeed: ast2600: Set arch timer always-on ARM: dts: aspeed: tacoma: Add GPIOs for FSI ARM: dts: aspeed: mihawk: Change the name of leds ARM: dts: aspeed: rainier: Remove regulators ... Link: https://lore.kernel.org/r/CACPK8Xd-=XFREvvS-mK_ECyn14y0GPAMyy5BpEEUYfaw4jAgsw@mail.gmail.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'omap-for-v5.8/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt DTS changes for omaps for v5.8 merge window We add support for beaglebone-ai board that's am5729 based devices. Then we have a series changes to configure more hardware acceletators found on omap variants. With the recent ti-sysc related changes, we can now better configure the accelerators with help of the clock framework and reset driver. So with a series of changes from Suman Anna and Tero Kristo, let's configure IPUs and DSPs for dra7 devices like beagle-x15. And let's also configure the missing crypto accelerators for omap5 as those have been missing. Note that there are still some pending driver related patches to use IPU and DSP related features with mainline kernel, but those are independent of the devicetree changes. Then there is a display related change for am57xx-idk for tc358778 bridge, and a change to configure the missing clock source for some PWM timers. * tag 'omap-for-v5.8/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (26 commits) ARM: OMAP5: Make L4SEC clock domain SWSUP only ARM: OMAP4: Make L4SEC clock domain SWSUP only ARM: dts: omap5: add DES crypto accelerator node ARM: dts: omap5: add SHA crypto accelerator node ARM: dts: omap5: add aes2 entry ARM: dts: omap5: add aes1 entry ARM: dts: dra7-ipu-dsp-common: Add watchdog timers to IPU and DSP nodes ARM: dts: am571x-idk: Add CMA pools and enable IPUs & DSP1 rprocs ARM: dts: am572x-idk-common: Add CMA pools and enable IPU & DSP rprocs ARM: dts: beagle-x15-common: Add CMA pools and enable IPU & DSP rprocs ARM: dts: dra76-evm: Add CMA pools and enable IPU & DSP rprocs ARM: dts: dra71-evm: Add CMA pools and enable IPUs & DSP1 rprocs ARM: dts: dra72-evm-revc: Add CMA pools and enable IPUs & DSP1 rprocs ARM: dts: dra72-evm: Add CMA pools and enable IPUs & DSP1 rprocs ARM: dts: dra7-evm: Add CMA pools and enable IPU & DSP rprocs ARM: dts: dra7-ipu-dsp-common: Add timers to IPU and DSP nodes ARM: dts: dra7-ipu-dsp-common: Add mailboxes to IPU and DSP nodes ARM: dts: dra7-ipu-dsp-common: Move mailboxes into common files ARM: dts: DRA72x: Add aliases for rproc nodes ARM: dts: DRA74x: Add aliases for rproc nodes ... Link: https://lore.kernel.org/r/pull-1588873628-477615@atomide.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'renesas-dt-bindings-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.8 - Document System Controller (SYSC) and Reset (RST) support for RZ/G1H. * tag 'renesas-dt-bindings-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: reset: rcar-rst: Document r8a7742 reset module dt-bindings: power: rcar-sysc: Document r8a7742 SYSC binding Link: https://lore.kernel.org/r/20200430084849.1457-6-geert+renesas@glider.beSigned-off-by:
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Arnd Bergmann authored
Merge tag 'renesas-arm-dt-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.8 - USB, UART, PWM, and PCIe support for R-Car M3-W+, - PWM (16-bit Timer Pulse Unit and PWM Timers) support for R-Car M2-W, - Minor fixes and cleanups. * tag 'renesas-arm-dt-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Fix IOMMU device node names ARM: dts: renesas: Fix IOMMU device node names ARM: dts: shmobile: Update CMT1 compatible values ARM: dts: r8a7791: Add PWM device nodes ARM: dts: r8a7791: Add TPU device node arm64: dts: renesas: r8a77961: Add PCIe device nodes arm64: dts: renesas: r8a77961: Add PWM device nodes arm64: dts: renesas: r8a77961: Add SCIF and HSCIF nodes arm64: dts: renesas: r8a77961: Add USB3.0 device nodes arm64: dts: renesas: r8a77961: Add USB2.0 device nodes Link: https://lore.kernel.org/r/20200430084849.1457-3-geert+renesas@glider.beSigned-off-by:
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Arnd Bergmann authored
Merge tag 'versatile-dts-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt Versatile DTS updates for the v5.8 kernel: Create a new device tree for the Integrator/AP with the IM-PD1 expansion module fitted in the first slot. If we want to augment the slot where it is sitting, we can alter the device tree or make the bootloader do so. * tag 'versatile-dts-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: dts: Add devicetree for Integrator/AP with IM-PD1 Link: https://lore.kernel.org/r/CACRpkdZ-28o+pPdP7i_fc+7g4ndPWf+SWTsjnhFEegTggiXVSg@mail.gmail.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'sti-dt-for-v5.8-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into arm/dt STi DT fixes: - Remove duplicated rng node in stih407-family.dtsi - Fix complain about IRQ_TYPE_NONE usage in stih418.dtsi * tag 'sti-dt-for-v5.8-round1' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: dts: arm: stih407-family: remove duplicated rng nodes dts: arm: stih418: Fix complain about IRQ_TYPE_NONE usage Link: https://lore.kernel.org/r/4b0c02e7-a247-50c0-d729-88d16b9dd7fd@st.comSigned-off-by:
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Chunyan Zhang authored
Add emmc and sd card devicetree nodes for SC9863A. Link: https://lore.kernel.org/r/20200414101636.24503-3-zhang.lyra@gmail.comSigned-off-by:
Chunyan Zhang <chunyan.zhang@unisoc.com> Signed-off-by:
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Chunyan Zhang authored
add clock devicetree nodes for SC9863A. Link: https://lore.kernel.org/r/20200414101636.24503-2-zhang.lyra@gmail.comSigned-off-by:
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- 14 May, 2020 10 commits
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Marek Vasut authored
The Avenger96 is in fact an assembly of DH Electronics DHCOR SoM on top of an Avenger96 reference board. The DHCOR SoM can be populated with any STM32MP15xx. Split the DTs to reflect this such that the common SoM and Avenger96 parts are now in stm32mp15xx-dhcor-*dtsi and a specific example implementation of STM32MP157A SoM and Avenger96 board is separated into stm32mp157a-dhcor-*dts* . The stm32mp157a-avenger96.dts is retained for the sake of backward naming compatibility. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Marek Vasut authored
The DH Electronics PDK2 can be populated with SoM with any STM32MP15xx variant. Split the SoC-independent parts of the SoM and PDK2 into the stm32mp15xx-dhcom-*.dtsi and reduce stm32mp157c-dhcom-*dts* to example of adding STM32MP157C variant of the SoM into a PDK2 carrier board. Signed-off-by:
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Marek Vasut authored
Add bindings for the four GPIO LEDs on DH PDK2 board. Note that LED5 GPIO-E may conflict with touchscreen interrupt, hence LED5 must be disabled when using the DH 560-200 display unit with touchscreen. Signed-off-by:
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Marek Vasut authored
Add bindings for the four GPIO keys on DH PDK2 board. Note that TA1 key is polled because it's IRQ line conflicts with ethernet IRQ, the rest of the GPIO keys, TA2, TA3, TA4, are interrupt-driven and wake up sources. Signed-off-by:
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Manivannan Sadhasivam authored
IoT Box is an IoT gateway device based on Stinger96 board powered by STM32MP1 SoC, designed and manufactured by Shiratech Solutions. This device makes use of Stinger96 board by having it as a base board with one additional mezzanine on top. Following are the features exposed by this device in addition to the Stinger96 board: * WiFi/BT * CCS811 VOC sensor * 2x Digital microphones IM69D130 * 12x WS2812B LEDs Following peripherals are tested and known to work: * WiFi/BT * CCS811 More information about this device can be found in Shiratech website: https://www.shiratech-solutions.com/products/iot-box/Signed-off-by:
Manivannan Sadhasivam <mani@kernel.org> Signed-off-by:
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Manivannan Sadhasivam authored
Document devicetree compatible of Shiratech IoT Box. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Manivannan Sadhasivam authored
Stinger96 is a 96Boards IoT Extended edition board designed and manufactured by Shiratech solutions based on STM32MP1 SoC. Following are the features of this board: * 256MB DDR * 125MB NAND Flash * Onboard BG96 modem * 1x uSD * 2x USB (1 available as external connector and another connected to BG96) * 1x SPI * 1x PCM * 2x UART (apart from serial console) * 2x I2C (apart from one connected to PMIC) Following peripherals are tested and known to work: * BG96 modem * 1x I2C (LS-I2C0) * 1x SPI * 1x UART (LS-UART0) * USB (Only Gadget mode) * uSD More information about this board can be found in Shiratech website: https://www.shiratech-solutions.com/products/stinger96/Signed-off-by:
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Manivannan Sadhasivam authored
Document devicetree compatible of Shiratech Stinger96 board. Signed-off-by:
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Manivannan Sadhasivam authored
These pinctrl definitions will be used by Stinger96/IoTBox boards from Shiratech. Signed-off-by:
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Manivannan Sadhasivam authored
This commit adds devicetree vendor prefix for Shiratech solutions, a SOM/embedded board manufacturing company. https://www.shiratech-solutions.com/Signed-off-by:
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- 07 May, 2020 13 commits
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Marek Vasut authored
Add SPI2 bindings to AV96 DT, the SPI2 IOs are present on low-speed expansion connector X6. This is disabled by default and can be enabled if something is connected there. Signed-off-by:
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Marek Vasut authored
Add another mux option for SPI2 pins, this is used on AV96 board. Signed-off-by:
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Marek Vasut authored
Add ADC bindings to AV96 DT, the ADC inputs are present on low-speed expansion connector X6. Signed-off-by:
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Marek Vasut authored
Add another mux option for ADC pins, this is used on AV96 board. Signed-off-by:
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Marek Vasut authored
Add FDCAN2 bindings to AV96 DT, the FDCAN2 is present on low-speed expansion connector X6. This is disabled by default to match the 96boards specification though. Signed-off-by:
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Marek Vasut authored
Add another mux option for FDCAN2 pins, this is used on AV96 board. Signed-off-by:
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Marek Vasut authored
Add FDCAN1 bindings to AV96 DT, the FDCAN1 is present on low-speed expansion connector X6. This is disabled by default to match the 96boards specification though. Signed-off-by:
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Marek Vasut authored
Add another mux option for FDCAN1 pins, this is used on AV96 board. Signed-off-by:
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Marek Vasut authored
The I2C2 uses different pinmux on AV96, use correct pinmux and also add comments about the I2C being present on the "low-speed" expansion connector X6. Signed-off-by:
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Marek Vasut authored
Add another mux option for I2C2 pins, this is used on AV96 board. Signed-off-by:
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Etienne Carriere authored
Declare PSCI v1.0 support instead of v0.1 as the former is supported by the PSCI firmware stacks stm32mp15x relies on. Signed-off-by:
Etienne Carriere <etienne.carriere@st.com> Signed-off-by:
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Mike Leach authored
Adds in CTI device tree information for the Hikey620 board. Signed-off-by:
Mike Leach <mike.leach@linaro.org> Reviewed-by:
Mathieu Poirier <mathieu.poirier@linaro.org> Tested-by:
Leo Yan <leo.yan@linaro.org> Signed-off-by:
Wei Xu <xuwei5@hisilicon.com>
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Loic Poulain authored
Only the pinmux was selected, not the pinconf, leading to spi issues. Increase drive strength so that max speed (25Mhz) can be achieved. Signed-off-by:
Loic Poulain <loic.poulain@linaro.org> Signed-off-by:
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- 05 May, 2020 4 commits
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Tero Kristo authored
Commit c2ce5fb3 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only') made DRA7 SoC L4SEC clock domain SWSUP only because of power state transition issues detected with HWSUP mode. Based on experimentation similar issue exists on OMAP5, so do the same change for OMAP5 also. Signed-off-by:
Tero Kristo <t-kristo@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Tero Kristo authored
Commit c2ce5fb3 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only') made DRA7 SoC L4SEC clock domain SWSUP only because of power state transition issues detected with HWSUP mode. Based on experimentation similar issue exists on OMAP4, so do the same change for OMAP4 also. Signed-off-by:
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Tero Kristo authored
OMAP5 contains a single DES crypto accelerator instance. Add node for this in DT to enable it. We keep the node disabled for now, as it appears OMAP5 platform is running out of available DMA channels, and DES is the least interesting crypto accelerator available on the device. Signed-off-by:
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Tero Kristo authored
Add the single available SHA crypto accelerator device for OMAP5 SoC. Signed-off-by:
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