Commit 7238aa44 authored by Thomas Gambier's avatar Thomas Gambier

Add the miniPCIe adaptator PCB

parent 41476aac
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This diff is collapsed.
This diff is collapsed.
Record=TopLevelDocument|FileName=MiniPCIe.SchDoc
Protel Design System Design Rule Check
PCB File : V:\Work\Projets\BjtPartners\2018\MiniPCIexpress\hard\MiniPCIe.PcbDoc
Date : 10/01/2019
Time : 18:50:27
Processing Rule : Clearance Constraint (Gap=0.5mm) (InNamedPolygon('L5_NotNet') OR InNamedPolygon('L6_NotNet') OR InNamedPolygon('L4_NotNet') OR InNamedPolygon('L7_NotNet')OR InNamedPolygon('L3_NotNet')),(All)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.2mm) (InNamedPolygon('L4-+12V-2')OR InNamedPolygon('L4-+12V')OR InNamedPolygon('BOTTOM+12V')OR InNamedPolygon('BOTTOM+12V-1')),(All)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.1mm) (InNetClass('DiffPairNetClass')),(All)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.12mm) (All),(IsVia)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.6mm) (InNetClass('50OhmsL1toL2')),(InPolygon)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.21mm) (InNetClass('50OhmsL8toL5')),(InPolygon)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.5mm) (InNetClass('50OhmsL8tol4')),(InPolygon)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.12mm) (InNetClass('DiffPairNetClass100Ohms_1_2')),(InPolygon)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.22mm) (InPolyGon),(All)
Rule Violations :0
Processing Rule : Clearance Constraint (Gap=0.1mm) (All),(All)
Rule Violations :0
Processing Rule : Width Constraint (Min=0.1mm) (Max=10mm) (Preferred=0.254mm) (All)
Rule Violations :0
Processing Rule : Matched Net Lengths(Tolerance=0.3mm) (InNetClass('POENetClass1'))
Rule Violations :0
Processing Rule : Matched Net Lengths(Tolerance=0.5mm) (InNetClass('POENetClass2'))
Rule Violations :0
Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
Rule Violations :0
Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0
Processing Rule : Un-Routed Net Constraint ( (All) )
Rule Violations :0
Processing Rule : Hole Size Constraint (Min=0.02mm) (Max=3.5mm) (All)
Rule Violations :0
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Rule Violations :0
Processing Rule : Hole To Hole Clearance (Gap=0.25mm) (All),(All)
Rule Violations :0
Processing Rule : Minimum Solder Mask Sliver (Gap=0.05mm) (All),(All)
Rule Violations :0
Processing Rule : Silk To Solder Mask (Clearance=0.2mm) (Disabled)(IsPad),(All)
Rule Violations :0
Processing Rule : Silk to Silk (Clearance=0.2mm) (Disabled)(All),(All)
Rule Violations :0
Processing Rule : Net Antennae (Tolerance=0mm) (Disabled)(All)
Rule Violations :0
Violations Detected : 0
Time Elapsed : 00:00:00
\ No newline at end of file
------------------------------------------------------------------------------------------
Gerber File Extension Report For: Gerber Files.GBR 10/01/2019 18:50:37
------------------------------------------------------------------------------------------
------------------------------------------------------------------------------------------
Layer Extension Layer Description
------------------------------------------------------------------------------------------
.GTL Top Layer
.GBL Bottom Layer
.GTO Top Overlay
.GTP Top Paste
.GTS Top Solder
.GBS Bottom Solder
.GM13 Dimension
------------------------------------------------------------------------------------------
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%ADD15C,5.000*%
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%ADD20R,29.211X9.310*%
%ADD21R,0.400X1.400*%
%ADD22R,1.900X2.300*%
%ADD23R,0.700X2.600*%
%ADD24C,0.100*%
%ADD25C,5.100*%
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%MOMM*%
G71*
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G75*
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%ADD28C,0.020*%
D28*
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G71*
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G71*
G01*
G75*
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%ADD10R,0.300X1.300*%
%ADD11R,1.800X2.200*%
%ADD12R,0.600X2.500*%
%ADD13C,0.800*%
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%ADD15C,5.000*%
%ADD16C,0.550*%
%ADD17C,0.600*%
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D10*
X49096Y34875D02*
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D03*
X45596D02*
D03*
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D03*
X37096D02*
D03*
D11*
X29696Y38125D02*
D03*
X50996D02*
D03*
M02*
%FSLAX43Y43*%
%MOMM*%
G71*
G01*
G75*
G04 Layer_Color=8388736*
%ADD10R,0.300X1.300*%
%ADD11R,1.800X2.200*%
%ADD12R,0.600X2.500*%
%ADD13C,0.800*%
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%ADD15C,5.000*%
%ADD16C,0.550*%
%ADD17C,0.600*%
%ADD18C,0.150*%
%ADD19C,0.250*%
%ADD20R,29.211X9.310*%
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%ADD22R,1.900X2.300*%
%ADD23R,0.700X2.600*%
%ADD24C,0.100*%
%ADD25C,5.100*%
%ADD26C,0.650*%
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D20*
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D03*
D21*
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D03*
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D03*
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D03*
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D25*
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D03*
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D03*
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D03*
D26*
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D03*
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D03*
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D03*
X30100D02*
D03*
X51100Y29400D02*
D03*
X48100D02*
D03*
X42600D02*
D03*
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D03*
X34850D02*
D03*
X31850D02*
D03*
X30600D02*
D03*
X48200Y31800D02*
D03*
X47400D02*
D03*
X39100Y31208D02*
D03*
D27*
X41400Y52400D02*
D03*
M02*
*************************************************************
FileName = Gerber Files.GBR
AutoAperture = True
*************************************************************
Generating : Top Layer
File : Gerber Files.GTL
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D10
D11
D12
D13
D14
D15
D16
D17
*************************************************************
*************************************************************
Generating : Bottom Layer
File : Gerber Files.GBL
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
D12
D14
D15
D16
D17
D18
*************************************************************
*************************************************************
Generating : Top Overlay
File : Gerber Files.GTO
Adding Layer : Top Overlay
Used DCodes :
D14
D18
D19
*************************************************************
*************************************************************
Generating : Top Paste
File : Gerber Files.GTP
Adding Layer : Top Paste
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D10
D11
*************************************************************
*************************************************************
Generating : Top Solder
File : Gerber Files.GTS
Adding Layer : Top Solder
Adding Layer : Top Layer
Adding Layer : Multi-Layer
Used DCodes :
D20
D21
D22
D23
D24
D25
D26
D27
*************************************************************
*************************************************************
Generating : Bottom Solder
File : Gerber Files.GBS
Adding Layer : Bottom Solder
Adding Layer : Bottom Layer
Adding Layer : Multi-Layer
Used DCodes :
D23
D24
D25
D26
D27
*************************************************************
*************************************************************
Generating : Dimension
File : Gerber Files.GM13
Adding Layer : Dimension
Used DCodes :
D28
*************************************************************
DRC Rules Export File for PCB: V:\Work\Projets\BjtPartners\2018\MiniPCIexpress\hard\MiniPCIe.PcbDoc
RuleKind=Clearance|RuleName=PolyGon PourClearance_NoNet|Scope=Board|Minimum=19.69
RuleKind=Clearance|RuleName=PolyGon Pour Clearance_12V|Scope=Board|Minimum=7.87
RuleKind=Clearance|RuleName=DiffPairNetClass|Scope=Board|Minimum=3.94
RuleKind=Clearance|RuleName=Clearance-Via|Scope=Board|Minimum=4.72
RuleKind=Clearance|RuleName=50OhmsL1toL2|Scope=Board|Minimum=23.62
RuleKind=Clearance|RuleName=50OhmsL8toL5|Scope=Board|Minimum=8.27
RuleKind=Clearance|RuleName=50OhmsL8toL4|Scope=Board|Minimum=19.69
RuleKind=Clearance|RuleName=100OhmsL8toL1_2|Scope=Board|Minimum=4.72
RuleKind=Clearance|RuleName=PolyGon Pour Clearance|Scope=Board|Minimum=8.66
RuleKind=Clearance|RuleName=Clearance|Scope=Board|Minimum=3.94
RuleKind=Width|RuleName=Width|Scope=Board|Minimum=3.94
RuleKind=SolderMaskExpansion|RuleName=SolderMaskExpansion|Scope=Board|Minimum=1.97
RuleKind=ShortCircuit|RuleName=ShortCircuit|Scope=Board|Allowed=0
D10 RECTANGULAR 51.181 11.811 0.000 FLASH 270.000
D11 RECTANGULAR 86.614 70.866 0.000 FLASH 90.000
D12 RECTANGULAR 23.622 98.425 0.000 FLASH 0.000
D13 ROUNDED 31.496 31.496 0.000 LINE 0.000
D14 ROUNDED 7.874 7.874 0.000 LINE 0.000
D15 ROUNDED 196.850 196.850 0.000 FLASH 0.000
D16 ROUNDED 21.654 21.654 0.000 FLASH 0.000
D17 ROUNDED 23.622 23.622 0.000 FLASH 0.000
D18 ROUNDED 5.905 5.905 0.000 LINE 0.000
D19 ROUNDED 9.842 9.842 0.000 LINE 0.000
D20 RECTANGULAR 1150.047 366.516 0.000 FLASH 0.000
D21 RECTANGULAR 55.118 15.748 0.000 FLASH 270.000
D22 RECTANGULAR 90.551 74.803 0.000 FLASH 90.000
D23 RECTANGULAR 27.559 102.362 0.000 FLASH 0.000
D24 ROUNDED 3.937 3.937 0.000 FLASH 0.000
D25 ROUNDED 200.787 200.787 0.000 FLASH 0.000
D26 ROUNDED 25.591 25.591 0.000 FLASH 0.000
D27 ROUNDED 27.559 27.559 0.000 FLASH 0.000
D28 ROUNDED 0.787 0.787 0.000 LINE 0.000
M48
;Layer_Color=9474304
;FILE_FORMAT=4:3
METRIC,TZ
;TYPE=NON_PLATED
T4F00S00C0.500
%
T04
X39800Y52400
X40600
X42200
X43000
X43800
X44600
X45400
X46200
X47000
X47800
X48600
X39000
X38200
X37400
X36600
X35800
X35000
X34200
X33400
X32600
M30
M48
;Layer_Color=9474304
;FILE_FORMAT=4:3
METRIC,TZ
;TYPE=PLATED
T1F00S00C0.250
T2F00S00C0.400
T3F00S00C2.700
%
T01
X28100Y31400
X30100Y33400
X30600Y29400
X31850
X34850
X38600
X39100Y31208
X36350Y36900
X27600Y39400
X40600Y32900
X43600
X42600Y29400
X48100
X48200Y31800
X47400
X50600Y33400
X52600Y31400
X51100Y29400
X46850Y36900
X53600Y38900
Y41900
X48100
X43100
X38100
X33100
X27600
T02
X41400Y52400
T03
X52696Y49300
Y73500
X28496
Y49300
M30
---------------------------------------------------------------------------
NCDrill File Report For: MiniPCIe.PcbDoc 10/01/2019 18:50:37
---------------------------------------------------------------------------
Layer Pair : Top Layer to Bottom Layer
ASCII Plated RoundHoles File : NC Drill Files-Plated.TXT
ASCII Non-Plated RoundHoles File : NC Drill Files-NonPlated.TXT
Tool Hole Size Hole Type Hole Count Plated Tool Travel
---------------------------------------------------------------------------
T1 0.25mm (9.842mil) Round 26 115.60 mm (4.55 Inch)
T2 0.4mm (15.748mil) Round 1 0.00 mm (0.00 Inch)
T3 2.7mm (106.299mil) Round 4 72.60 mm (2.86 Inch)
T4 0.5mm (19.685mil) Round 20 NPTH 24.80 mm (0.98 Inch)
---------------------------------------------------------------------------
Totals 51 213.00 mm (8.39 Inch)
Total Processing Time (hh:mm:ss) : 00:00:00
Layer Pairs Export File for PCB: V:\Work\Projets\BjtPartners\2018\MiniPCIexpress\hard\MiniPCIe.PcbDoc
LayersSetName=Top_Bot_Plated_Thru_Holes|DrillFile=nc drill files-plated.txt|LayerPairs=gtl,gbl
LayersSetName=Top_Bot_NonPlated_Thru_Holes|DrillFile=nc drill files-nonplated.txt|LayerPairs=gtl,gbl
Designator Footprint Mid X Mid Y Ref X Ref Y Pad X Pad Y TB Rotation Comment
CONN2 FH12-36S-0.5SH 14.746mm 11.1mm 14.746mm 11.1mm 23.496mm 9.475mm T 180.00 Types
Project Outputs Generation Report
---------------------------------
Start Output Generation At 14:59:21 On 03/12/2020
Output: BomMidPwrLte MiniPCIe
Type : BOM
From : Variant [[No Variations]] of Project [MiniPciExpressCard.PrjPCB]
Generated File[BomMidPwrLte MiniPCIe.xls]
Files Generated : 1
Documents Printed : 0
Finished Output Generation At 14:59:21 On 03/12/2020
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