Commit accc2c86 authored by Kirill Smelkov's avatar Kirill Smelkov

software/ors-amarisoft: enb: Don't use #define inside DRB template

When there will be multiple cells and so multiple DRB files referenced from enb.cfg,
eNB will complain with an error that "there are multiple #define" for T_REORDERING.

-> Use jinja2 templating instead to handle FDD/TDD conditions.

/cc @xavier_thompson, @Daetalus
/reviewed-by @jhuge, @lu.xu
/reviewed-on nexedi/slapos!1473
parent 8c841ce6
......@@ -104,7 +104,7 @@ md5sum = 8bcf0524a89da28a0329ae598165684b
[drb_lte.jinja2.cfg]
filename = config/drb_lte.jinja2.cfg
md5sum = f3547d5b183cfa474c934a4a8602be33
md5sum = 6c8bdb0ce1d2bdd846a87aa6c5204a9c
[sib23.jinja2.asn]
filename = config/sib23.jinja2.asn
......
......@@ -2,8 +2,7 @@
// DRB configuration vary in beteen FDD and TDD modes.
{% set T_REORDERING = {'fdd': 35, 'tdd': 65} [rf_mode] %}
// {{ rf_mode | upper }}
#define T_REORDERING {{ T_REORDERING }}
// {{ rf_mode | upper }} T_REORDERING={{ T_REORDERING }}
[
{
......@@ -31,7 +30,7 @@
},
dl_um: {
sn_FieldLength: 5,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -66,7 +65,7 @@
},
dl_um: {
sn_FieldLength: 10,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -99,7 +98,7 @@
},
dl_um: {
sn_FieldLength: 10,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -133,7 +132,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......@@ -172,7 +171,7 @@
},
dl_um: {
sn_FieldLength: 5,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -207,7 +206,7 @@
},
dl_um: {
sn_FieldLength: 10,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -242,7 +241,7 @@
},
dl_um: {
sn_FieldLength: 10,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -277,7 +276,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......@@ -312,7 +311,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......@@ -346,7 +345,7 @@
},
dl_um: {
sn_FieldLength: 10,
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
},
},
logical_channel_config: {
......@@ -380,7 +379,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......@@ -418,7 +417,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......@@ -453,7 +452,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......@@ -488,7 +487,7 @@
maxRetxThreshold: 32,
},
dl_am: {
t_Reordering: T_REORDERING,
t_Reordering: {{ T_REORDERING }},
t_StatusProhibit: 10,
},
},
......
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