tegra124-venice2.dts 32 KB
Newer Older
1
// SPDX-License-Identifier: GPL-2.0
2 3
/dts-v1/;

4
#include <dt-bindings/input/input.h>
5 6 7 8 9 10
#include "tegra124.dtsi"

/ {
	model = "NVIDIA Tegra124 Venice2";
	compatible = "nvidia,venice2", "nvidia,tegra124";

11
	aliases {
12 13
		rtc0 = "/i2c@7000d000/pmic@40";
		rtc1 = "/rtc@7000e000";
14
		serial0 = &uarta;
15 16
	};

17 18 19 20
	chosen {
		stdout-path = "serial0:115200n8";
	};

21
	memory@80000000 {
22
		reg = <0x0 0x80000000 0x0 0x80000000>;
23 24
	};

25 26
	host1x@50000000 {
		hdmi@54280000 {
27 28 29 30 31 32 33 34 35 36 37
			status = "okay";

			vdd-supply = <&vdd_3v3_hdmi>;
			pll-supply = <&vdd_hdmi_pll>;
			hdmi-supply = <&vdd_5v0_hdmi>;

			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
			nvidia,hpd-gpio =
				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
		};

38
		sor@54540000 {
39 40
			status = "okay";

41 42 43
			avdd-io-hdmi-dp-supply = <&vdd_1v05_run>;
			vdd-hdmi-dp-pll-supply = <&vdd_3v3_run>;

44 45 46 47
			nvidia,dpaux = <&dpaux>;
			nvidia,panel = <&panel>;
		};

48
		dpaux@545c0000 {
49 50
			vdd-supply = <&vdd_3v3_panel>;
			status = "okay";
51 52 53 54

			aux-bus {
				panel: panel {
					compatible = "lg,lp129qe";
55
					power-supply = <&vdd_3v3_panel>;
56 57 58
					backlight = <&backlight>;
				};
			};
59 60 61
		};
	};

62
	gpu@57000000 {
63 64 65 66 67 68 69
		/*
		 * Node left disabled on purpose - the bootloader will enable
		 * it after having set the VPR up
		 */
		vdd-supply = <&vdd_gpu>;
	};

70
	pinmux: pinmux@70000868 {
71 72
		pinctrl-names = "boot";
		pinctrl-0 = <&pinmux_boot>;
73

74
		pinmux_boot: pinmux {
75 76 77 78 79 80 81 82
			dap_mclk1_pw4 {
				nvidia,pins = "dap_mclk1_pw4";
				nvidia,function = "extperiph1";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			dap1_din_pn1 {
83 84 85 86 87 88 89 90
				nvidia,pins = "dap1_din_pn1";
				nvidia,function = "i2s0";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			dap1_dout_pn2 {
				nvidia,pins = "dap1_dout_pn2",
91 92 93
					      "dap1_fs_pn0",
					      "dap1_sclk_pn3";
				nvidia,function = "i2s0";
94
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
95 96 97 98
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			dap2_din_pa4 {
99
				nvidia,pins = "dap2_din_pa4";
100 101 102
				nvidia,function = "i2s1";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
103
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
104
			};
105 106 107 108 109
			dap2_dout_pa5 {
				nvidia,pins = "dap2_dout_pa5",
					      "dap2_fs_pa2",
					      "dap2_sclk_pa3";
				nvidia,function = "i2s1";
110 111
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
112
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
113
			};
114 115 116
			dvfs_pwm_px0 {
				nvidia,pins = "dvfs_pwm_px0",
					      "dvfs_clk_px2";
117 118 119 120 121 122 123 124 125 126
				nvidia,function = "cldvfs";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			ulpi_clk_py0 {
				nvidia,pins = "ulpi_clk_py0",
					      "ulpi_nxt_py2",
					      "ulpi_stp_py3";
				nvidia,function = "spi1";
127 128 129 130 131 132 133
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			ulpi_dir_py1 {
				nvidia,pins = "ulpi_dir_py1";
				nvidia,function = "spi1";
134
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			cam_i2c_scl_pbb1 {
				nvidia,pins = "cam_i2c_scl_pbb1",
					      "cam_i2c_sda_pbb2";
				nvidia,function = "i2c3";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,lock = <TEGRA_PIN_DISABLE>;
				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
			};
			gen2_i2c_scl_pt5 {
				nvidia,pins = "gen2_i2c_scl_pt5",
					      "gen2_i2c_sda_pt6";
				nvidia,function = "i2c2";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,lock = <TEGRA_PIN_DISABLE>;
				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
			};
			pg4 {
				nvidia,pins = "pg4",
					      "pg5",
					      "pg6",
					      "pi3";
				nvidia,function = "spi4";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
168 169 170
			pg7 {
				nvidia,pins = "pg7";
				nvidia,function = "spi4";
171
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
172 173
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
174 175 176 177 178 179 180 181
			};
			ph1 {
				nvidia,pins = "ph1";
				nvidia,function = "pwm1";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
182 183 184 185 186 187
			pk0 {
				nvidia,pins = "pk0",
					      "kb_row15_ps7",
					      "clk_32k_out_pa0";
				nvidia,function = "soc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
188
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
189
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
190
			};
191
			sdmmc1_clk_pz0 {
192
				nvidia,pins = "sdmmc1_clk_pz0";
193
				nvidia,function = "sdmmc1";
194
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195 196 197
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
198 199 200 201 202 203 204 205 206 207 208
			sdmmc1_cmd_pz1 {
				nvidia,pins = "sdmmc1_cmd_pz1",
					      "sdmmc1_dat0_py7",
					      "sdmmc1_dat1_py6",
					      "sdmmc1_dat2_py5",
					      "sdmmc1_dat3_py4";
				nvidia,function = "sdmmc1";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257
			sdmmc3_clk_pa6 {
				nvidia,pins = "sdmmc3_clk_pa6";
				nvidia,function = "sdmmc3";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			sdmmc3_cmd_pa7 {
				nvidia,pins = "sdmmc3_cmd_pa7",
					      "sdmmc3_dat0_pb7",
					      "sdmmc3_dat1_pb6",
					      "sdmmc3_dat2_pb5",
					      "sdmmc3_dat3_pb4",
					      "sdmmc3_clk_lb_out_pee4",
					      "sdmmc3_clk_lb_in_pee5";
				nvidia,function = "sdmmc3";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			sdmmc4_clk_pcc4 {
				nvidia,pins = "sdmmc4_clk_pcc4";
				nvidia,function = "sdmmc4";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			sdmmc4_cmd_pt7 {
				nvidia,pins = "sdmmc4_cmd_pt7",
					      "sdmmc4_dat0_paa0",
					      "sdmmc4_dat1_paa1",
					      "sdmmc4_dat2_paa2",
					      "sdmmc4_dat3_paa3",
					      "sdmmc4_dat4_paa4",
					      "sdmmc4_dat5_paa5",
					      "sdmmc4_dat6_paa6",
					      "sdmmc4_dat7_paa7";
				nvidia,function = "sdmmc4";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			pwr_i2c_scl_pz6 {
				nvidia,pins = "pwr_i2c_scl_pz6",
					      "pwr_i2c_sda_pz7";
				nvidia,function = "i2cpwr";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258
				nvidia,lock = <TEGRA_PIN_DISABLE>;
259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310
				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
			};
			jtag_rtck {
				nvidia,pins = "jtag_rtck";
				nvidia,function = "rtck";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			clk_32k_in {
				nvidia,pins = "clk_32k_in";
				nvidia,function = "clk";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			core_pwr_req {
				nvidia,pins = "core_pwr_req";
				nvidia,function = "pwron";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			cpu_pwr_req {
				nvidia,pins = "cpu_pwr_req";
				nvidia,function = "cpu";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			pwr_int_n {
				nvidia,pins = "pwr_int_n";
				nvidia,function = "pmi";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			reset_out_n {
				nvidia,pins = "reset_out_n";
				nvidia,function = "reset_out_n";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			clk3_out_pee0 {
				nvidia,pins = "clk3_out_pee0";
				nvidia,function = "extperiph3";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			dap4_din_pp5 {
311 312 313 314 315 316 317 318
				nvidia,pins = "dap4_din_pp5";
				nvidia,function = "i2s3";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			dap4_dout_pp6 {
				nvidia,pins = "dap4_dout_pp6",
319 320 321
					      "dap4_fs_pp4",
					      "dap4_sclk_pp7";
				nvidia,function = "i2s3";
322
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
323 324 325 326 327 328 329 330 331 332 333
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
			};
			gen1_i2c_sda_pc5 {
				nvidia,pins = "gen1_i2c_sda_pc5",
					      "gen1_i2c_scl_pc4";
				nvidia,function = "i2c1";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,lock = <TEGRA_PIN_DISABLE>;
334
				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
335
			};
336 337 338
			uart2_cts_n_pj5 {
				nvidia,pins = "uart2_cts_n_pj5";
				nvidia,function = "uartb";
339
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
340
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
341 342
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
343 344
			uart2_rts_n_pj6 {
				nvidia,pins = "uart2_rts_n_pj6";
345
				nvidia,function = "uartb";
346
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
347 348 349 350
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
			uart2_rxd_pc3 {
351
				nvidia,pins = "uart2_rxd_pc3";
352 353 354 355 356
				nvidia,function = "irda";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
357 358 359 360 361 362 363
			uart2_txd_pc2 {
				nvidia,pins = "uart2_txd_pc2";
				nvidia,function = "irda";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
364 365
			uart3_cts_n_pa1 {
				nvidia,pins = "uart3_cts_n_pa1",
366
					      "uart3_rxd_pw7";
367 368 369 370 371
				nvidia,function = "uartc";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
372 373 374 375 376 377 378 379
			uart3_rts_n_pc0 {
				nvidia,pins = "uart3_rts_n_pc0",
					      "uart3_txd_pw6";
				nvidia,function = "uartc";
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
			};
380 381 382 383 384 385
			hdmi_cec_pee3 {
				nvidia,pins = "hdmi_cec_pee3";
				nvidia,function = "cec";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
386 387 388 389 390 391 392 393 394
				nvidia,lock = <TEGRA_PIN_DISABLE>;
				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
			};
			hdmi_int_pn7 {
				nvidia,pins = "hdmi_int_pn7";
				nvidia,function = "rsvd1";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
395 396 397 398 399 400 401 402
			};
			ddc_scl_pv4 {
				nvidia,pins = "ddc_scl_pv4",
					      "ddc_sda_pv5";
				nvidia,function = "i2c4";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448
				nvidia,lock = <TEGRA_PIN_DISABLE>;
				nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
			};
			pj7 {
				nvidia,pins = "pj7",
					      "pk7";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			pb0 {
				nvidia,pins = "pb0",
					      "pb1";
				nvidia,function = "uartd";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			ph0 {
				nvidia,pins = "ph0";
				nvidia,function = "pwm0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			kb_row10_ps2 {
				nvidia,pins = "kb_row10_ps2";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			kb_row9_ps1 {
				nvidia,pins = "kb_row9_ps1";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			kb_row6_pr6 {
				nvidia,pins = "kb_row6_pr6";
				nvidia,function = "displaya_alt";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
449 450
			};
			usb_vbus_en0_pn4 {
451 452
				nvidia,pins = "usb_vbus_en0_pn4",
					      "usb_vbus_en1_pn5";
453 454
				nvidia,function = "usb";
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
455
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456 457
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,lock = <TEGRA_PIN_DISABLE>;
458
				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488
			};
			drive_sdio1 {
				nvidia,pins = "drive_sdio1";
				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
				nvidia,pull-down-strength = <32>;
				nvidia,pull-up-strength = <42>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
			};
			drive_sdio3 {
				nvidia,pins = "drive_sdio3";
				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
				nvidia,pull-down-strength = <20>;
				nvidia,pull-up-strength = <36>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
			};
			drive_gma {
				nvidia,pins = "drive_gma";
				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
				nvidia,pull-down-strength = <1>;
				nvidia,pull-up-strength = <2>;
				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
				nvidia,drive-type = <1>;
			};
489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607
			als_irq_l {
				nvidia,pins = "gpio_x3_aud_px3";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			codec_irq_l {
				nvidia,pins = "ph4";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			lcd_bl_en {
				nvidia,pins = "ph2";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			touch_irq_l {
				nvidia,pins = "gpio_w3_aud_pw3";
				nvidia,function = "spi6";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			tpm_davint_l {
				nvidia,pins = "ph6";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			ts_irq_l {
				nvidia,pins = "pk2";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			ts_reset_l {
				nvidia,pins = "pk4";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			ts_shdn_l {
				nvidia,pins = "pk1";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			ph7 {
				nvidia,pins = "ph7";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			kb_col0_ap {
				nvidia,pins = "kb_col0_pq0";
				nvidia,function = "rsvd4";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			lid_open {
				nvidia,pins = "kb_row4_pr4";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			en_vdd_sd {
				nvidia,pins = "kb_row0_pr0";
				nvidia,function = "rsvd4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			ac_ok {
				nvidia,pins = "pj0";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			sensor_irq_l {
				nvidia,pins = "pi6";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			wifi_en {
				nvidia,pins = "gpio_x7_aud_px7";
				nvidia,function = "rsvd4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			wifi_rst_l {
				nvidia,pins = "clk2_req_pcc5";
				nvidia,function = "dap";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			hp_det_l {
				nvidia,pins = "ulpi_data1_po2";
				nvidia,function = "spi3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
608 609 610
		};
	};

611
	serial@70006000 {
612 613
		/delete-property/ dmas;
		/delete-property/ dma-names;
614 615 616
		status = "okay";
	};

617
	pwm@7000a000 {
618 619 620
		status = "okay";
	};

621
	i2c@7000c000 {
622 623
		status = "okay";
		clock-frequency = <100000>;
624 625 626 627 628

		acodec: audio-codec@10 {
			compatible = "maxim,max98090";
			reg = <0x10>;
			interrupt-parent = <&gpio>;
629
			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
630
		};
631 632
	};

633
	i2c@7000c400 {
634 635
		status = "okay";
		clock-frequency = <100000>;
636 637 638 639 640 641 642 643

		trackpad@4b {
			compatible = "atmel,maxtouch";
			reg = <0x4b>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_LOW>;
			linux,gpio-keymap = <0 0 0 BTN_LEFT>;
		};
644 645
	};

646
	i2c@7000c500 {
647 648 649 650
		status = "okay";
		clock-frequency = <100000>;
	};

651
	hdmi_ddc: i2c@7000c700 {
652 653 654 655
		status = "okay";
		clock-frequency = <100000>;
	};

656
	i2c@7000d000 {
657
		status = "okay";
658 659
		clock-frequency = <400000>;

660
		pmic: pmic@40 {
661 662 663 664
			compatible = "ams,as3722";
			reg = <0x40>;
			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;

665 666
			ams,system-power-controller;

667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700
			#interrupt-cells = <2>;
			interrupt-controller;

			gpio-controller;
			#gpio-cells = <2>;

			pinctrl-names = "default";
			pinctrl-0 = <&as3722_default>;

			as3722_default: pinmux {
				gpio0 {
					pins = "gpio0";
					function = "gpio";
					bias-pull-down;
				};

				gpio1_2_4_7 {
					pins = "gpio1", "gpio2", "gpio4", "gpio7";
					function = "gpio";
					bias-pull-up;
				};

				gpio3_6 {
					pins = "gpio3", "gpio6";
					bias-high-impedance;
				};

				gpio5 {
					pins = "gpio5";
					function = "clk32k-out";
				};
			};

			regulators {
701 702 703 704 705 706 707 708 709 710
				vsup-sd2-supply = <&vdd_5v0_sys>;
				vsup-sd3-supply = <&vdd_5v0_sys>;
				vsup-sd4-supply = <&vdd_5v0_sys>;
				vsup-sd5-supply = <&vdd_5v0_sys>;
				vin-ldo0-supply = <&vdd_1v35_lp0>;
				vin-ldo1-6-supply = <&vdd_3v3_run>;
				vin-ldo2-5-7-supply = <&vddio_1v8>;
				vin-ldo3-4-supply = <&vdd_3v3_sys>;
				vin-ldo9-10-supply = <&vdd_5v0_sys>;
				vin-ldo11-supply = <&vdd_3v3_run>;
711 712

				sd0 {
713
					regulator-name = "+VDD_CPU_AP";
714 715 716 717 718 719
					regulator-min-microvolt = <700000>;
					regulator-max-microvolt = <1400000>;
					regulator-min-microamp = <3500000>;
					regulator-max-microamp = <3500000>;
					regulator-always-on;
					regulator-boot-on;
720
					ams,ext-control = <2>;
721 722 723
				};

				sd1 {
724
					regulator-name = "+VDD_CORE";
725 726 727 728 729 730
					regulator-min-microvolt = <700000>;
					regulator-max-microvolt = <1350000>;
					regulator-min-microamp = <2500000>;
					regulator-max-microamp = <2500000>;
					regulator-always-on;
					regulator-boot-on;
731
					ams,ext-control = <1>;
732 733
				};

734 735
				vdd_1v35_lp0: sd2 {
					regulator-name = "+1.35V_LP0(sd2)";
736 737 738 739 740 741 742
					regulator-min-microvolt = <1350000>;
					regulator-max-microvolt = <1350000>;
					regulator-always-on;
					regulator-boot-on;
				};

				sd3 {
743
					regulator-name = "+1.35V_LP0(sd3)";
744 745 746 747 748 749
					regulator-min-microvolt = <1350000>;
					regulator-max-microvolt = <1350000>;
					regulator-always-on;
					regulator-boot-on;
				};

750
				vdd_1v05_run: sd4 {
751
					regulator-name = "+1.05V_RUN";
752 753 754 755
					regulator-min-microvolt = <1050000>;
					regulator-max-microvolt = <1050000>;
				};

756 757
				vddio_1v8: sd5 {
					regulator-name = "+1.8V_VDDIO";
758 759 760 761 762 763
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
					regulator-boot-on;
					regulator-always-on;
				};

764
				vdd_gpu: sd6 {
765
					regulator-name = "+VDD_GPU_AP";
766 767 768 769 770 771 772 773
					regulator-min-microvolt = <650000>;
					regulator-max-microvolt = <1200000>;
					regulator-min-microamp = <3500000>;
					regulator-max-microamp = <3500000>;
					regulator-boot-on;
					regulator-always-on;
				};

774
				avdd_1v05_run: ldo0 {
775
					regulator-name = "+1.05V_RUN_AVDD";
776 777 778 779
					regulator-min-microvolt = <1050000>;
					regulator-max-microvolt = <1050000>;
					regulator-boot-on;
					regulator-always-on;
780
					ams,ext-control = <1>;
781 782 783
				};

				ldo1 {
784
					regulator-name = "+1.8V_RUN_CAM";
785 786 787 788 789
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};

				ldo2 {
790
					regulator-name = "+1.2V_GEN_AVDD";
791 792 793 794 795 796 797
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
					regulator-boot-on;
					regulator-always-on;
				};

				ldo3 {
798
					regulator-name = "+1.00V_LP0_VDD_RTC";
799 800 801 802 803 804 805
					regulator-min-microvolt = <1000000>;
					regulator-max-microvolt = <1000000>;
					regulator-boot-on;
					regulator-always-on;
					ams,enable-tracking;
				};

806
				vdd_run_cam: ldo4 {
807
					regulator-name = "+3.3V_RUN_CAM";
808 809 810 811 812
					regulator-min-microvolt = <2800000>;
					regulator-max-microvolt = <2800000>;
				};

				ldo5 {
813
					regulator-name = "+1.2V_RUN_CAM_FRONT";
814 815 816 817
					regulator-min-microvolt = <1200000>;
					regulator-max-microvolt = <1200000>;
				};

818
				vddio_sdmmc3: ldo6 {
819
					regulator-name = "+VDDIO_SDMMC3";
820 821 822 823 824
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <3300000>;
				};

				ldo7 {
825
					regulator-name = "+1.05V_RUN_CAM_REAR";
826 827 828 829 830
					regulator-min-microvolt = <1050000>;
					regulator-max-microvolt = <1050000>;
				};

				ldo9 {
831
					regulator-name = "+2.8V_RUN_TOUCH";
832 833 834 835 836
					regulator-min-microvolt = <2800000>;
					regulator-max-microvolt = <2800000>;
				};

				ldo10 {
837
					regulator-name = "+2.8V_RUN_CAM_AF";
838 839 840 841 842
					regulator-min-microvolt = <2800000>;
					regulator-max-microvolt = <2800000>;
				};

				ldo11 {
843
					regulator-name = "+1.8V_RUN_VPP_FUSE";
844 845 846 847 848
					regulator-min-microvolt = <1800000>;
					regulator-max-microvolt = <1800000>;
				};
			};
		};
849 850
	};

851
	spi@7000d400 {
852 853
		status = "okay";

854
		cros_ec: cros-ec@0 {
855 856 857 858 859 860 861
			compatible = "google,cros-ec-spi";
			spi-max-frequency = <4000000>;
			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
			reg = <0>;

			google,cros-ec-spi-msg-delay = <2000>;
862 863 864 865 866 867 868 869 870 871 872 873 874

			i2c-tunnel {
				compatible = "google,cros-ec-i2c-tunnel";
				#address-cells = <1>;
				#size-cells = <0>;

				google,remote-bus = <0>;

				charger: bq24735@9 {
					compatible = "ti,bq24735";
					reg = <0x9>;
					interrupt-parent = <&gpio>;
					interrupts = <TEGRA_GPIO(J, 0)
875
							IRQ_TYPE_EDGE_BOTH>;
876 877 878 879 880 881 882 883 884 885 886 887
					ti,ac-detect-gpios = <&gpio
							TEGRA_GPIO(J, 0)
							GPIO_ACTIVE_HIGH>;
				};

				battery: sbs-battery@b {
					compatible = "sbs,sbs-battery";
					reg = <0xb>;
					sbs,i2c-retry-count = <2>;
					sbs,poll-retry-count = <1>;
				};
			};
888 889 890
		};
	};

891
	spi@7000da00 {
892 893
		status = "okay";
		spi-max-frequency = <25000000>;
894 895

		flash@0 {
896
			compatible = "winbond,w25q32dw", "jedec,spi-nor";
897 898 899 900 901
			reg = <0>;
			spi-max-frequency = <20000000>;
		};
	};

902
	pmc@7000e400 {
903
		nvidia,invert-interrupt;
904 905 906 907 908 909 910
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <500>;
		nvidia,cpu-pwr-off-time = <300>;
		nvidia,core-pwr-good-time = <641 3845>;
		nvidia,core-pwr-off-time = <61036>;
		nvidia,core-power-req-active-high;
		nvidia,sys-clock-req-active-high;
911
	};
912

913
	hda@70030000 {
914 915 916
		status = "okay";
	};

917 918 919 920 921 922
	usb@70090000 {
		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
923 924 925 926 927 928 929 930 931 932 933 934 935 936
		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";

		avddio-pex-supply = <&vdd_1v05_run>;
		dvddio-pex-supply = <&vdd_1v05_run>;
		avdd-usb-supply = <&vdd_3v3_lp0>;
		avdd-pll-utmip-supply = <&vddio_1v8>;
		avdd-pll-erefe-supply = <&avdd_1v05_run>;
		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;

		status = "okay";
	};

937
	padctl@7009f000 {
938 939 940 941 942
		avdd-pll-utmip-supply = <&vddio_1v8>;
		avdd-pll-erefe-supply = <&avdd_1v05_run>;
		avdd-pex-pll-supply = <&vdd_1v05_run>;
		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;

943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985
		pads {
			usb2 {
				status = "okay";

				lanes {
					usb2-0 {
						nvidia,function = "xusb";
						status = "okay";
					};

					usb2-1 {
						nvidia,function = "xusb";
						status = "okay";
					};

					usb2-2 {
						nvidia,function = "xusb";
						status = "okay";
					};
				};
			};

			pcie {
				status = "okay";

				lanes {
					pcie-0 {
						nvidia,function = "usb3-ss";
						status = "okay";
					};

					pcie-1 {
						nvidia,function = "usb3-ss";
						status = "okay";
					};
				};
			};
		};

		ports {
			usb2-0 {
				status = "okay";
				mode = "otg";
986
				usb-role-switch;
987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015
				vbus-supply = <&vdd_usb1_vbus>;
			};

			usb2-1 {
				status = "okay";
				mode = "host";

				vbus-supply = <&vdd_run_cam>;
			};

			usb2-2 {
				status = "okay";
				mode = "host";

				vbus-supply = <&vdd_usb3_vbus>;
			};

			usb3-0 {
				nvidia,usb2-companion = <0>;
				status = "okay";
			};

			usb3-1 {
				nvidia,usb2-companion = <2>;
				status = "okay";
			};
		};
	};

1016
	mmc@700b0400 {
1017 1018
		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1019
		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1020 1021
		status = "okay";
		bus-width = <4>;
1022
		vqmmc-supply = <&vddio_sdmmc3>;
1023 1024
	};

1025
	mmc@700b0600 {
1026 1027
		status = "okay";
		bus-width = <8>;
1028
		non-removable;
1029 1030
	};

1031 1032
	ahub@70300000 {
		i2s@70301100 {
1033 1034 1035 1036
			status = "okay";
		};
	};

1037
	usb@7d000000 {
1038 1039 1040
		status = "okay";
	};

1041
	usb-phy@7d000000 {
1042 1043 1044 1045
		status = "okay";
		vbus-supply = <&vdd_usb1_vbus>;
	};

1046
	usb@7d004000 {
1047 1048 1049
		status = "okay";
	};

1050
	usb-phy@7d004000 {
1051 1052 1053 1054
		status = "okay";
		vbus-supply = <&vdd_run_cam>;
	};

1055
	usb@7d008000 {
1056 1057 1058
		status = "okay";
	};

1059
	usb-phy@7d008000 {
1060 1061 1062 1063
		status = "okay";
		vbus-supply = <&vdd_usb3_vbus>;
	};

1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074
	backlight: backlight {
		compatible = "pwm-backlight";

		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
		power-supply = <&vdd_led>;
		pwms = <&pwm 1 1000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
	};

1075
	clk32k_in: clock-32k {
1076 1077 1078
		compatible = "fixed-clock";
		clock-frequency = <32768>;
		#clock-cells = <0>;
1079
	};
1080

1081 1082 1083
	gpio-keys {
		compatible = "gpio-keys";

1084
		key-power {
1085 1086 1087 1088
			label = "Power";
			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
			linux,code = <KEY_POWER>;
			debounce-interval = <10>;
1089
			wakeup-source;
1090 1091 1092
		};
	};

1093
	vdd_mux: regulator-mux {
1094 1095 1096 1097 1098 1099 1100
		compatible = "regulator-fixed";
		regulator-name = "+VDD_MUX";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};
1101

1102
	vdd_5v0_sys: regulator-5v0sys {
1103 1104 1105 1106 1107 1108 1109 1110
		compatible = "regulator-fixed";
		regulator-name = "+5V_SYS";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&vdd_mux>;
	};
1111

1112
	vdd_3v3_sys: regulator-3v3sys {
1113 1114 1115 1116 1117 1118 1119 1120
		compatible = "regulator-fixed";
		regulator-name = "+3.3V_SYS";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&vdd_mux>;
	};
1121

1122
	vdd_3v3_run: regulator-3v3run {
1123 1124 1125 1126 1127 1128 1129 1130 1131 1132
		compatible = "regulator-fixed";
		regulator-name = "+3.3V_RUN";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&vdd_3v3_sys>;
	};
1133

1134
	vdd_3v3_hdmi: regulator-hdmi {
1135 1136 1137 1138 1139 1140
		compatible = "regulator-fixed";
		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vdd_3v3_run>;
	};
1141

1142
	vdd_led: regulator-led {
1143 1144 1145 1146 1147 1148 1149 1150
		compatible = "regulator-fixed";
		regulator-name = "+VDD_LED";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&vdd_mux>;
	};
1151

1152
	vdd_5v0_ts: regulator-ts {
1153 1154 1155 1156 1157 1158 1159 1160 1161
		compatible = "regulator-fixed";
		regulator-name = "+5V_VDD_TS_SW";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&vdd_5v0_sys>;
	};
1162

1163
	vdd_usb1_vbus: regulator-usb1 {
1164 1165 1166 1167 1168 1169 1170 1171 1172
		compatible = "regulator-fixed";
		regulator-name = "+5V_USB_HS";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
		enable-active-high;
		gpio-open-drain;
		vin-supply = <&vdd_5v0_sys>;
	};
1173

1174
	vdd_usb3_vbus: regulator-usb3 {
1175 1176 1177 1178 1179 1180 1181 1182 1183
		compatible = "regulator-fixed";
		regulator-name = "+5V_USB_SS";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
		enable-active-high;
		gpio-open-drain;
		vin-supply = <&vdd_5v0_sys>;
	};
1184

1185
	vdd_3v3_panel: regulator-panel {
1186 1187 1188 1189 1190 1191 1192 1193
		compatible = "regulator-fixed";
		regulator-name = "+3.3V_PANEL";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&pmic 4 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&vdd_3v3_run>;
	};
1194

1195
	vdd_3v3_lp0: regulator-lp0 {
1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208
		compatible = "regulator-fixed";
		regulator-name = "+3.3V_LP0";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		/*
		 * TODO: find a way to wire this up with the USB EHCI
		 * controllers so that it can be enabled on demand.
		 */
		regulator-always-on;
		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&vdd_3v3_sys>;
	};
1209

1210
	vdd_hdmi_pll: regulator-hdmipll {
1211 1212 1213 1214 1215 1216 1217
		compatible = "regulator-fixed";
		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
		regulator-min-microvolt = <1050000>;
		regulator-max-microvolt = <1050000>;
		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
		vin-supply = <&vdd_1v05_run>;
	};
1218

1219
	vdd_5v0_hdmi: regulator-hdmicon {
1220 1221 1222 1223 1224 1225 1226
		compatible = "regulator-fixed";
		regulator-name = "+5V_HDMI_CON";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&vdd_5v0_sys>;
1227 1228
	};

1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246
	sound {
		compatible = "nvidia,tegra-audio-max98090-venice2",
			     "nvidia,tegra-audio-max98090";
		nvidia,model = "NVIDIA Tegra Venice2";

		nvidia,audio-routing =
			"Headphones", "HPR",
			"Headphones", "HPL",
			"Speakers", "SPKR",
			"Speakers", "SPKL",
			"Mic Jack", "MICBIAS",
			"IN34", "Mic Jack";

		nvidia,i2s-controller = <&tegra_i2s1>;
		nvidia,audio-codec = <&acodec>;

		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
1247
			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1248
		clock-names = "pll_a", "pll_a_out0", "mclk";
1249 1250 1251 1252 1253 1254

		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;

		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
					 <&tegra_car TEGRA124_CLK_EXTERN1>;
1255
	};
1256
};
1257

1258
#include "../cros-ec-keyboard.dtsi"