Commit 77dcb02f authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mvebu-dt64-4.14-1' of git://git.infradead.org/linux-mvebu into next/dt64

Pull "mvebu dt64 for 4.14 (part 1)" from Gregory CLEMENT:

For Armada 37xx:
- GIC improvement
- Add PMUv3
- Enable USB2 on EspressoBin

For Armada 7K/8K:
- add GPIO interrupts for CP110
- add pinctrl nodes to describe the CPM I2C0 and CPS SPI1
- re-order RTC nodes in Marvell CP110 description
- on MacchiatoBin
    - fix USB3 regulator definition
    - add support for i2c mux
    - add support for PCIe
    - add an stdout-path

* tag 'mvebu-dt64-4.14-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: re-order RTC nodes in Marvell CP110 description
  arm64: dts: marvell: mcbin: add an stdout-path
  arm64: dts: marvell: mcbin: add support for PCIe
  arm64: dts: marvell: mcbin: add support for i2c mux
  arm64: dts: marvell: fix USB3 regulator definition on MacchiatoBin
  arm64: dts: marvell: mcbin: add pinctrl nodes
  arm64: dts: marvell: cp110: add GPIO interrupts
  ARM64: dts: marvell: armada-37xx: Enable USB2 on espressobin
  ARM64: dts: marvell: armada-37xx: Wire PMUv3
  ARM64: dts: marvell: armada-37xx: Enable memory-mapped GIC CPU interface
  ARM64: dts: marvell: armada-37xx: Fix GIC maintenance interrupt
parents 6421d89f 249112ce
......@@ -81,6 +81,11 @@ &usb3 {
status = "okay";
};
/* J8 */
&usb2 {
status = "okay";
};
&mdio {
switch0: switch0@1 {
compatible = "marvell,mv88e6085";
......
......@@ -81,6 +81,11 @@ timer {
<GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
......@@ -322,7 +327,11 @@ gic: interrupt-controller@1d00000 {
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x1d00000 0x10000>, /* GICD */
<0x1d40000 0x40000>; /* GICR */
<0x1d40000 0x40000>, /* GICR */
<0x1d80000 0x2000>, /* GICC */
<0x1d90000 0x2000>, /* GICH */
<0x1da0000 0x20000>; /* GICV */
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
};
......
......@@ -46,11 +46,17 @@
#include "armada-8040.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Marvell 8040 MACHIATOBin";
compatible = "marvell,armada8040-mcbin", "marvell,armada8040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
chosen {
stdout-path = "serial0:115200n8";
};
memory@00000000 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
......@@ -77,11 +83,13 @@ v_vddo_h: regulator-1-8v {
v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&cpm_gpio2 15 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cpm_xhci_vbus_pins>;
regulator-name = "v_5v0_usb3_hst_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/* actually GPIO controlled, but 8k has no GPIO support yet */
regulator-always-on;
status = "okay";
};
......@@ -112,10 +120,44 @@ &ap_sdhci0 {
&cpm_i2c0 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&cpm_i2c0_pins>;
status = "okay";
};
&cpm_i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&cpm_i2c1_pins>;
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
sfpp0_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
sfpp1_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
sfp_1g_i2c: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
};
};
&cpm_mdio {
pinctrl-names = "default";
pinctrl-0 = <&cpm_ge_mdio_pins>;
status = "okay";
ge_phy: ethernet-phy@0 {
......@@ -123,6 +165,43 @@ ge_phy: ethernet-phy@0 {
};
};
&cpm_pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&cpm_pcie_pins>;
num-lanes = <4>;
num-viewport = <8>;
reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_LOW>;
status = "okay";
};
&cpm_pinctrl {
cpm_ge_mdio_pins: ge-mdio-pins {
marvell,pins = "mpp32", "mpp34";
marvell,function = "ge";
};
cpm_i2c1_pins: i2c1-pins {
marvell,pins = "mpp35", "mpp36";
marvell,function = "i2c1";
};
cpm_i2c0_pins: i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cpm_xhci_vbus_pins: xhci0-vbus-pins {
marvell,pins = "mpp47";
marvell,function = "gpio";
};
cpm_pcie_pins: pcie-pins {
marvell,pins = "mpp52";
marvell,function = "gpio";
};
cpm_sdhci_pins: sdhci-pins {
marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
"mpp60", "mpp61";
marvell,function = "sdio";
};
};
&cpm_sata0 {
/* CPM Lane 0 - U29 */
status = "okay";
......@@ -132,6 +211,8 @@ &cpm_sdhci0 {
/* U6 */
broken-cd;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cpm_sdhci_pins>;
status = "okay";
vqmmc-supply = <&v_3_3>;
};
......@@ -157,6 +238,13 @@ &cps_eth1 {
phy-mode = "sgmii";
};
&cps_pinctrl {
cps_spi1_pins: spi1-pins {
marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
};
&cps_sata0 {
/* CPS Lane 1 - U32 */
/* CPS Lane 3 - U31 */
......@@ -164,6 +252,8 @@ &cps_sata0 {
};
&cps_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&cps_spi1_pins>;
status = "okay";
spi-flash@0 {
......
......@@ -115,6 +115,13 @@ cpm_icu: interrupt-controller@1e0000 {
msi-parent = <&gicp>;
};
cpm_rtc: rtc@284000 {
compatible = "marvell,armada-8k-rtc";
reg = <0x284000 0x20>, <0x284080 0x24>;
reg-names = "rtc", "rtc-soc";
interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
};
cpm_syscon0: system-controller@440000 {
compatible = "syscon", "simple-mfd";
reg = <0x440000 0x1000>;
......@@ -131,8 +138,12 @@ cpm_gpio1: gpio@100 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cpm_pinctrl 0 0 32>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 86 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 85 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 84 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 83 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cpm_gpio2: gpio@140 {
......@@ -142,17 +153,15 @@ cpm_gpio2: gpio@140 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cpm_pinctrl 0 32 31>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 82 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 81 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 80 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
cpm_rtc: rtc@284000 {
compatible = "marvell,armada-8k-rtc";
reg = <0x284000 0x20>, <0x284080 0x24>;
reg-names = "rtc", "rtc-soc";
interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
};
cpm_sata0: sata@540000 {
compatible = "marvell,armada-8k-ahci",
"generic-ahci";
......
......@@ -60,13 +60,6 @@ config-space@f4000000 {
compatible = "simple-bus";
ranges = <0x0 0x0 0xf4000000 0x2000000>;
cps_rtc: rtc@284000 {
compatible = "marvell,armada-8k-rtc";
reg = <0x284000 0x20>, <0x284080 0x24>;
reg-names = "rtc", "rtc-soc";
interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
};
cps_ethernet: ethernet@0 {
compatible = "marvell,armada-7k-pp22";
reg = <0x0 0x100000>, <0x129000 0xb000>;
......@@ -122,6 +115,13 @@ cps_icu: interrupt-controller@1e0000 {
msi-parent = <&gicp>;
};
cps_rtc: rtc@284000 {
compatible = "marvell,armada-8k-rtc";
reg = <0x284000 0x20>, <0x284080 0x24>;
reg-names = "rtc", "rtc-soc";
interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
};
cps_syscon0: system-controller@440000 {
compatible = "syscon", "simple-mfd";
reg = <0x440000 0x1000>;
......@@ -138,8 +138,12 @@ cps_gpio1: gpio@100 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cps_pinctrl 0 0 32>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 86 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 85 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 84 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 83 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
cps_gpio2: gpio@140 {
......@@ -149,6 +153,11 @@ cps_gpio2: gpio@140 {
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&cps_pinctrl 0 32 31>;
interrupt-controller;
interrupts = <ICU_GRP_NSR 82 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 81 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 80 IRQ_TYPE_LEVEL_HIGH>,
<ICU_GRP_NSR 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
......
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