- 17 May, 2024 9 commits
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Mario Limonciello authored
The pixel_clock_mhz property is populated in amdgpu_dm when Freesync is setup, but it is not used anywhere in amdgpu_dm. Remove the dead code. Cc: chiahsuan.chung@amd.com Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Reviewed-by:
Tom Chung <chiahsuan.chung@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Support IMU for ASIC with GC 12.0.0 Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Asad Kamal authored
Use gpu_metrics_v1_6 for SMUv13.0.6 to fill gpu metric info Signed-off-by:
Asad Kamal <asad.kamal@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
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Asad Kamal authored
Add new gpu_metrics_v1_6 to acquire accumulated throttler residencies Signed-off-by:
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Ma Jun authored
optimize the code to avoid pass a null pointer (hwmgr->backend) to function smu7_update_edc_leakage_table. Signed-off-by:
Ma Jun <Jun.Ma2@amd.com> Reviewed-by:
Yang Wang <kevinyang.wang@amd.com> Signed-off-by:
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Ma Jun authored
Remove dead code in amdgpu_ras_add_mca_err_addr Signed-off-by:
YiPeng Chai <YiPeng.Chai@amd.com> Signed-off-by:
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Ma Jun authored
Check bo before using it Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Marcelo Mendes Spessoto Junior authored
Fix most of the display documentation compile warnings by documenting struct mpc_funcs functions in dc/inc/hw/mpc.h file. Remove the following warnings: ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'read_mpcc_state' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'mpc_init_single_inst' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'get_mpcc_for_dpp_from_secondary' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'get_mpcc_for_dpp' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'wait_for_idle' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'assert_mpcc_idle_before_connect' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'init_mpcc_list_from_hw' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_denorm' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_denorm_clamp' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_output_csc' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_ocsc_default' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_output_gamma' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'power_on_mpc_mem_pwr' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_dwb_mux' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'disable_dwb_mux' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'is_dwb_idle' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_out_rate_control' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_gamut_remap' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'program_1dlut' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'program_shaper' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'acquire_rmu' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'program_3dlut' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'release_rmu' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'get_mpc_out_mux' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_bg_color' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_mpc_mem_lp_mode' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'set_movable_cm_location' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'update_3dlut_fast_load_select' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'get_3dlut_fast_load_status' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'populate_lut' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'program_lut_read_write_control' not described in 'mpc_funcs' ./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:579: warning: Function parameter or struct member 'program_lut_mode' not described in 'mpc_funcs' Fixes: b8c1c3a8 ("Documentation/gpu: Add kernel doc entry for MPC") Closes: https://lore.kernel.org/linux-next/20240130134954.04fcf763@canb.auug.org.au/Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Tested-by:
Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com> Signed-off-by:
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shaoyunl authored
This reverts commit fcc5df72. Signed-off-by:
shaoyunl <shaoyun.liu@amd.com> Acked-by:
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- 13 May, 2024 31 commits
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Harish Kasiviswanathan authored
No functional change. This will help in moving gpu_id creation to next step while still being able to identify the correct GPU Signed-off-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Frank Min authored
1. restore mqd from backup while resuming 2. use copy_toio and copy_fromio while mqd in vram Signed-off-by:
Frank Min <Frank.Min@amd.com> Reviewed-by:
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Frank Min authored
add initial value for gfx12 AGP aperture Signed-off-by:
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Jesse Zhang authored
Function hwmgr->hwmgr_func->get_num_of_pp_table_entries(hwmgr) returns a negative number Signed-off-by:
Jesse Zhang <Jesse.Zhang@amd.com> Suggested-by:
Tim Huang <Tim.Huang@amd.com> Reviewed-by:
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Mario Limonciello authored
OLED panels don't support the ABM, they shouldn't offer the panel_power_savings attribute to the user. Check whether aux BL control support was enabled to decide whether to offer it. Reported-by:
Gergo Koteles <soyer@irl.hu> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3359Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Tested-by:
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Jesse Zhang authored
Filter invalid aca error types before performing a shift operation. Signed-off-by:
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Jesse Zhang authored
if ras_manager obj null, don't print NBIO err data Signed-off-by:
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Jesse Zhang authored
Execution cannot reach this statement: case POWER_STATE_TYPE_BALAN. Signed-off-by:
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Jesse Zhang authored
This code cannot be reached: return "UNKNOWN";. Signed-off-by:
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Jesse Zhang authored
This less-than-zero comparison of an unsigned value is never true. feature < 0U Signed-off-by:
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Jesse Zhang authored
This less-than-zero comparison of an unsigned value is never true. type < 0U Signed-off-by:
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Jesse Zhang authored
The same code is executed when the condition err is true or false, because the code in the if-then branch and after the if statement is identical Signed-off-by:
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Jesse Zhang authored
The switch governing value clk_type cannot be SMU_GFXCLK and SMU_SCLK. Fixes: ca55f459 ("drm/amd/pm: add the fine grain tuning function for Renoir") Signed-off-by:
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Jesse Zhang authored
This code cannot be reached: return sysfs_emit(buf, "UNK....) Signed-off-by:
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Jesse Zhang authored
Set smu work laod mask may fail, so check return. Signed-off-by:
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Jesse Zhang authored
Check for specific indexes that may be invalid values. Signed-off-by:
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Jesse Zhang authored
Set smu work laod mask may fail, so check return. Signed-off-by:
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Jesse Zhang authored
Set smu work laod mask may fail, so check return. Signed-off-by:
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Jesse Zhang authored
Check for specific indexes that may be invalid values. Signed-off-by:
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Jesse Zhang authored
check ring allocate success before emit preempt ib Signed-off-by:
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Jesse Zhang authored
This greater-than-or-equal-to-zero comparison of an unsigned value is always true. fpriv->xcp_id >= 0U Signed-off-by:
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Jesse Zhang authored
Check the amdgpu_hive_info *hive that maybe is NULL. Signed-off-by:
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Jesse Zhang authored
check the pointer hive before use. Signed-off-by:
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Jesse Zhang authored
For invalid clk types, return -EINVAL to check the return. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Ma Jun authored
Drop redundant setting code for pcie.lanes. It overwrites the value get from pptable Signed-off-by:
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Ma Jun authored
Fix code alignment issue Signed-off-by:
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Jesse Zhang authored
For invalid clk types, return -EINVAL to check the return. Signed-off-by:
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Jesse Zhang authored
Checks the partition mode and returns an error for an invalid mode. Signed-off-by:
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Alex Hung authored
This reverts commit c49e44ed. This causes regression on DP link layer test. Reported-by:
Mark Broadworth <Mark.Broadworth@amd.com> Acked-by:
Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
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Mukul Joshi authored
We are incorrectly passing the first XCC's MQD when updating CU masks for other XCCs in the partition. Fix this by passing the MQD for the XCC currently being updated with CU mask to update_cu_mask function. Fixes: fc6efed2 ("drm/amdkfd: Update CU masking for GFX 9.4.3") Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
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Aric Cyr authored
This version brings along following fixes: - Read default boot options - Find max flickerless instant vtotal delta - Refactor dcn401_update_clocks - Reduce I2C speed to 95kHz in DCN401 - Allow higher DSC slice support for small timings on dcn401 - Don't offload flip if not only address update - Check UHBR13.5 cap when determining max link cap - Enable SYMCLK gating in DCCG - Expand to higher link rates - Add left edge pixel for YCbCr422/420 + ODM pipe split - Add resource interfaces for get ODM slice rect - Add COEF filter types for DCN401 - Refactor DCN401 DCCG into component directory - Fix 3dlut size for Fastloading on DCN401 - Fix write to non-existent reg on DCN401 - Remove USBC check for DCN32 - Remove unused code for some dc files - Disable AC/DC codepath when unnecessary - Create dcn401_clk_mgr struct Acked-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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