- 14 Mar, 2016 7 commits
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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- 11 Mar, 2016 5 commits
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Dave Jiang authored
Previously we unloaded the interrupts and reloaded in order to work around a channel reset bug that cleared the MSIX table. This approach just isn't practical when a reset needs to happen in the error handler that just happens to be running in interrupt context (bottom half). It looks like we can work around the hardware issue by just storing a shadow copy of the MSIX table and restore it after reset. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
This patch adds support for hidma engine. The driver consists of two logical blocks. The DMA engine interface and the low-level interface. The hardware only supports memcpy/memset and this driver only support memcpy interface. HW and driver doesn't support slave interface. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
The Qualcomm Technologies HIDMA device has been designed to support virtualization technology. The driver has been divided into two to follow the hardware design. 1. HIDMA Management driver 2. HIDMA Channel driver Each HIDMA HW consists of multiple channels. These channels share some set of common parameters. These parameters are initialized by the management driver during power up. Same management driver is used for monitoring the execution of the channels. Management driver can change the performance behavior dynamically such as bandwidth allocation and prioritization. The management driver is executed in host context and is the main management entity for all channels provided by the device. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
Add documentation for the Qualcomm Technologies HIDMA binding. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
Creating a QCOM directory for all QCOM DMA source files. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 04 Mar, 2016 2 commits
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Laxman Dewangan authored
After using the function of_device_get_match_data(), the of_device_id table for tegra20 dma is not used by probe() and hence moving it near to place where platform driver is defined as this table used only on this data structure. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Arnd Bergmann authored
The sirf dma driver uses #ifdef to check for CONFIG_PM_SLEEP for its suspend/resume code but then has no #ifdef for the respective runtime PM code, so we get a warning if CONFIG_PM is disabled altogether: drivers/dma/sirf-dma.c:1000:12: error: 'sirfsoc_dma_runtime_resume' defined but not used [-Werror=unused-function] This removes the existing #ifdef and instead uses __maybe_unused annotations for all four functions to let the compiler know it can silently drop the function definition. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 03 Mar, 2016 4 commits
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Laxman Dewangan authored
Use of_device_get_match_data() for getting matched data instead of implementing this locally. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Andy Gross authored
This patch fixes the Qualcomm BAM dmaenging driver to work with big endian kernels. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Emilio López authored
MODULE_DEVICE_TABLE() is missing, so the module isn't auto-loading on supported systems. This commit adds the missing line so it loads automatically when building it as a module and running on a system with the early sunxi DMA engine. Signed-off-by: Emilio López <emilio.lopez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Dan Carpenter authored
This is harmless because the caller only cares about zero vs non-zero but we should be returning PTR_ERR() here. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 01 Mar, 2016 1 commit
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Caesar Wang authored
This patch fixes the burst mode that will break DMA uart on SoCFPGA. In some cases, some SoCS didn't support the multi-burst even if the devices who use the pl330 claim support the maxburst. Fixes: commit 848e9776 "dmaengine: pl330: support burst mode for dev-to-mem and mem-to-dev transmit" Reported-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 22 Feb, 2016 7 commits
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Vinod Koul authored
The slave dmaengine semantics required the client to map dma addresses and pass DMA address to dmaengine drivers. This was a convenient notion coming from generic dma offload cases where dmaengines are interchangeable and client is not aware of which engine to map to. But in case of slave, we know the dmaengine and always use a specific one. Further the IOMMU cases can lead to failure of this notion, so make this as physical address and now dmaengine driver will do the required mapping. Original-patch-by: Linus Walleij <linus.walleij@linaro.org> Original-patch-Acked-by: Lee Jones <lee.jones@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Andy Shevchenko authored
In acpi_dma_request_slave_chan_by_name() the debug message is printed before the actual matching happens. Correct the message itself to be in align with the flow. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Andy Shevchenko authored
There is a typo in the definition of IDMA64C_CFGH_WR_ISSUE_THD(x). Fix it by swapping characters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Lothar Waßmann authored
The mxs-dma unit is also available on i.MX6UL. Make it possible to select it in Kconfig. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
In order to avoid possible race condition when client drivers are using dmaengine_terminate_sync() call to disable the channel. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Suggested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
We need the callback to support the dmaengine_terminate_sync(). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Peter Ujfalusi authored
We need the callback to support the dmaengine_terminate_sync(). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 15 Feb, 2016 4 commits
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Dave Jiang authored
Future IOATDMA hardware will take advantage of descriptors residing in contiguous memory. Setting the descriptor ring in max config DMA memory of 2MB. Each channel will need 2 of these chunks. This should provide 64k of 64B descriptors. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Dave Jiang authored
Moving to contingous memory backed descriptor rings. This makes is really difficult and complex to do reshape. Going to remove this as I don't think we need to do it anymore. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Dave Jiang authored
Converting old pci_pool_* calls to "new" dma_pool_* to make everything uniform. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Andy Shevchenko authored
The datasheet requires that the user must clear LLP_[SD]_EN bits whenever LLP.LOC is zero, i.e. in the last descriptor of a multi-block chain. Make the driver do this. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 09 Feb, 2016 6 commits
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Addy Ke authored
Generic dma controller on Rockchips' platform cannot support DMAFLUSHP instruction which make dma to flush the req of non-aligned or non-multiple of what we need. That will cause an unrecoverable dma bus error. The saftest way is to set dma max burst to 1. Signed-off-by: Addy ke <addy.ke@rock-chips.com> Fixes: 64e36824 ("spi/rockchip: add driver for Rockchip...") Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> cc: Heiko Stuebner <heiko@sntech.de> cc: Olof Johansson <olof@lixom.net> cc: Doug Anderson <dianders@chromium.org> cc: Sonny Rao <sonnyrao@chromium.org> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Shawn Lin authored
This patch add max burst capability for dmaengine and limit burst capability to one for PL330_QUIRK_BROKEN_NO_FLUSHP Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Shawn Lin authored
This patch add max_burst to dma_get_slave_caps for clients to get the burst capability of slave dma controller. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Addy Ke authored
This patch add "arm,pl330-broken-no-flushp" quirk to avoid execute DMAFLUSHP if Soc doesn't support it. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> cc: Doug Anderson <dianders@chromium.org> cc: Heiko Stuebner <heiko@sntech.de> cc: Olof Johansson <olof@lixom.net> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Shawn Lin authored
This patch adds the "arm, pl330-broken-no-flushp" for arm-pl330. Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Boojin Kim authored
This patch adds to support burst mode for dev-to-mem and mem-to-dev transmit. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> cc: Heiko Stuebner <heiko@sntech.de> cc: Doug Anderson <dianders@chromium.org> cc: Olof Johansson <olof@lixom.net> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 25 Jan, 2016 3 commits
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Tim Gardner authored
CC [M] drivers/dma/ioat/prep.o drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor': drivers/dma/ioat/prep.c:682:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] } ^ drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor_val': drivers/dma/ioat/prep.c:714:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] } gcc version 5.3.1 20151219 (Ubuntu 5.3.1-4ubuntu1) Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Tim Gardner <tim.gardner@canonical.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Alexander Sverdlin authored
Debugging ALSA hangups it was found that EP9302 (latest E2 rev.) DMA controller sometimes asserts STALL interrupt instead of NFB interrupt. Simply ignoring the difference and simply acting upon the amount of data we still have to transfer seems to work fine. This somehow sounds similar to M2M issue which is already dealt with in the driver, when the controller asserts DONE interrupt too early. The issue is not documented in Cirrus Logic erratas for EP93XX, but original Cirrus DMA driver from 2003 (not based on DMA API) did the similar handling of STALL interrupt. In-tree driver (6d831c65) did it also, before conversion to DMA engine API. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Jie Yang authored
The offset of SINC should be 9, not 7, here fix this typo. Signed-off-by: Jie Yang <yang.jie@intel.com> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 24 Jan, 2016 1 commit
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Linus Torvalds authored
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