- 31 May, 2021 14 commits
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Stephen Boyd authored
We should indicate that we're not using the HPD pin on this device, per the binding document. Otherwise if code in the future wants to enable HPD in the bridge when this property is absent we'll be wasting power powering hpd when we don't use it on trogdor boards. We didn't notice this before because the kernel driver blindly disables hpd, but that won't be true for much longer. Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Douglas Anderson <dianders@chromium.org> Fixes: 7ec3e673 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20210324025534.1837405-1-swboyd@chromium.orgSigned-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Petr Vorel authored
Reserve GPIO pins 85-88 as these aren't meant to be accessible from the application CPUs (causes reboot). Yet another fix similar to 91345867, 5f8d3ab1, which is needed to allow angler to boot after 3edfb7bd ("gpiolib: Show correct direction from the beginning"). Fixes: feeaf56a ("arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support") Signed-off-by:
Petr Vorel <petr.vorel@gmail.com> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210415193913.1836153-1-petr.vorel@gmail.comSigned-off-by:
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Konrad Dybcio authored
Fix the compatible to make the driver probe and tell the driver where to look for the "xo" clock to make sure everything works. Then we get a happy (eh, happier) 8996: somainline-sdcard:/home/konrad# cat /sys/kernel/debug/clk/pwrcl_pll/clk_rate 1152000000 Don't backport without "arm64: dts: qcom: msm8996: Add CPU opps", as the system fails to boot without consumers for these clocks. Signed-off-by:
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Loic Poulain authored
Add the operating points capabilities of the kryo CPUs, that can be used for frequency scaling. There are two differents operating point tables, one for the big cluster and one for the LITTLE cluster. This frequency scaling support can then be used as a passive cooling device (cpufreq cooling device). Only add nominal fmax for now, since there is no dynamic control of VDD APC (s11..) which is statically set at its nominal value. Original patch link: https://patchwork.kernel.org/project/linux-arm-msm/patch/1595253740-29466-6-git-send-email-loic.poulain@linaro.org/Signed-off-by:
Loic Poulain <loic.poulain@linaro.org> [konrad: drop the thermals part, rebase and remove spaces within <>] Signed-off-by:
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Matthias Kaehlcke authored
CoachZ rev3 uses a 100k NTC thermistor for the charger temperatures, instead of the 47k NTC that is stuffed in earlier revisions. Add .dts files for rev3. The 47k NTC currently isn't supported by the PM6150 ADC driver. Disable the charger thermal zone for rev1 and rev2 to avoid the use of bogus temperature values. This also gets rid of the explicit DT files for rev2 and handles rev2 in the rev1 .dts instead. There was some back and forth downstream involving the 'dmic_clk_en' pin, after that was sorted out the DT for rev1 and rev2 is the same. Signed-off-by:
Matthias Kaehlcke <mka@chromium.org> Reviewed-by:
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Matthias Kaehlcke authored
The only kernel visible change with respect to rev2 is that pompom rev3 changed the charger thermistor from a 47k to a 100k NTC to use a thermistor which is supported by the PM6150 ADC driver. Disable the charger thermal zone for pompom rev1 and rev2 to avoid the use of bogus temperature values from the unsupported thermistor. Signed-off-by:
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Matthias Kaehlcke authored
Commit f73558cc83d1 ("arm64: dts: qcom: sc7180: Disable charger thermal zone for lazor") disables the charger thermal zone for specific lazor revisions due to an unsupported thermistor type. The initial idea was to disable the thermal zone for older revisions and leave it enabled for newer ones that use a supported thermistor. Finally the thermistor won't be changed on newer revisions, hence the thermal zone should be disabled for all lazor (and limozeen) revisions. Instead of disabling it per revision do it once in the shared .dtsi for lazor. Signed-off-by: -
Roja Rani Yarubandi authored
We had introduced the QUP-CORE ICC path to put proxy votes from QUP wrapper on behalf of earlycon, if other users of QUP-CORE turn off this clock before the real console is probed, unclocked access to HW was seen from earlycon. With ICC sync state support proxy votes are no longer need as ICC will ensure that the default bootloader votes are not removed until all it's consumer are probed. We can safely remove ICC path for QUP-CORE clock from QUP wrapper device. Signed-off-by:
Roja Rani Yarubandi <rojay@codeaurora.org> Signed-off-by:
Akash Asthana <akashast@codeaurora.org> Reviewed-by:
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Vinod Koul authored
Some node unit addresses were put wrongly in the dts, resulting in below warning when run with W=1 arch/arm64/boot/dts/qcom/sm8350.dtsi:693.34-702.5: Warning (simple_bus_reg): /soc@0/thermal-sensor@c222000: simple-bus unit address format error, expected "c263000" arch/arm64/boot/dts/qcom/sm8350.dtsi:704.34-713.5: Warning (simple_bus_reg): /soc@0/thermal-sensor@c223000: simple-bus unit address format error, expected "c265000" arch/arm64/boot/dts/qcom/sm8350.dtsi:1180.32-1185.5: Warning (simple_bus_reg): /soc@0/interconnect@90e0000: simple-bus unit address format error, expected "90c0000" Fix by correcting to the correct address as given in reg node Reviewed-by:
Robert Foss <robert.foss@linaro.org> Signed-off-by:
Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210513060733.382420-1-vkoul@kernel.orgSigned-off-by:
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Vinod Koul authored
Add interconnect enums instead of numbers now that interconnect is in mainline. Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by:
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Felipe Balbi authored
With this patch, DMA has a chance of probing and doing something useful. Reviewed-by:
Felipe Balbi <felipe.balbi@microsoft.com> Link: https://lore.kernel.org/r/20210417061951.2105530-3-balbi@kernel.orgSigned-off-by:
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Vincent Knecht authored
Enable the MStar msg2638 touchscreen. Reviewed-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
Vincent Knecht <vincent.knecht@mailoo.org> Link: https://lore.kernel.org/r/20210528114345.543761-1-vincent.knecht@mailoo.orgSigned-off-by:
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Loic Poulain authored
The speedbin value blown in the efuse is used to determine is used to determine the voltage and frequency value for different IPs, including GPU, CPUs... So it's really not a gpu specific information. This patch simply renames 'gpu_speed_bin' node to 'speedbin'. Signed-off-by:
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Robert Marko authored
One of the QUSB USB PHY-s has been left enabled by default, this is probably just a mistake as other USB PHY-s are disabled by default. It makes no sense to have it enabled by default as not all board implement USB ports, so disable it. Reviewed-by:
Kathiravan T <kathirav@codeaurora.org> Signed-off-by:
Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210526150125.1816335-1-robimarko@gmail.comSigned-off-by:
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- 26 May, 2021 26 commits
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Konrad Dybcio authored
Add BAM DMA nodes and add required properties to devices to enable DMA operations. Signed-off-by:
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Konrad Dybcio authored
As the name implies, the USB2 controller should only operate at USB2 speeds. Make sure it does just that by pinning it to USB High-Speed (USB2) mode. Signed-off-by:
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satya priya authored
Add channel nodes for the on die temperatures of PMICS pmk8350, pm8350, pmr735a and pmr735b. Signed-off-by:
satya priya <skakit@codeaurora.org> Reviewed-by:
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satya priya authored
The sc7280-idp has four PMICs, include their .dtsi files. Reviewed-by:
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satya priya authored
Add gpio ranges and correct the compatible to add "qcom,spmi-gpio" as this pmic is on spmi bus. Reviewed-by:
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satya priya authored
Add PON, RTC, VADC and ACD_TM support for PMK8350. Signed-off-by:
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satya priya authored
Add gpio ranges and correct the compatible to add "qcom,spmi-gpio" as this pmic is on spmi bus. Reviewed-by:
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satya priya authored
Add temp-alarm support for PMR735A pmic. Signed-off-by:
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satya priya authored
Add gpio ranges and correct the compatible to add "qcom,spmi-gpio" as this pmic is on spmi bus. Reviewed-by:
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satya priya authored
Add temp-alarm support for PM8350C pmic. Signed-off-by:
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satya priya authored
Add base DTS file for pm7325 along with GPIOs and temp-alarm nodes. Signed-off-by:
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satya priya authored
Add label "thermal_zones" for thermal-zones node. Signed-off-by:
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Rajeshwari Ravindra Kamble authored
Adding thermal zone and cooling maps support in SC7280. Reviewed-by:
Rajeshwari Ravindra Kamble <rkambl@codeaurora.org> Link: https://lore.kernel.org/r/1620367641-23383-4-git-send-email-rkambl@codeaurora.orgSigned-off-by:
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Rajeshwari Ravindra Kamble authored
Adding device node for TSENS controller and critical interrupt support in SC7280. Signed-off-by:
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Yassine Oudjana authored
Add hs_phy_irq and ss_phy_irq to usb3. Tested-by:
Yassine Oudjana <y.oudjana@protonmail.com> Link: https://lore.kernel.org/r/dvfyYKA9vnJdunbQ1CL-dgjXtv_1wYpRnezdc3PHoCyrgmfi5KP0Dn4MtaumQEpHIQAHL9tTdqcaCK7YJWyrdWXCrPeGd4uMh-nFeu7xQYw=@protonmail.comSigned-off-by:
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Konrad Dybcio authored
Fix the indentation, add pinctrl and move status="disabled" down. Signed-off-by:
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Konrad Dybcio authored
Add and configure WLED node to enable backlight control on WLED-enabled devices. Signed-off-by:
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Konrad Dybcio authored
Add required nodes to support DSI displays connected to the primary interface. Signed-off-by:
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Konrad Dybcio authored
Add a RESIN node to support RESIN-connected buttons on some devices. Signed-off-by:
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Konrad Dybcio authored
Disable Venus by default to allow booting without closed firmware and enable it on the boards that didn't previously disable it. This commit brings no functional difference. Signed-off-by:
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Konrad Dybcio authored
Disable them by default to allow for booting without a display and proprietary firmware. Then, enable them on boards that didn't previously disable them. Hence, this commit brings no functional difference. Signed-off-by:
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Konrad Dybcio authored
Add the fifth and sixth I2C host on the second BLSP, used for various board-specific peripherals. Signed-off-by:
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Konrad Dybcio authored
Add SDHCI1 device to allow for usage of (more often than not) eMMC. Signed-off-by:
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Konrad Dybcio authored
Set the tcsr_mutex_regs size to 0x40000 to allow for accessing all required registers that will be needed to support modem. Signed-off-by:
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Konrad Dybcio authored
QUP and UART names start from 1. There are 6 QUPs and 2 UARTs per BLSP. Let's not further confuse programmers by stating otherwise. Signed-off-by:
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Konrad Dybcio authored
In order to prepare for feature development, the DTs have to be workable with.. To achieve that: - Rename msmgpio to tlmm (consistency with newer DTs) - Rid msm8996-pins.dtsi and add the contents to msm8996.dtsi - Modernize the pin nodes, make them more concise - Add generic pin configuration for some hardware - Fix up some names in preparation for BLSP/UART name cleaning.. Signed-off-by:
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