- 20 Mar, 2024 40 commits
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Rodrigo Siqueira authored
[Why & How] DCN3_16_MIN_COMPBUF_SIZE_KB is defined in the dcn316_resource.c file. This header fit better in the dcn31_fpu.h together with similar defines. Acked-by:
Wayne Lin <wayne.lin@amd.com> Signed-off-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Mukul Joshi authored
This patch adds the following functionality: - Check the queue preemption status on all XCDs in a partition for GFX 9.4.3. - Update the queue preemption debug message to print the queue doorbell id for which preemption failed. - Change the signature of check preemption failed function to return a bool instead of uint32_t and pass the MQD manager as an argument. Suggested-by:
Jay Cornwall <jay.cornwall@amd.com> Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Mukul Joshi authored
Rename read_doorbell_id function to a more meaningful name, implying what it is used for. No functional change. Suggested-by:
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Asad Kamal authored
Report pcie link speed/width using metric table in case of one vf & if pmfw support is available, else report directly from registers in case of pf. Skip reporting it for other cases. v2: Skip multi-vf check(Lijo) Signed-off-by:
Asad Kamal <asad.kamal@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Asad Kamal authored
Update PMFW interface headers for updated metrics table with pcie link speed and pcie link width Signed-off-by:
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Rodrigo Siqueira authored
[Why & How] If the driver has issues retrieving the MALL size for the specific hardware, it might fail since the current value is set to zero. This commit addresses this issue by adding a simple constant value to give the drive a chance to start. Acked-by:
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Alex Hung authored
[Why & How] This fixes indentations and adjust spaces for better readability and code styles. Acked-by:
Alex Hung <alex.hung@amd.com> Tested-by:
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Alex Hung authored
[Why & How] dcn32_smu_transfer_wm_table_dram_2_smu is defined twice so one is removed. Also adjust prototype orders. Acked-by:
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Rodrigo Siqueira authored
[Why & How] Enable 2to1 ODM policy for DCN35 Acked-by:
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Rodrigo Siqueira authored
In some of the merge conflict fixes, one '+' was accidentally left at the beginning of the line. Fortunately, this did not cause any major issues since it acted as a number signal. This commit addresses this issue by removing the extra '+'. Acked-by:
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Rodrigo Siqueira authored
[Why & How] Remove redundant code Acked-by:
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Sunil Khatri authored
Add all the IP's version information on a SOC to the devcoredump. Signed-off-by:
Sunil Khatri <sunil.khatri@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Ovidiu Bunea authored
This reverts commit 54d94903 ("drm/amd/display: Set the power_down_on_boot function pointer to null") [why & how] This commit breaks S0i3 entry because DCN does not enter IPS2. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by:
Charlene Liu <charlene.liu@amd.com> Acked-by:
Ovidiu Bunea <ovidiu.bunea@amd.com> Tested-by:
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Muhammad Ahmed authored
[WHY] Blackscreen hang @ PC EF000025 when trying to wake up from S0i3. DCN gets powered off due to dc_power_down_on_boot() being called after timeout. [HOW] Setting the power_down_on_boot function pointer to null since we don't expect the function to be called for APU. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Muhammad Ahmed <ahmed.ahmed@amd.com> Tested-by:
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Aric Cyr authored
- Support long vblank feature - Add monitor patch for specific eDP - Init DPPCLK from SMU on dcn32 - Update odm when ODM combine is changed on an otg master pipe with no plane - Fix idle check for shared firmware state - Add guards for idle on reg read/write - Guard cursor idle reallow by DC debug option - Add debug counters to IPS exit prints - Add left edge pixel for YCbCr422/420 + ODM pipe split - Amend coasting vtotal for replay low hz - Refactor DPP into a component directory - Set the power_down_on_boot function pointer to null - Implement update_planes_and_stream_v3 sequence - Lock all enabled otg pipes even with no planes - Implement wait_for_odm_update_pending_complete - Add a dc_state NULL check in dc_state_release - Backup and restore only on full updates - Update DMUB flags and definitions - Return the correct HDCP error code - Add comments to v_total calculation and drop legacy TODO Acked-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
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Alvin Lee authored
[WHY & HOW] Since the backup and restore for plane and stream states has a significant amount of data to copy, we will change the backup and restore sequence to only take place during full updates. We will also move the scratch memory to struct dc instead of dc_state to avoid needing to allocate large amounts of memory every time we create a new DC state. Reviewed-by:
Wenjing Liu <wenjing.liu@amd.com> Acked-by:
Alvin Lee <alvin.lee2@amd.com> Tested-by:
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Wenjing Liu authored
[WHY & HOW] Update planes and stream version 3 separates FULL and FAST updates to their own sequences. It aims to clean up frequent checks for update type resulting unnecessary branching in logic flow. It also adds a new commit minimal transition sequence, which detects the need for minimal transition based on the actual comparison of current and new states instead of "predicting" it based on per feature software policy, i.e. could_mpcc_tree_change_for_active_pipes. The new commit minimal transition sequence is made universal to any power saving features that would use extra free pipes such as Dynamic ODM/MPC Combine, MPO or SubVp. Therefore there is no longer a need to specially handle compatibility problems with transitions among those features as they are now transparent to the new sequence. Reviewed-by:
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Victor Skvortsov authored
Host will initiate an FLR in SDMA poison consumption scenario. Guest should wait for FLR message to re-init data exchange. Signed-off-by:
Victor Skvortsov <victor.skvortsov@amd.com> Reviewed-by:
Zhigang Luo <zhigang.luo@amd.com> Signed-off-by:
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Lijo Lazar authored
Check if the device is present in the bus before trying to recover. It could be that device itself is lost from the bus in some hang situations. Signed-off-by:
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Rodrigo Siqueira authored
[WHY & HOW] This commit just adds some simple comments to help understand the calculation of V total duration for Freesync. Also, remove a legacy TODO comment from link service type. Acked-by:
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Anthony Koo authored
[WHAT] - Update replay residency tracing design to support more types including tracking PHY and ALPM residency types - Add commands for Replay frame update count profiling - Enhance HWFQ with additional flags to allow for more optimized IPS low power state residencies - Add new flag to indicate if a new frame update needed for ABM to ramp up into steady state Acked-by:
Anthony Koo <anthony.koo@amd.com> Tested-by:
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Xiaojian Du authored
This will add the sensor value of VCN activity for some ASICs. Signed-off-by:
Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by:
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Revalla Hari Krishna authored
[WHY & HOW] Move all dpp files to a new dpp directory. Reviewed-by:
Martin Leung <martin.leung@amd.com> Acked-by:
Revalla Hari Krishna <harikrishna.revalla@amd.com> Tested-by:
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Nicholas Kazlauskas authored
[WHY] To have a log of the entry/exit counters in case the system hangs to measure stability. [HOW] Read them from firmware state and pass them to the prints. Reviewed-by:
Duncan Ma <duncan.ma@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[WHY] To control whether idle optimizations reallowed after the first cursor update. [HOW] Add checks to the conditions. Reviewed-by:
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Nicholas Kazlauskas authored
[WHY] If DCN is in idle then we should not be accessing DCN registers or it can lead to hangs. [HOW] Log the error and return 0 or drop the write if it's in idle. This is skipped in the exit sequence itself since the boolean flips before it starts. It also does not cover accesses from external clients outside of DM/DC like firmware or the kernel mode driver. Reviewed-by:
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Shashank Sharma authored
This patch removes an unused input variable in the MES doorbell function. Cc: Christian König <Christian.Koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Shashank Sharma <shashank.sharma@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fixes index out of bounds issue in the color transformation function. The issue could occur when the index 'i' exceeds the number of transfer function points (TRANSFER_FUNC_POINTS). The fix adds a check to ensure 'i' is within bounds before accessing the transfer function points. If 'i' is out of bounds, an error message is logged and the function returns false to indicate an error. Reported by smatch: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.c:405 cm_helper_translate_curve_to_hw_format() error: buffer overflow 'output_tf->tf_pts.red' 1025 <= s32max drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.c:406 cm_helper_translate_curve_to_hw_format() error: buffer overflow 'output_tf->tf_pts.green' 1025 <= s32max drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_cm_common.c:407 cm_helper_translate_curve_to_hw_format() error: buffer overflow 'output_tf->tf_pts.blue' 1025 <= s32max Fixes: b6295960 ("drm/amd/display: Build unity lut for shaper") Cc: Vitaly Prosyak <vitaly.prosyak@amd.com> Cc: Charlene Liu <Charlene.Liu@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by:
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
Tom Chung <chiahsuan.chung@amd.com> Signed-off-by:
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Robin Chen authored
[WHY] We want to support low hz case, but the original vtotal/vtotal_min/vtotal_max can't support more than 0x7FFF. [HOW] We use the 2 HW reg to contorl long vblank case. 1. OTG_V_COUNT_STOP_CONTROL -> vcount_stop 2. OTG_V_COUNT_STOP_CONTROL2 -> vcount_stop_timer vcount_stop define from which line we stop using vcount and start using vcount2. vcount_stop_timer define how long we use vcount2. Ex: Vtotal = 7 OTG_V_COUNT_STOP_CONTROL = 4 OTG_V_COUNT_STOP_CONTROL2 = 5 time : 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 vcount : 0, 1, 2, 3, - - - - - 4, 5, 6 vcount2 : 0, 1, 2, 3, 4, Reviewed-by:
Jun Lei <jun.lei@amd.com> Acked-by:
ChunTao Tso <chuntao.tso@amd.com> Signed-off-by: Robin Chen<robin.chen@amd.com> Tested-by:
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Aric Cyr authored
- Change default size for dummy plane in DML2 - Enable DML2 debug flags - Add some forward declarations - Add DML2 folder to include path - Set DCN351 BB and IP the same as DCN35 - Override min required DCFCLK in dml1_validate - Fix function banner for amdgpu_dm_psr_disable_all() - Allow dirty rects to be sent to dmub when abm is active - Add debug key to allow disabling dtbclk - Add debug prints for IPS testing - Exit idle optimizations before HDCP execution - Add entry and exit counters Acked-by:
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Anthony Koo authored
[WHY & HOW] Add new counters in the shared IPS firmware state. Acked-by:
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Nicholas Kazlauskas authored
[WHY] To log commit states and when we transition in/out of allow and idle states and the caller. [HOW] Add a new logging helper and wrap idle optimization calls to receive the caller. Reviewed-by:
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Muhammad Ahmed authored
[HOW] Add debug key to allow disabling dtbclk Reviewed-by:
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Tao Zhou authored
Let kfd interrupt handler process it. v2: return 0 instead of 1 for fed error. drop the usage of strcmp in interrupt handler. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Tao Zhou authored
Replace it with related interface in gfxhub functions. v2: replace node id with xcc id. get node id for query_utcl2_poison_status Signed-off-by: -
Sunil Khatri authored
Add relevant ringbuffer information such as rptr, wptr,rb mask, ring name, ring size and also the rings content for each ring on a gpu reset. Signed-off-by:
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Roman Li authored
[WHY] Incorrect function name in function banner. [HOW] Correct name and brief description. Reviewed-by:
Hersen Wu <hersenxs.wu@amd.com> Reviewed-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by:
Roman Li <roman.li@amd.com> Tested-by:
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Sunil Khatri authored
Add page fault information to the devcoredump. Output of devcoredump: **** AMDGPU Device Coredump **** version: 1 kernel: 6.7.0-amd-staging-drm-next module: amdgpu time: 29.725011811 process_name: soft_recovery_p PID: 1720 Ring timed out details IP Type: 0 Ring Name: gfx_0.0.0 [gfxhub] Page fault observed Faulty page starting at address: 0x0000000000000000 Protection fault status register: 0x301031 VRAM is lost due to GPU reset! Signed-off-by:
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Tao Zhou authored
Implement it for gfxhub 1.0 and 1.2. v2: input logical xcc id for poison query interface. Signed-off-by:
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Tao Zhou authored
Add UCE and FED bit definitions. Signed-off-by:
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