- 13 Feb, 2023 31 commits
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Oleksij Rempel authored
This function will be needed for genphy_c45_ethtool_get_eee() provided by next patch. Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Oleksij Rempel authored
KSZ8563R, which has same PHYID as KSZ9477 family, will change "EEE control and capability 1" (Register 3.20) content depending on configuration of "EEE advertisement 1" (Register 7.60). Changes on the 7.60 will affect 3.20 register. So, instead of depending on register 3.20, driver should set supported_eee. Proper supported_eee configuration is needed to make use of generic PHY c45 set/get_eee functions provided by next patches. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Oleksij Rempel authored
Add generic function for EEE abilities defined by IEEE 802.3 specification. For now following registers are supported: - IEEE 802.3-2018 45.2.3.10 EEE control and capability 1 (Register 3.20) - IEEE 802.3cg-2019 45.2.1.186b 10BASE-T1L PMA status register (Register 1.2295) Since I was not able to find any flag signaling support of these registers, we should detect link mode abilities first and then based on these abilities doing EEE link modes detection. Results of EEE ability detection will be stored into new variable phydev->supported_eee. Signed-off-by:
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Oleksij Rempel authored
Some of KSZ9477 family switches provides EEE support. To enable it, we just need to register set_mac_eee/set_mac_eee handlers and validate supported chip version and port. Currently supported chip variants are: KSZ8563, KSZ9477, KSZ9563, KSZ9567, KSZ9893, KSZ9896, KSZ9897. KSZ8563 supports EEE only with 100BaseTX/Full. Other chips support 100BaseTX/Full and 1000BaseTX/Full. Low Power Idle configuration is not supported and currently not documented in the datasheets. EEE PHY specific tunings are not documented in the switch datasheets, but can overlap with KSZ9131 specification. Signed-off-by:
Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by:
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David S. Miller authored
Shannon Nelson says: ==================== ionic: on-chip descriptors We start with a couple of house-keeping patches that were originally presented for 'net', then we add support for on-chip descriptor rings for tx-push, as well as adding support for rx-push. I have a patch for the ethtool userland utility that I can send out once this has been accepted. v4: added rx-push attributes to ethtool netlink converted CMB feature from using a priv-flag to using ethtool tx/rx-push v3: edited commit message to describe interface-down limitation added warn msg if cmb_inuse alloc fails removed unnecessary clearing of phy_cmb_pages and cmb_npages changed cmb_rings_toggle to use cmb_inuse removed unrelated pci_set_drvdata() removed unnecessary (u32) cast added static inline func for writing CMB descriptors v2: dropped the rx buffers patch ==================== Signed-off-by: -
Shannon Nelson authored
The ionic device has on-board memory (CMB) that can be used for descriptors as a way to speed descriptor access for faster packet processing. It is rumored to improve latency and/or packets-per-second for some profiles of small packet traffic, although your mileage may vary. Signed-off-by:
Shannon Nelson <shannon.nelson@amd.com> Signed-off-by:
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Shannon Nelson authored
Similar to what was done for TX_PUSH, add an RX_PUSH concept to the ethtool interfaces. Signed-off-by:
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Shannon Nelson authored
Minor Code cleanup details. Signed-off-by:
Leon Romanovsky <leonro@nvidia.com> Signed-off-by:
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Shannon Nelson authored
We have the pointer already, don't need to go through the lif struct for it. Signed-off-by:
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David S. Miller authored
Alex Elder says: ==================== net: ipa: determine GSI register offsets differently This series changes the way GSI register offset are specified, using the "reg" mechanism currently used for IPA registers. A follow-on series will extend this work so fields within GSI registers are also specified this way. The first patch rearranges the GSI register initialization code so it is similar to the way it's done for the IPA registers. The second identifies all the GSI registers in an enumerated type. The third introduces "gsi_reg-v3.1.c" and uses the "reg" code to define one GSI register offset. The second-to-last patch just adds "gsi_reg-v3.5.1.c", because that version introduces a new register not previously defined. All the rest just define the rest of the GSI register offsets using the "reg" mechanism. Note that, to have continued lines align with an open parenthesis, new files created in this series cause some checkpatch warnings. ==================== Signed-off-by: -
Alex Elder authored
Add the remaining GSI register offset definitions. Use gsi_reg() rather than the corresponding GSI_*_OFFSET() macros to get the offsets for these registers, and get rid of the macros. Note that we are now defining information for the HW_PARAM_2 register, and that doesn't appear until IPA v3.5.1. Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
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Alex Elder authored
The next patch adds a GSI register field that is only valid starting at IPA v3.5.1. Create "gsi_v3.5.1.c" from "gsi_v3.1.c", changing only the name of the public regs structure it defines. Signed-off-by:
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Alex Elder authored
Add definitions of the offsets for IRQ-related GSI registers. Use gsi_reg() rather than the corresponding GSI_CNTXT_*_OFFSET() macros to get the offsets for these registers, and get rid of the macros. Signed-off-by:
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Alex Elder authored
Add definitions of the offsets and strides for registers whose offset depends on an event ring ID, and use gsi_reg() and its returned value to determine offsets for these registers. Get rid of the corresponding GSI_EV_CH_E_*_OFFSET() macros. Signed-off-by:
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Alex Elder authored
Continue populating with GSI register definitions, adding remaining registers whose offset depends on a channel ID. Use gsi_reg() and reg_n_offset() to determine offsets for those registers, and get rid of the corresponding GSI_CH_C_*_OFFSET() macros. Signed-off-by:
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Alex Elder authored
Create a new register definition file in the "reg" subdirectory, and begin populating it with GSI register definitions based on IPA version. The GSI registers haven't changed much, so several IPA versions can share the same GSI register definitions. As with IPA registers, an array of pointers indexed by GSI register ID refers to these register definitions, and a new "regs" field in the GSI structure is initialized in gsi_reg_init() to refer to register information based on the IPA version (though for now there's only one). The new function gsi_reg() returns register information for a given GSI register, and the result can be used to look up that register's offset. This patch is meant only to put the infrastructure in place, so only eon register (CH_C_QOS) is defined for each version, and only the offset and stride are defined for that register. Use new function gsi_reg() to look up that register's information to get its offset, This makes the GSI_CH_C_QOS_OFFSET() unnecessary, so get rid of it. Signed-off-by:
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Alex Elder authored
Create a new gsi_reg_id enumerated type, which identifies each GSI register with a symbolic identifier. Create a function that indicates whether a register ID is valid. Signed-off-by:
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Alex Elder authored
Create a new source file "gsi_reg.c", and in it, introduce a new function to encapsulate initializing GSI registers, including looking up and I/O mapping their memory. Create gsi_reg_exit() as the inverse of the init function. Signed-off-by:
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Eric Dumazet authored
If TCA_STAB attribute is malformed, qdisc_get_stab() returns an error, and we end up calling ops->destroy() while ops->init() has not been called yet. While we are at it, call qdisc_put_stab() after ops->destroy(). Fixes: 1f62879e ("net/sched: make stab available before ops->init() call") Reported-by: syzbot+d44d88f1d11e6ca8576b@syzkaller.appspotmail.com Signed-off-by:
Eric Dumazet <edumazet@google.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: Kurt Kanzenbach <kurt@linutronix.de> Reviewed-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
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Horatiu Vultur authored
Add support for PHC and timestamping operations for the lan8841 PHY. PTP 1-step and 2-step modes are supported, over Ethernet and UDP both ipv4 and ipv6. Signed-off-by:
Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by:
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David S. Miller authored
Jiri Pirko says: ==================== devlink: params cleanups and devl_param_driverinit_value_get() fix The primary motivation of this patchset is the patch #6, which fixes an issue introduced by 075935f0 ("devlink: protect devlink param list by instance lock") and reported by Kim Phillips <kim.phillips@amd.com> (https://lore.kernel.org/netdev/719de4f0-76ac-e8b9-38a9-167ae239efc7@amd.com/) and my colleagues doing mlx5 driver regression testing. The basis idea is that devl_param_driverinit_value_get() could be possible to the called without holding devlink intance lock in most of the cases (all existing ones in the current codebase), which would fix some mlx5 flows where the lock is not held. To achieve that, make sure that the param value does not change between reloads with patch #2. Also, convert the param list to xarray which removes the worry about list_head consistency when doing lockless lookup. The rest of the patches are doing some small related cleanup of things that poke me in the eye during the work. --- v1->v2: - a small bug was fixed in patch #2, the rest of the code stays the same so I left review/ack tags attached to them ==================== Signed-off-by:
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Jiri Pirko authored
Driver calling devl_param_driverinit_value_set() has to hold devlink instance lock while doing that. Put an assertion there. Signed-off-by:
Jiri Pirko <jiri@nvidia.com> Reviewed-by:
Simon Horman <simon.horman@corigine.com> Acked-by:
Jakub Kicinski <kuba@kernel.org> Reviewed-by:
Jacob Keller <jacob.e.keller@intel.com> Signed-off-by:
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Jiri Pirko authored
If the driver maintains following basic sane behavior, the devl_param_driverinit_value_get() function could be called without holding instance lock: 1) Driver ensures a call to devl_param_driverinit_value_get() cannot race with registering/unregistering the parameter with the same parameter ID. 2) Driver ensures a call to devl_param_driverinit_value_get() cannot race with devl_param_driverinit_value_set() call with the same parameter ID. 3) Driver ensures a call to devl_param_driverinit_value_get() cannot race with reload operation. By the nature of params usage, these requirements should be trivially achievable. If the driver for some off reason is not able to comply, it has to take the devlink->lock while calling devl_param_driverinit_value_get(). Remove the lock assertion and add comment describing the locking requirements. This fixes a splat in mlx5 driver introduced by the commit referenced in the "Fixes" tag. Lore: https://lore.kernel.org/netdev/719de4f0-76ac-e8b9-38a9-167ae239efc7@amd.com/Reported-by:
Kim Phillips <kim.phillips@amd.com> Fixes: 075935f0 ("devlink: protect devlink param list by instance lock") Signed-off-by:
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Jiri Pirko authored
Loose the linked list for params and use xarray instead. Note that this is required to be eventually possible to call devl_param_driverinit_value_get() without holding instance lock. Signed-off-by:
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Jiri Pirko authored
As xarray has an iterator helper that allows to start from specified index, use this directly and avoid repeated iteration from 0. Signed-off-by:
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Jiri Pirko authored
Probably due to copy-paste error, the name of the arg is "init_val" which is misleading, as the pointer is used to point to struct where to store the current value. Rename it to "val" and change the arg comment a bit on the way. Signed-off-by:
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Jiri Pirko authored
The driverinit param purpose is to serve the driver during init/reload time to provide a value, either default or set by user. Make sure that driver does not read value updated by user before the reload is performed. Hold the new value in a separate struct and switch it during reload. Note that this is required to be eventually possible to call devl_param_driverinit_value_get() without holding instance lock. Signed-off-by:
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Jiri Pirko authored
No need to treat string params any different comparing to other types. Rely on the struct assign to copy the whole struct, including the string. Signed-off-by:
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Yu Xiao authored
Add support for the following modes to the nfp driver: NFP_MEDIA_10GBASE_LR NFP_MEDIA_25GBASE_LR NFP_MEDIA_25GBASE_ER These modes are supported by the hardware and, support for them was recently added to firmware. Signed-off-by:
Yu Xiao <yu.xiao@corigine.com> Signed-off-by:
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Jacob Keller authored
NL_SET_ERR_MSG_MOD inserts the KBUILD_MODNAME and a ':' before the actual extended error message. The devlink feature hasn't been able to be compiled as a module since commit f4b6bcc7 ("net: devlink: turn devlink into a built-in"). Stop using NL_SET_ERR_MSG_MOD, and just use the base NL_SET_ERR_MSG. This aligns the extended error messages better with the NL_SET_ERR_MSG_ATTR messages as well. Signed-off-by:
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Pietro Borrello authored
rds_rm_zerocopy_callback() uses list_add_tail() with swapped arguments. This links the list head with the new entry, losing the references to the remaining part of the list. Fixes: 9426bbc6 ("rds: use list structure to track information for zerocopy completion notification") Suggested-by:
Paolo Abeni <pabeni@redhat.com> Signed-off-by:
Pietro Borrello <borrello@diag.uniroma1.it> Signed-off-by:
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- 11 Feb, 2023 9 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queueJakub Kicinski authored
Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2023-02-09 (i40e) Jan removes i40e_status from the driver; replacing them with standard kernel error codes. Kees Cook replaces 0-length array with flexible array. * '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: net/i40e: Replace 0-length array with flexible array i40e: use ERR_PTR error print in i40e messages i40e: use int for i40e_status i40e: Remove string printing for i40e_status i40e: Remove unused i40e status codes ==================== Link: https://lore.kernel.org/r/20230209172536.3595838-1-anthony.l.nguyen@intel.comSigned-off-by:
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Jakub Kicinski authored
Alexandra Winter says: ==================== s390/net: updates 2023-02-06 Just maintenance patches, no functional changes. If you disagree with patch 4, we can leave it out. We prefer scnprintf, but no strong opinion. ==================== Link: https://lore.kernel.org/r/20230209110424.1707501-1-wintera@linux.ibm.comSigned-off-by:
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Thorsten Winkler authored
This LWN article explains the rationale for this change https: //lwn.net/Articles/69419/ Ie. snprintf() returns what *would* be the resulting length, while scnprintf() returns the actual length. Reported-by:
Jules Irenge <jbi.octave@gmail.com> Reviewed-by:
Alexandra Winter <wintera@linux.ibm.com> Signed-off-by:
Thorsten Winkler <twinkler@linux.ibm.com> Signed-off-by:
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Thorsten Winkler authored
Following the advice of the Documentation/filesystems/sysfs.rst. All sysfs related show()-functions should only use sysfs_emit() or sysfs_emit_at() when formatting the value to be returned to user space. Reported-by:
Joe Perches <joe@perches.com> Reviewed-by:
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Thorsten Winkler authored
Use INET6_ADDRSTRLEN constant with size of 48 which be used for char arrays storing ip addresses (for IPv4 and IPv6) Reviewed-by:
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Alexandra Winter authored
Get rid of multiple smatch warnings, like: warn: inconsistent indenting Reviewed-by:
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Jakub Kicinski authored
Yoshihiro Shimoda says: ==================== net: renesas: rswitch: Improve TX timestamp accuracy The patch [[123]/4] are minor refacoring for readability. The patch [4/4] is for improving TX timestamp accuracy. To improve the accuracy, it requires refactoring so that this is not a fixed patch. v2: https://lore.kernel.org/all/20230208235721.2336249-1-yoshihiro.shimoda.uh@renesas.com/ v1: https://lore.kernel.org/all/20230208073445.2317192-1-yoshihiro.shimoda.uh@renesas.com/ ==================== Link: https://lore.kernel.org/r/20230209081741.2536034-1-yoshihiro.shimoda.uh@renesas.comSigned-off-by:
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Yoshihiro Shimoda authored
In the previous code, TX timestamp accuracy was bad because the irq handler got the timestamp from the timestamp register at that time. This hardware has "Timestamp capture" feature which can store each TX timestamp into the timestamp descriptors. To improve TX timestamp accuracy, implement timestamp descriptors' handling. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by:
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Yoshihiro Shimoda authored
In the previous code, the gptp flag was completely related to the !dir_tx in struct rswitch_gwca_queue because rswitch_gwca_queue_alloc() was called below: < In rswitch_txdmac_alloc() > err = rswitch_gwca_queue_alloc(ndev, priv, rdev->tx_queue, true, false, TX_RING_SIZE); So, dir_tx = true, and gptp = false. < In rswitch_rxdmac_alloc() > err = rswitch_gwca_queue_alloc(ndev, priv, rdev->rx_queue, false, true, RX_RING_SIZE); So, dir_tx = false, and gptp = true. In the future, a new queue handling for timestamp will be implemented and this gptp flag is confusable. So, remove the gptp flag. Signed-off-by:
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