- 31 Jul, 2023 5 commits
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Tengfei Fan authored
Add based DTSI for SM4450 SoC and includes base description of CPUs and interrupt-controller which helps to boot to shell with dcc console on boards with this SoC. Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20230731080043.38552-4-quic_tengfan@quicinc.comSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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Tengfei Fan authored
Document the SM4450 SoC binding and also the boards using it. Reviewed-by:
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Neil Armstrong authored
Add nodes to support Type-C USB/DP functionality. On this platform, a Type-C redriver is added to the SuperSpeed graph. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
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Neil Armstrong authored
Add nodes to support Type-C USB/DP functionality. Signed-off-by:
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Neil Armstrong authored
Add the USB3+DP Combo QMP PHY port subnodes in the SM8550 SoC DTSI to avoid duplication in the devices DTs. Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
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- 28 Jul, 2023 3 commits
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Zeyan Li authored
I2C6 and I2C7 use the same interrupts, which is incorrect. In the downstream kernel, I2C7 has interrupts of 608 instead of 607. Fixes: 81bee695 ("arm64: dts: qcom: sm8150: add i2c nodes") Signed-off-by:
Zeyan Li <qaz6750@outlook.com> Reviewed-by:
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Stephan Gerhold authored
A7 seems to have external pull-up for the SD card chip detect (like most MSM8916/MSM8939 devices) so drop the internal pull-up. It's not necessary. Tested-by:
"Lin, Meng-Bo" <linmengbo0689@protonmail.com> Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20230723-a7sdc2cdnopull-v1-1-699fd730afcb@gerhold.netSigned-off-by:
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Alexander Stein authored
Use id-gpios and vbus-gpios instead. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by:
Shawn Guo <shawnguo@kernel.org> Acked-by:
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- 22 Jul, 2023 32 commits
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Krzysztof Kozlowski authored
Bindings expect the LPG node name to be "pwm": sc8180x-lenovo-flex-5g.dtb: pmic@5: 'lpg' does not match any of the regexes: Fixes: d3302290 ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by:
Vinod Koul <vkoul@kernel.org> Reviewed-by:
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Krzysztof Kozlowski authored
Bindings expect the Power-on node name to be "pon": sc8180x-lenovo-flex-5g.dtb: pmic@0: 'power-on@800' does not match any of the regexes: Fixes: d3302290 ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by:
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Krzysztof Kozlowski authored
The GPIO children of PMICs should use gpio-ranges: sc8180x-primus.dtb: pmic@0: gpio@c000: 'gpio-ranges' is a required property Fixes: d3302290 ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by:
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Krzysztof Kozlowski authored
The GPIO children of PMICs should use qcom,spmi-gpio fallback: sc8180x-primus.dtb: pmic@0: gpio@c000:compatible: ['qcom,pmc8180-gpio'] is too short Fixes: d3302290 ("arm64: dts: qcom: sc8180x: Add pmics") Signed-off-by:
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Krzysztof Kozlowski authored
Synaptics RMI4 Touchscreen bindings never defined syna,codes property for function 1a. No usage in Linux drivers. Signed-off-by:
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Krzysztof Kozlowski authored
According to bindings and Linux driver, there is no VDDA but VIO supply. Fixes: 4ac46b36 ("arm64: dts: qcom: msm8996: xiaomi-gemini: Add support for Xiaomi Mi 5") Signed-off-by:
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Krzysztof Kozlowski authored
Interrupts extended already define a parent interrupt controller: msm8953-xiaomi-vince.dtb: touchscreen@20: Unevaluated properties are not allowed ('interrupts-parent' was unexpected) Fixes: aa17e707 ("arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi 5 Plus") Cc: <stable@vger.kernel.org> Signed-off-by: -
Mrinmay Sarkar authored
Enable pcie0, pcie1 nodes and their respective phy's. Signed-off-by:
Mrinmay Sarkar <quic_msarkar@quicinc.com> Link: https://lore.kernel.org/r/1689960276-29266-5-git-send-email-quic_msarkar@quicinc.comSigned-off-by:
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Mrinmay Sarkar authored
Add pcie dtsi nodes for two controllers found on sa8775p platform. Signed-off-by:
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Bjorn Andersson authored
The LLCC binding and driver was recently corrected to handle the stride varying between platforms. Switch to the new format to ensure accesses are done in the right place. Fixes: 8575f197 ("arm64: dts: qcom: Introduce the SC8180x platform") Signed-off-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230612220632.1885175-1-quic_bjorande@quicinc.comSigned-off-by:
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Bjorn Andersson authored
Following the SC8180X Primus reference design, add pmic_glink and USB Type-C wiring for battery manager, external display and orientation switching. Signed-off-by:
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Bjorn Andersson authored
Wire up pmic_glink and the various components of USB Type-C to get battery status, orientation switching of SuperSpeed USB, as well as support for external display on the SC8180X Primus reference device. Signed-off-by:
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Bjorn Andersson authored
Define anchors for wiring up the USB Type-C graph in the board files. Signed-off-by:
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Devi Priya authored
Use assigned-clock-rates property for configuring the QUP I2C core clocks to operate at nominal frequency. Signed-off-by:
Devi Priya <quic_devipriy@quicinc.com> Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.comSigned-off-by:
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Lin, Meng-Bo authored
This dts adds support for Samsung Galaxy A7 smartphone released in 2015. Add a device tree for A7 with initial support for: - GPIO keys - Hall Sensor - SDHCI (internal and external storage) - USB Device Mode - UART (on USB connector via the SM5502 MUIC) - WCNSS (WiFi/BT) - Regulators - Touch key - Accelerometer/Magnetometer - Fuelgauge - NFC - Vibrator - Touchscreen Signed-off-by:
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Lin, Meng-Bo authored
Document samsung,a7 bindings used in its device tree. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230623100220.5284-1-linmengbo0689@protonmail.comSigned-off-by:
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Konrad Dybcio authored
There are a couple of SoCs whose names end in "pro", with the currently- upstream examples being msm8974pro and msm8996pro. Allow such suffix in SoC-specific compatibles. Fixes: 5aa332c5 ("dt-bindings: qcom: document preferred compatible naming") Signed-off-by:
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Lin, Meng-Bo authored
J5 and J5X use an Imagis IST3038C touchscreen that is connected to blsp_i2c5. Add it to the device tree. MFD driver for SM5703 is unavailable at the moment, which is required to power up the touchscreen on J5, so it's disabled on J5 for now. Signed-off-by:
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Lin, Meng-Bo authored
E5, E7 and Grand Max have ST LIS2HH12 accelerometer. Add support for it. Signed-off-by:
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Krzysztof Kozlowski authored
Add audio-related nodes: the APR in the ADSP (same as on SM8250) and LPASS TLMM pin controller. Signed-off-by:
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Krzysztof Kozlowski authored
Add uSD card to HDK8350. Reviewed-by:
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Krzysztof Kozlowski authored
HDK8350 comes with PMK8350 PMIC, so include relevant DTSI. This also allows to use reboot reason. Reviewed-by:
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Manivannan Sadhasivam authored
UFS host controller requires interconnect path configuration for proper working. So let's specify them for SM8250 SoC. Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20230720054100.9940-14-manivannan.sadhasivam@linaro.orgSigned-off-by:
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Manivannan Sadhasivam authored
UFS host controller requires interconnect path configuration for proper working. So let's specify them for SDM845 SoC. Reviewed-by:
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Manivannan Sadhasivam authored
Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the downstream vendor devicetree. So fix it! https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi Fixes: 433f9a57 ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock") Signed-off-by:
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Manivannan Sadhasivam authored
GCC and it's GDSCs are under the RPMh CX power domain. So let's add the missing RPMh power domain to the GCC node. Fixes: 6d4cf750 ("arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP") Reviewed-by:
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Rohit Agarwal authored
Update the RPMHPD bindings entry as per the new generic bindings defined in rpmhpd.h for SM8550 SoC. Signed-off-by:
Rohit Agarwal <quic_rohiagar@quicinc.com> Link: https://lore.kernel.org/r/1689840545-5094-5-git-send-email-quic_rohiagar@quicinc.comSigned-off-by:
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Rohit Agarwal authored
Update the RPMHPD bindings entry as per the new generic bindings defined in rpmhpd.h for SM8450 SoC. Signed-off-by:
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Rohit Agarwal authored
Update the RPMHPD bindings entry as per the new generic bindings defined in rpmhpd.h for SM8350 SoC. Signed-off-by:
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Rohit Agarwal authored
Update the RPMHPD bindings entry as per the new generic bindings defined in rpmhpd.h for SM8250 SoC. Signed-off-by:
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Bjorn Andersson authored
Merge the new generic RPMHPD defines from a topic branch, to alow them being used in DeviceTree source, and the driver.
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Rohit Agarwal authored
Add Generic RPMh Power Domain indexes that can be used for all the Qualcomm SoC henceforth. The power domain indexes of these bindings are based on compatibility with current targets like SM8[2345]50 targets. Signed-off-by:
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