- 28 Sep, 2021 5 commits
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Shawn Guo authored
29.5V (29p5) is obviously wrong for regulator l4 and l5. Correct them to be 2.95V (2p95). No functional change. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210926072215.27517-1-shawn.guo@linaro.org
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Marijn Suijten authored
Some multiline properties (spread out over multiple lines to keep length in check) were not indented properly, leading to misalignment with the items above. The DT file is still small enough to address this early in the process. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Martin Botka <martin.botka@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210925141841.407257-1-marijn.suijten@somainline.org
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Stephan Gerhold authored
At the moment, longcheer-l8150 is using a dummy extcon-usb-gpio device that permanently enables USB gadget mode. This workaround allows USB to work but is actually wrong and confusing. The "vbus-gpio" used there refers to an unused (floating) GPIO that is pulled up to make extcon-usb-gpio report USB gadget mode permanently. Replace this with the new &pm8916_usbin extcon device that actually reports if an USB cable is attached or not. This allows the USB PHY to be turned off when there is no USB cable attached and is much cleaner overall. Fixes: 16e8e807 ("arm64: dts: qcom: Add device tree for Longcheer L8150") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928112945.25310-3-stephan@gerhold.net
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Stephan Gerhold authored
At the moment, USB gadget mode on MSM8916 works only with an extcon device that reports the correct USB mode. This might be because the USB PHY needs to be configured appropriately. Unfortunately there is currently no simple approach to get such an extcon device during early bring-up. The extcon device for USB VBUS (i.e. gadget/peripheral mode) is typically provided by the charging driver which is almost always very complex to port. On pretty much all devices with PM8916, the USB VBUS is also connected to the PM8916 "USB_IN" pad, no matter if they use the linear charger integrated into PM8916 or not. The state of this pad can be checked with the "USBIN_VALID" interrupt of PM8916. The "qcom,pm8941-misc" binding exists to expose an "usb_vbus" and/or "usb_id" interrupt from the PMIC as an extcon device. Add a &pm8916_usbin node to pm8916.dtsi which can be used as simple extcon device for devices that are currently lacking a proper charger driver. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928112945.25310-2-stephan@gerhold.net
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Stephan Gerhold authored
While removing the size from the "reg" properties in pm8916.dtsi, commit bd6429e8 ("ARM64: dts: qcom: Remove size elements from pmic reg properties") mistakenly also removed the second register address for the rtc@6000 device. That one did not represent the size of the register region but actually the address of the second "alarm" register region of the rtc@6000 device. Now there are "reg-names" for two "reg" elements, but there is actually only one "reg" listed. Since the DT schema for "qcom,pm8941-rtc" only expects one "reg" element anyway, just drop the "reg-names" entirely to fix this. Fixes: bd6429e8 ("ARM64: dts: qcom: Remove size elements from pmic reg properties") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928112945.25310-1-stephan@gerhold.net
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- 27 Sep, 2021 35 commits
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Sibi Sankar authored
Update MSS node to support MSA based modem boot on SC7280 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631886935-14691-11-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631886935-14691-10-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Add miscellaneous nodes to boot the modem and support post-mortem debug on SC7280 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631886935-14691-9-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Add, delete and update platform specific reserved memory nodes. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631886935-14691-8-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Add missing reserved regions as described in v1 of SC7280 memory map. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631886935-14691-7-git-send-email-sibis@codeaurora.org
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AngeloGioacchino Del Regno authored
This device has a physical matrix keyboard, connected to a GPIO expander, for which there's still no support yet. Though, some of the keys are connected to the MSM8998 GPIOs and not as a matrix, so these can be added. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123823.368199-4-angelogioacchino.delregno@somainline.org
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AngeloGioacchino Del Regno authored
This smartphone has a Goodix GT8296 touch IC, reachable at address 0x14 on blsp2 i2c-1. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123823.368199-3-angelogioacchino.delregno@somainline.org
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AngeloGioacchino Del Regno authored
Add configuration for the physical keyboard LEDs, including the caps lock indicator and keyboard backlight. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123823.368199-2-angelogioacchino.delregno@somainline.org
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AngeloGioacchino Del Regno authored
Add device tree support for the F(x)tec Pro 1 (QX1000) smartphone; this is a minimal configuration to boot to serial console. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210909123823.368199-1-angelogioacchino.delregno@somainline.org
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Stephan Gerhold authored
At the moment, playing audio on Secondary MI2S will just end up getting stuck, without actually playing any audio. This happens because the wrong bit clock is configured when playing audio on Secondary MI2S. The PRI_I2S_CLK (better name: SPKR_I2S_CLK) is used by the SPKR audio mux block that provides both Primary and Secondary MI2S. The SEC_I2S_CLK (better name: MIC_I2S_CLK) is used by the MIC audio mux block that provides Tertiary MI2S. Quaternary MI2S is also part of the MIC audio mux but has its own clock (AUX_I2S_CLK). This means that (quite confusingly) the SEC_I2S_CLK is not actually used for Secondary MI2S as the name would suggest. Secondary MI2S needs to have the same clock as Primary MI2S configured. Fix the clock list for the lpass node in the device tree and add a comment to clarify this confusing naming. With these changes, audio can be played correctly on Secondary MI2S. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Fixes: 3761a361 ("arm64: dts: qcom: add lpass node") Tested-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210816181810.2242-1-stephan@gerhold.net
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Stephan Gerhold authored
So far there were no interrupts set up for the BMC150 accelerometer + magnetometer combo because they were broken for some reason. It turns out Longcheer L8150 actually has a BMC156 which is very similar to BMC150, but only has an INT2 pin for the accelerometer part. This requires some minor changes in the bmc150-accel driver which is now supported by using the more correct bosch,bmc156_accel compatible. Unfortunately it looks like even INT2 is not functional on most boards because the interrupt line is not actually connected to the BMC156. However, there are two pads next to the chip that can be shorted to make it work if needed. While at it, add the missing interrupts for the magnetometer part and extra BMG160 gyroscope, those seem to work without any problems. Also correct the magnetometer compatible to bosch,bmc156_magn for clarity (no functional difference for the magnetometer part). Tested-by: Nikita Travkin <nikita@trvn.ru> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210816123544.14027-1-stephan@gerhold.net
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Sai Prakash Ranjan authored
Add IMEM and pil info DT nodes for SC7180 SoC which will help in the post-mortem debug. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> [bjorn: Dropped dload-mode subnode, as no agreement was reached on this binding] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/39064a2db95ccc2cb5eef003569bef2de651c8ed.1628757036.git.saiprakash.ranjan@codeaurora.org
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Konrad Dybcio authored
Add missing include to make it compile. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-17-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add initial SM6350 SoC and Sony Xperia 10 III (PDX213, Lena platform) device trees. There is no sign of another Lena devices on the horizon, so a common DTSI is not created for now. 10 III features a Full HD OLED display and 5G support, among other nice things like USB3. The bootloader is VERY unpleasant, to get a bootable setup you have to run: mkbootimg --kernel arch/arm64/boot/Image.gz --ramdisk [some initrd] \ --dtb arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dtb \ --cmdline "[some cmdline]" --base 0 --kernel_offset 0x8000 \ --ramdisk_offset 0x1000000 --dtb_offset 0x1f00000 --os_version 11 \ --os_patch_level "2021-08" --tags_offset 0x100 --pagesize 4096 \ --header_version 2 -o mainline.img adb reboot bootloader // You have to either pull vbmeta{"","_system"} from // /dev/block/bootdevice/by-name/ or build one as a part of AOSP build process fastboot --disable-verity --disable-verification flash vbmeta vbmeta.img fastboot --disable-verity --disable-verification flash vbmeta_system \ vbmeta_system.img fastboot flash boot mainline.img fastboot erase dtbo // This will take approx 70s... fastboot reboot Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-16-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add a node for the APPS SMMU to allow for managing memory access to peripherals such as the USB controller. While at it, add iommus property to the USB1 node to make sure its registers can be accessed, as they seem to be gated by default. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-15-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add SDHCI1/2 nodes for eMMC and uSD card respectively. Do note that most SM6350 devices seem to come with UFS. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Replaced SM6350_CX with its constant value] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-14-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add RPMHPD node, its OPP table and BCM voter to prepare for performance level voting. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-13-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add a node for the PRNG to enable hw-accelerated pseudo-random number generation. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-12-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add a node for SPMI to allow for communication with on-board PMICs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-11-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add a node for AOSS_QMP in preparation for remote processor enablement. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-10-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add nodes required for TSENS block using the common qcom,tsens-v2 binding. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-9-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable CPU clock scaling. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-8-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add nodes required for USB1 to function. SM6350 (thankfully) resuses SDM845 and SC7180 IP, so no additional code porting is required. Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> [bjorn: Renamed dwc3 node "usb"] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-7-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add TLMM pinctrl node to enable referencing the SoC pins in other nodes. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-6-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add and configure GCC node to allow for referencing GCC-controlled clocks in other nodes. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-5-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add RPMHCC node to allow for referencing RPMH-controlled clocks in other nodes. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-4-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add a node for LLCC with SM6350-specific compatible. Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-3-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add a base DT for SM6350 SoC Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-2-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Document Kryo 560 CPUs found in Qualcomm Snapdragon 690 (SM6350). Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210923162204.21752-1-konrad.dybcio@somainline.org
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Sibi Sankar authored
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8350 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-11-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8250 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-10-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8150 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-9-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SDM845 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-8-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7280 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-7-git-send-email-sibis@codeaurora.org
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Sibi Sankar authored
Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7180 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1631800770-371-6-git-send-email-sibis@codeaurora.org
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